/* * adc.c * * Created on: 2025Äê2ÔÂ25ÈÕ * Author: Cerlink */ #include "../../init/inc/adc.h" static void adc_Init(void) { ADC_InitTypeDef ADC_InitStructure = {0}; GPIO_InitTypeDef GPIO_InitStructure = {0}; RCC_PB2PeriphClockCmd(RCC_PB2Periph_GPIOA, ENABLE); RCC_PB2PeriphClockCmd(RCC_PB2Periph_ADC1, ENABLE); RCC_ADCCLKConfig(RCC_PCLK2_Div8); //8M/8 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0|GPIO_Pin_1|GPIO_Pin_2|GPIO_Pin_6|GPIO_Pin_7; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN; GPIO_Init(GPIOA, &GPIO_InitStructure); ADC_DeInit(ADC1); ADC_InitStructure.ADC_Mode = ADC_Mode_Independent; ADC_InitStructure.ADC_ScanConvMode = ENABLE; ADC_InitStructure.ADC_ContinuousConvMode = ENABLE; ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_None; ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; ADC_InitStructure.ADC_NbrOfChannel = 5; ADC_Init(ADC1, &ADC_InitStructure); ADC_DMACmd(ADC1, ENABLE); ADC_Cmd(ADC1, ENABLE); ADC_FIFO_Cmd(ADC1, ENABLE); ADC_BufferCmd(ADC1, DISABLE); //disable buffer ADC_ResetCalibration(ADC1); while(ADC_GetResetCalibrationStatus(ADC1)); ADC_StartCalibration(ADC1); while(ADC_GetCalibrationStatus(ADC1)); } static void adc_dma_Tx_Init(DMA_Channel_TypeDef *DMA_CHx, u32 ppadr, u32 memadr, u16 bufsize) { DMA_InitTypeDef DMA_InitStructure = {0}; RCC_HBPeriphClockCmd(RCC_HBPeriph_DMA1, ENABLE); DMA_DeInit(DMA_CHx); DMA_InitStructure.DMA_PeripheralBaseAddr = ppadr; DMA_InitStructure.DMA_MemoryBaseAddr = memadr; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; DMA_InitStructure.DMA_BufferSize = bufsize; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh; DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; DMA_Init(DMA_CHx, &DMA_InitStructure); } uint16_t gADCBuf[5]; void all_adc_init(void) { adc_Init(); adc_dma_Tx_Init(DMA1_Channel1, (u32)&ADC1->RDATAR, (u32)gADCBuf, 5); DMA_Cmd(DMA1_Channel1, ENABLE); ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 1, ADC_SampleTime_CyclesMode7);//(239.5+1.5)*1/1M = 0.000241s = 241 us ADC_RegularChannelConfig(ADC1, ADC_Channel_1, 2, ADC_SampleTime_CyclesMode7);//(239.5+1.5)*1/1M = 0.000241s = 241 us ADC_RegularChannelConfig(ADC1, ADC_Channel_2, 3, ADC_SampleTime_CyclesMode7);//(239.5+1.5)*1/1M = 0.000241s = 241 us ADC_RegularChannelConfig(ADC1, ADC_Channel_6, 4, ADC_SampleTime_CyclesMode7);//(239.5+1.5)*1/1M = 0.000241s = 241 us ADC_RegularChannelConfig(ADC1, ADC_Channel_7, 5, ADC_SampleTime_CyclesMode7);//(239.5+1.5)*1/1M = 0.000241s = 241 us£¬241*5 = 1205 us ADC_SoftwareStartConvCmd(ADC1, ENABLE); }