\t (00:00:07) allegro 17.2 S079 Windows SPB 64-bit Edition
\t (00:00:07)     Journal start - Tue Feb 25 17:42:03 2025
\t (00:00:07)         Host=DESKTOP-7GQTCPA User=Cerlink Pid=13524 CPUs=16
\t (00:00:07) CmdLine= c:\cadence\spb_17.2\tools\bin\allegro.exe E:\Y\MounRiver\ZDBMS\HardWare\CL_ZDBMS_V05B.brd
\t (00:00:07) 
   (00:00:07) Loading axlcore.cxt 
\t (00:00:09) Opening existing design...
\i (00:00:09) QtSignal SPBFoldDockArea FoldAreaTabWidget currentChanged CL_ZDBMS_V05B
\d (00:00:09) Design opened: E:/Y/MounRiver/ZDBMS/HardWare/CL_ZDBMS_V05B.brd
\i (00:00:09) trapsize 7380
\i (00:00:09) trapsize 7589
\i (00:00:09) trapsize 7380
\i (00:00:09) trapsize 7380
\i (00:00:10) placementedit 
\i (00:00:10) zoom out 1 
\i (00:00:10) setwindow pcb
\i (00:00:10) zoom out 101.4018 -0.8863
\i (00:00:10) trapsize 14761
\i (00:00:11) zoom in 1 
\i (00:00:11) setwindow pcb
\i (00:00:11) zoom in -3.1033 2.8263
\i (00:00:11) trapsize 7380
\i (00:00:11) zoom out 1 
\i (00:00:11) setwindow pcb
\i (00:00:11) zoom out 97.2688 16.2585
\i (00:00:11) trapsize 14761
\i (00:00:12) roam start
\i (00:00:12) roam x -64
\i (00:00:12) roam x -80
\i (00:00:12) roam x -64
\i (00:00:12) roam x -96
\i (00:00:12) roam y -32
\i (00:00:12) roam x 32
\i (00:00:12) roam x 48
\i (00:00:12) roam x 32
\i (00:00:12) roam x 48
\i (00:00:12) roam y 16
\i (00:00:12) roam x 32
\i (00:00:12) roam y 16
\i (00:00:13) roam x 16
\i (00:00:13) roam y 32
\i (00:00:13) roam x 16
\i (00:00:13) roam y 48
\i (00:00:13) roam x 32
\i (00:00:13) roam x 16
\i (00:00:13) roam x 48
\i (00:00:13) roam x 48
\i (00:00:13) roam x 32
\i (00:00:13) roam x 32
\i (00:00:13) roam x 16
\i (00:00:13) roam x 16
\i (00:00:13) roam y -16
\i (00:00:13) roam x 16
\i (00:00:13) roam x 16
\i (00:00:13) roam y -16
\i (00:00:13) roam x 32
\i (00:00:13) roam x 144
\i (00:00:13) roam x 32
\i (00:00:14) roam x -16
\i (00:00:14) roam y 16
\i (00:00:14) roam x -48
\i (00:00:14) roam x -32
\i (00:00:14) roam x -16
\i (00:00:14) roam x -16
\i (00:00:14) roam end
\i (00:00:14) zoom in 1 
\i (00:00:14) setwindow pcb
\i (00:00:14) zoom in 80.4191 16.7488
\i (00:00:14) trapsize 7380
\i (00:00:15) zoom out 1 
\i (00:00:15) setwindow pcb
\i (00:00:15) zoom out 92.2276 26.6384
\i (00:00:15) trapsize 14761
\i (00:00:16) zoom in 1 
\i (00:00:16) setwindow pcb
\i (00:00:16) zoom in 101.6744 80.3670
\i (00:00:16) trapsize 7380
\i (00:00:16) zoom out 1 
\i (00:00:16) setwindow pcb
\i (00:00:16) zoom out 119.9775 48.0413
\i (00:00:16) trapsize 14761
\i (00:00:16) zoom in 1 
\i (00:00:16) setwindow pcb
\i (00:00:16) zoom in 113.1877 -0.0782
\i (00:00:16) trapsize 7380
\i (00:00:17) zoom out 1 
\i (00:00:17) setwindow pcb
\i (00:00:17) zoom out 132.2289 21.7675
\i (00:00:17) trapsize 14761
\i (00:00:17) zoom in 1 
\i (00:00:17) setwindow pcb
\i (00:00:17) zoom in 144.3325 66.0494
\i (00:00:17) trapsize 7380
\i (00:00:19) zoom out 1 
\i (00:00:19) setwindow pcb
\i (00:00:19) zoom out 90.3087 38.7423
\i (00:00:19) trapsize 14761
\i (00:00:20) zoom in 1 
\i (00:00:20) setwindow pcb
\i (00:00:20) zoom in 97.3939 -2.5873
\i (00:00:20) trapsize 7380
\i (00:00:20) zoom out 1 
\i (00:00:20) setwindow pcb
\i (00:00:20) zoom out 126.6199 20.4392
\i (00:00:20) trapsize 14761
\i (00:00:20) zoom in 1 
\i (00:00:20) setwindow pcb
\i (00:00:20) zoom in 101.2316 33.4286
\i (00:00:20) trapsize 7380
\i (00:00:23) QtSignal CVPLayerGrid CVPBoxAllTop clicked true
\i (00:00:36) hilight 
\i (00:00:41) setwindow form.find
\i (00:00:41) FORM find find_name U58 
\i (00:00:41) setwindow pcb
\i (00:00:41) trapsize 901
\t (00:00:41) Symbol "U58" highlighted.
\i (00:00:43) zoom out 1 
\i (00:00:43) setwindow pcb
\i (00:00:43) zoom out 44.5303 66.6392
\i (00:00:43) trapsize 1802
\i (00:00:44) zoom out 1 
\i (00:00:44) setwindow pcb
\i (00:00:44) zoom out 46.8364 62.2790
\i (00:00:44) trapsize 3603
\i (00:00:44) zoom out 1 
\i (00:00:44) setwindow pcb
\i (00:00:44) zoom out 48.9985 60.1891
\i (00:00:44) trapsize 7207
\i (00:00:44) zoom in 1 
\i (00:00:44) setwindow pcb
\i (00:00:44) zoom in 50.1516 68.8373
\i (00:00:44) trapsize 3603
\i (00:00:44) zoom in 1 
\i (00:00:44) setwindow pcb
\i (00:00:44) zoom in 50.1516 68.9094
\i (00:00:44) trapsize 1802
\i (00:00:47) zoom in 1 
\i (00:00:47) setwindow pcb
\i (00:00:47) zoom in 46.1158 64.5133
\i (00:00:47) trapsize 901
\i (00:00:47) zoom in 1 
\i (00:00:47) setwindow pcb
\i (00:00:47) zoom in 46.1158 64.5133
\i (00:00:47) trapsize 450
\i (00:00:48) zoom out 1 
\i (00:00:48) setwindow pcb
\i (00:00:48) zoom out 46.1158 64.5133
\i (00:00:48) trapsize 901
\i (00:00:54) hilight 
\i (00:01:03) setwindow form.find
\i (00:01:03) FORM find nets NO 
\i (00:01:04) FORM find symbols YES 
\i (00:01:07) setwindow pcb
\i (00:01:07) pick grid 45.3051 66.2250
\t (00:01:07) last pick:  45.3050 66.2250
\t (00:01:07) Symbol "U58" highlighted.
\i (00:01:09) zoom in 1 
\i (00:01:09) setwindow pcb
\i (00:01:09) zoom in 47.3770 63.9008
\i (00:01:09) trapsize 450
\i (00:01:09) zoom out 1 
\i (00:01:09) setwindow pcb
\i (00:01:09) zoom out 47.3319 63.6486
\i (00:01:09) trapsize 901
\i (00:01:10) zoom in 1 
\i (00:01:10) setwindow pcb
\i (00:01:10) zoom in 43.5845 62.6217
\i (00:01:10) trapsize 450
\i (00:01:16) zoom in 1 
\i (00:01:16) setwindow pcb
\i (00:01:16) zoom in 43.9809 63.7208
\i (00:01:16) trapsize 225
\i (00:01:16) zoom in 1 
\i (00:01:16) setwindow pcb
\i (00:01:16) zoom in 43.9809 63.7208
\i (00:01:16) trapsize 113
\i (00:01:18) zoom out 1 
\i (00:01:18) setwindow pcb
\i (00:01:18) zoom out 43.9809 63.7208
\i (00:01:18) trapsize 225
\i (00:01:18) zoom out 1 
\i (00:01:18) setwindow pcb
\i (00:01:18) zoom out 43.9808 63.7208
\i (00:01:18) trapsize 450
\i (00:01:18) zoom out 1 
\i (00:01:18) setwindow pcb
\i (00:01:18) zoom out 43.9807 63.7208
\i (00:01:18) trapsize 901
\i (00:01:19) pick grid 44.6473 62.2075
\t (00:01:19) last pick:  44.6475 62.2075
\i (00:01:21) setwindow form.find
\i (00:01:21) FORM find symbols NO 
\i (00:01:22) FORM find nets YES 
\i (00:01:23) setwindow pcb
\i (00:01:23) pick grid 44.8094 62.2075
\t (00:01:23) last pick:  44.8100 62.2075
\t (00:01:23) Net "Mc_Temp_In2" highlighted.
\i (00:01:24) zoom out 1 
\i (00:01:24) setwindow pcb
\i (00:01:24) zoom out 45.4220 66.0631
\i (00:01:24) trapsize 1802
\i (00:01:24) zoom out 1 
\i (00:01:24) setwindow pcb
\i (00:01:24) zoom out 45.4220 65.9550
\i (00:01:24) trapsize 3603
\i (00:01:24) zoom in 1 
\i (00:01:24) setwindow pcb
\i (00:01:24) zoom in 46.8633 52.9108
\i (00:01:24) trapsize 1802
\i (00:01:26) zoom in 1 
\i (00:01:26) setwindow pcb
\i (00:01:26) zoom in 46.1426 59.7932
\i (00:01:26) trapsize 901
\i (00:01:27) zoom in 1 
\i (00:01:27) setwindow pcb
\i (00:01:27) zoom in 46.2147 61.5769
\i (00:01:27) trapsize 450
\i (00:01:28) zoom out 1 
\i (00:01:28) setwindow pcb
\i (00:01:28) zoom out 46.2147 61.5679
\i (00:01:28) trapsize 901
\i (00:01:29) zoom in 1 
\i (00:01:29) setwindow pcb
\i (00:01:29) zoom in 46.2327 61.4418
\i (00:01:29) trapsize 450
\i (00:01:29) zoom out 1 
\i (00:01:29) setwindow pcb
\i (00:01:29) zoom out 46.2327 61.4418
\i (00:01:29) trapsize 901
\i (00:01:30) zoom out 1 
\i (00:01:30) setwindow pcb
\i (00:01:30) zoom out 46.2327 61.4419
\i (00:01:30) trapsize 1802
\i (00:01:31) zoom in 1 
\i (00:01:31) setwindow pcb
\i (00:01:31) zoom in 46.8092 63.9643
\i (00:01:31) trapsize 901
\i (00:01:31) zoom out 1 
\i (00:01:31) setwindow pcb
\i (00:01:31) zoom out 46.8093 63.8922
\i (00:01:31) trapsize 1802
\i (00:04:06) zoom out 1 
\i (00:04:06) setwindow pcb
\i (00:04:06) zoom out 40.0710 50.7400
\i (00:04:06) trapsize 3603
\i (00:04:07) zoom in 1 
\i (00:04:07) setwindow pcb
\i (00:04:07) zoom in 40.7194 60.6133
\i (00:04:07) trapsize 1802
\i (00:04:10) zoom in 1 
\i (00:04:10) setwindow pcb
\i (00:04:10) zoom in 45.9083 54.1633
\i (00:04:10) trapsize 901
\i (00:04:10) zoom out 1 
\i (00:04:10) setwindow pcb
\i (00:04:10) zoom out 45.9083 54.1633
\i (00:04:10) trapsize 1802
\i (00:04:12) zoom in 1 
\i (00:04:12) setwindow pcb
\i (00:04:12) zoom in 45.7642 55.2443
\i (00:04:12) trapsize 901
\i (00:04:13) zoom out 1 
\i (00:04:13) setwindow pcb
\i (00:04:13) zoom out 45.7102 55.2443
\i (00:04:13) trapsize 1802
\i (00:04:13) zoom out 1 
\i (00:04: