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ZDBMS/header_bootloader/IapIsp.h

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2025-02-06 07:35:32 +00:00
#ifndef __IAP_COMMUNICATE_H
#define __IAP_COMMUNICATE_H
//***------- <<< Use Configuration Wizard in Context Menu >>> ------------------
// <o><3E><><EFBFBD><EFBFBD>ѡ<EFBFBD><D1A1>
// <i><3E><><EFBFBD><EFBFBD>ѡ<EFBFBD><D1A1><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD>ںź<DABA><C5BA><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ֶ<EFBFBD><D6B6>޸<EFBFBD>InitGPIO()<29>˿ڳ<CBBF>ʼ<EFBFBD><CABC>ȷ<EFBFBD><C8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD>в<EFBFBD><D0B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƻ<EFBFBD><C6BB><EFBFBD>MOS<4F><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IAP/ISP<53>Ĺ<EFBFBD><C4B9><EFBFBD>Ҳ<EFBFBD><D2B2>Ҫͬ<D2AA><CDAC><EFBFBD>л<EFBFBD>
// <1=>Uart0 : P0.6 For RXD0,P0.7 For TXD0 UART0CR=32(uart0Ĭ<30><C4AC>)
// <2=>Uart0 : P0.6 For RXD0,P2.4 For TXD0 UART0CR=42
// <3=>Uart0 : P0.6 For RXD0,P2.5 For TXD0 UART0CR=52
// <4=>Uart0 : P0.6 For RXD0,P0.0 For TXD0 UART0CR=02
// <5=>Uart0 : P0.6 For RXD0,P0.1 For TXD0 UART0CR=12
// <6=>Uart0 : P0.7 For RXD0,P0.6 For TXD0 UART0CR=23
// <7=>Uart0 : P0.7 For RXD0,P2.4 For TXD0 UART0CR=43
// <8=>Uart0 : P0.7 For RXD0,P2.5 For TXD0 UART0CR=53
// <9=>Uart0 : P0.7 For RXD0,P0.0 For TXD0 UART0CR=03
// <10=>Uart0 : P0.7 For RXD0,P0.1 For TXD0 UART0CR=13
// <11=>Uart0 : P2.4 For RXD0,P0.6 For TXD0 UART0CR=24
// <12=>Uart0 : P2.4 For RXD0,P0.7 For TXD0 UART0CR=34
// <13=>Uart0 : P2.4 For RXD0,P2.5 For TXD0 UART0CR=54
// <14=>Uart0 : P2.4 For RXD0,P0.0 For TXD0 UART0CR=04
// <15=>Uart0 : P2.4 For RXD0,P0.1 For TXD0 UART0CR=14
// <16=>Uart0 : P2.5 For RXD0,P0.6 For TXD0 UART0CR=25
// <17=>Uart0 : P2.5 For RXD0,P0.7 For TXD0 UART0CR=35
// <18=>Uart0 : P2.5 For RXD0,P2.4 For TXD0 UART0CR=45
// <19=>Uart0 : P2.5 For RXD0,P0.0 For TXD0 UART0CR=05
// <20=>Uart0 : P2.5 For RXD0,P0.1 For TXD0 UART0CR=15
// <21=>Uart0 : P0.0 For RXD0,P0.7 For TXD0 UART0CR=30
// <22=>Uart0 : P0.0 For RXD0,P2.4 For TXD0 UART0CR=40
// <23=>Uart0 : P0.0 For RXD0,P2.5 For TXD0 UART0CR=50
// <24=>Uart0 : P0.0 For RXD0,P0.6 For TXD0 UART0CR=20
// <25=>Uart0 : P0.0 For RXD0,P0.1 For TXD0 UART0CR=10
// <26=>Uart0 : P0.1 For RXD0,P0.7 For TXD0 UART0CR=31
// <27=>Uart0 : P0.1 For RXD0,P2.4 For TXD0 UART0CR=41
// <28=>Uart0 : P0.1 For RXD0,P2.5 For TXD0 UART0CR=51
// <30=>Uart0 : P0.1 For RXD0,P0.6 For TXD0 UART0CR=21
// <29=>Uart0 : P0.1 For RXD0,P0.0 For TXD0 UART0CR=01
// <31=>Uart1 : P1.0 For RXD1,P1.1 For TXD1 UART1CR=10(uart1Ĭ<31><C4AC>)
// <32=>Uart1 : P1.0 For RXD1,P3.3 For TXD1 UART1CR=40
// <33=>Uart1 : P1.0 For RXD1,P3.4 For TXD1 UART1CR=50
// <34=>Uart1 : P1.0 For RXD1,P2.6 For TXD1 UART1CR=20
// <35=>Uart1 : P1.0 For RXD1,P2.7 For TXD1 UART1CR=30
// <36=>Uart1 : P1.1 For RXD1,P1.0 For TXD1 UART1CR=01
// <37=>Uart1 : P1.1 For RXD1,P3.3 For TXD1 UART1CR=41
// <38=>Uart1 : P1.1 For RXD1,P3.4 For TXD1 UART1CR=51
// <39=>Uart1 : P1.1 For RXD1,P2.6 For TXD1 UART1CR=21
// <40=>Uart1 : P1.1 For RXD1,P2.7 For TXD1 UART1CR=31
// <41=>Uart1 : P3.3 For RXD1,P1.0 For TXD1 UART1CR=04
// <42=>Uart1 : P3.3 For RXD1,P1.1 For TXD1 UART1CR=14
// <43=>Uart1 : P3.3 For RXD1,P3.4 For TXD1 UART1CR=54
// <44=>Uart1 : P3.3 For RXD1,P2.6 For TXD1 UART1CR=24
// <45=>Uart1 : P3.3 For RXD1,P2.7 For TXD1 UART1CR=34
// <46=>Uart1 : P3.4 For RXD1,P1.0 For TXD1 UART1CR=05
// <47=>Uart1 : P3.4 For RXD1,P1.1 For TXD1 UART1CR=15
// <48=>Uart1 : P3.4 For RXD1,P3.3 For TXD1 UART1CR=45
// <49=>Uart1 : P3.4 For RXD1,P2.6 For TXD1 UART1CR=25
// <50=>Uart1 : P3.4 For RXD1,P2.7 For TXD1 UART1CR=35
// <51=>Uart1 : P2.6 For RXD1,P1.0 For TXD1 UART1CR=02
// <52=>Uart1 : P2.6 For RXD1,P1.1 For TXD1 UART1CR=12
// <53=>Uart1 : P2.6 For RXD1,P3.3 For TXD1 UART1CR=42
// <54=>Uart1 : P2.6 For RXD1,P3.4 For TXD1 UART1CR=52
// <55=>Uart1 : P2.6 For RXD1,P2.7 For TXD1 UART1CR=32
// <56=>Uart1 : P2.7 For RXD1,P1.0 For TXD1 UART1CR=03
// <57=>Uart1 : P2.7 For RXD1,P1.1 For TXD1 UART1CR=13
// <58=>Uart1 : P2.7 For RXD1,P3.3 For TXD1 UART1CR=43
// <59=>Uart1 : P2.7 For RXD1,P3.4 For TXD1 UART1CR=53
// <60=>Uart1 : P2.7 For RXD1,P2.6 For TXD1 UART1CR=23
// <61=>uart2 : P2.2 For RXD2,P2.1 For TXD2
#define UART_DEFINE 1
// <o><3E><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><D1A1>
// <0=>9600
// <1=>115200
#define UART_BRT 0
#if UART_BRT == 0
#define UART_BPS_H 0x7F
#define UART_BPS_L 0x64
#define UART_BPS_F 0x04
#elif UART_BRT == 1
#define UART_BPS_H 0x7F
#define UART_BPS_L 0xF3
#define UART_BPS_F 0x00
#endif
//*<<< end of configuration section >>>
#if ((UART_DEFINE >= 0)&&(UART_DEFINE<= 30))
#define UartRxEn() INSCON = 0x00; REN = 1; //UART<52><54><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define UartTxEn(TxData) INSCON = 0x00; REN = 0; SBUF = TxData; //UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#elif ((UART_DEFINE >= 31)&&(UART_DEFINE<= 60))
#define UartRxEn() INSCON = 0x40; REN1 = 1; INSCON = 0x00; //UART<52><54><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define UartTxEn(TxData) INSCON = 0x40; REN1 = 0; SBUF1 = TxData; INSCON = 0x00; //UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#elif UART_DEFINE == 61
#define UartRxEn() INSCON = 0x40; REN2 = 1; INSCON = 0x00; //UART<52><54><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define UartTxEn(TxData) INSCON = 0x40; REN2 = 0; SBUF2 = TxData; INSCON = 0x00; //UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#endif
#define IAP_FLG 0x5A
#define ISP_FLG 0xA5
#define IAP_MODE 0
#define ISP_MODE 1
//for 485 communication
#define HEARD1 0x00
#define HEARD2 0x01
#define LENGTH 0x02
#define SOURCE 0x03
#define TARGET 0x04
#define COMMAND 0x05
#define INDEXES 0x06
#define DATA 0x07
#define IAP_BMSID 0x07 //<2F><><EFBFBD>ع<EFBFBD><D8B9><EFBFBD>ϵͳ1
#define IAP_PCID 0x3D //<2F><>λ<EFBFBD><CEBB>ϵͳ
//IAP&ISP Command
#define IAP_CMD_HANDSHAKE 0x06
#define IAP_CMD_BEGIN 0x07
#define IAP_CMD_TRANS 0x08
#define IAP_CMD_VERIFY 0x09
#define IAP_CMD_RESET 0x0A
//CMD_IAP_ACK error
#define IAPERROR_SIZE 0x01 //<2F>̼<EFBFBD><CCBC><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD>Χ
#define IAPERROR_ERASE 0x02 //<2F><><EFBFBD><EFBFBD>flashʧ<68><CAA7>
#define IAPERROR_WR 0x03 //д<><D0B4>flashʧ<68><CAA7>
#define IAPERROR_UNLOCK 0x04 //<2F><><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4><CCAC>δ<EFBFBD><CEB4><EFBFBD>ڿɸ<DABF><C9B8>¹̼<C2B9>״̬
#define IAPERROR_INDEX 0x05 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define IAPERROR_BUSY 0x06 //IAP<41><50>æ
#define IAPERROR_FORM 0x07 //<2F><><EFBFBD>ݸ<EFBFBD>ʽ<EFBFBD><CABD><EFBFBD>󣨷<EFBFBD>8<EFBFBD><38><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define IAPERROR_CRC 0x08 //<2F><><EFBFBD><EFBFBD>У<EFBFBD><D0A3>ʧ<EFBFBD><CAA7>
#define IAPERROR_RESET 0x09 //оƬ<D0BE><C6AC>λʧ<CEBB><CAA7>
#define IAPERROR_HANDSHAKE 0x0A //<2F><><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
#define IAPERROR_CHECKSUM 0x80
#define IAPERROR_ADDR 0x40
#define IAPERROR_CMD 0x30
extern BOOL bIapIspFlg;
extern BOOL bHandsheakOkFlg;
extern void BootIapIsp(void);
#endif