2128 lines
55 KiB
C
2128 lines
55 KiB
C
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/********************************************************************************
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Copyright (C), Sinowealth Electronic. Ltd.
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Author: Sino
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Version: V0.0
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Date: 2020/04/26
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History:
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V2.0 2020/04/26 Preliminary
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********************************************************************************/
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#include "Main.h"
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BOOL bISPFlg; //ISP<53><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ISP<53><50><EFBFBD><EFBFBD>
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BOOL bUart0ReadFlg;
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BOOL bUart0WriteFlg;
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BOOL bUart0SndAckFlg; //UART<52>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD><EFBFBD>ACK<43><4B><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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BOOL bUart1ReadFlg;
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BOOL bUart1WriteFlg;
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BOOL bUart1SndAckFlg; //UART<52>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD><EFBFBD>ACK<43><4B><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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BOOL bUart2ReadFlg;
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BOOL bUart2WriteFlg;
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BOOL bUart2SndAckFlg; //UART<52>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD><EFBFBD>ACK<43><4B><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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U8 xdata ucSubClassID;
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U8 xdata ucUart0Buf[150] _at_ 0x400; //UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>BUF
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U8 xdata ucUart0BufPT; //UART<52><54><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
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U8 xdata ucUart0SndLength; //UART<52><54><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
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U8 xdata ucUart0TimeoutCnt; //UARTͨѶ<CDA8><D1B6>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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U8 xdata ucUart1Buf[150] _at_ 0x4a0; //UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>BUF
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U8 xdata ucUart1BufPT; //UART<52><54><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
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U8 xdata ucUart1SndLength; //UART<52><54><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
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U8 xdata ucUart1TimeoutCnt; //UARTͨѶ<CDA8><D1B6>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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U8 xdata ucUart2Buf[150] _at_ 0x540; //UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>BUF
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U8 xdata ucUart2BufPT; //UART<52><54><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
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U8 xdata ucUart2SndLength; //UART<52><54><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
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U8 xdata ucUart2TimeoutCnt; //UARTͨѶ<CDA8><D1B6>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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U16 xdata uiReceCheckSum; //֡ͷ<D6A1>ж<EFBFBD><D0B6><EFBFBD>ȷ
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U8 xdata ucUartErrCode;
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/*******************************************************************************
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Function: Page1WrRdFuncTable()
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Description:
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Input: NULL
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Output: NULL
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Others: NULL
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*******************************************************************************/
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U16 code Page1WrRdFuncTable[18]=
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{
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SYS_PARA_MAP_ADDR, //SubClassID 0x00
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SYSINFO_MAP_ADDR, //0x01
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CHG_PARA_MAP_ADDR, //0x02
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DSG_PARA_MAP_ADDR, //0x03
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0x00, //0x04
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DSG_PWM_PARA_MAP_ADDR, //0x05
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CHG_TEMP_PARA_MAP_ADDR, //0x06
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DSG_TEMP_PARA_MAP_ADDR, //0x07
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BAL_PARA_MAP_ADDR, //0x08
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SOC_PARA_MAP_ADDR, //0x09
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AFE_PARA_MAP_ADDR, //0x0A
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CALI_PARA_MAP_ADDR, //0x0B
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DataflashCheck_Map_ADDR, //0x0C
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0x00, //0x0D
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0x00, //0x0E
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0x00, //0x0F
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0x00, //0x10
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0x00, //0x11
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};
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/*******************************************************************************
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Function: Page2WrRdFuncTable()
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Description:
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Input: NULL
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Output: NULL
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Others: NULL
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*******************************************************************************/
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U16 code Page2WrRdFuncTable[18]=
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{
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SYS_PARA_MAP_ADDR+32, //SubClassID 0x00
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SYSINFO_MAP_ADDR+32, //0x01
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CHG_PARA_MAP_ADDR+32, //0x02
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DSG_PARA_MAP_ADDR+32, //0x03
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0x00, //0x04
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DSG_PWM_PARA_MAP_ADDR+32, //0x05
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CHG_TEMP_PARA_MAP_ADDR+32, //0x06
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DSG_TEMP_PARA_MAP_ADDR+32, //0x07
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BAL_PARA_MAP_ADDR+32, //0x08
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SOC_PARA_MAP_ADDR+32, //0x09
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AFE_PARA_MAP_ADDR+32, //0x0A
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CALI_PARA_MAP_ADDR+32, //0x0B
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DataflashCheck_Map_ADDR+32, //0x0C
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0x00, //0x0D
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0x00, //0x0E
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0x00, //0x0F
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0x00, //0x10
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0x00, //0x11
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};
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#if (UART0_DEFINE != 0)
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/*************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0Handshake
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART0ͨѶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Э<EFBFBD><EFBFBD>
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*************************************************************************************************/
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void Uart0Handshake(void)
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{
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if(ucUart0Buf[2] == 0x00) //Testing equipment is properly
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{
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Uart0SendAck();
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}
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else
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{
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Uart0SendNack();
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}
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}
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#endif
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#if (UART1_DEFINE != 0)
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/*************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart1Handshake
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART1ͨѶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Э<EFBFBD><EFBFBD>
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*************************************************************************************************/
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void Uart1Handshake(void)
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{
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if(ucUart1Buf[2] == 0x00) //Testing equipment is properly
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{
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Uart1SendAck();
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}
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else
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{
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Uart1SendNack();
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}
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}
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#endif
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#if (UART2_DEFINE != 0)
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/*************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart2Handshake
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART2ͨѶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Э<EFBFBD><EFBFBD>
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*************************************************************************************************/
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void Uart2Handshake(void)
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{
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if(ucUart2Buf[2] == 0x00) //Testing equipment is properly
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{
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Uart2SendAck();
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}
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else
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{
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Uart2SendNack();
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}
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}
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#endif
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#if (UART0_DEFINE != 0)
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/*************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0WriteInfo
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: ptr<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫд<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>ַ
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART0д<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*************************************************************************************************/
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void Uart0WriteInfo(U8 xdata *ptr)
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{
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U8 i;
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if(ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] == CRC8cal(&ucUart0Buf, ucUart0Buf[UART_LENGTH]+3))
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{
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for(i=0; i<ucUart0Buf[UART_LENGTH]; i++)
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{
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McuWDTClear();
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*ptr = ucUart0Buf[3+i];
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ptr++;
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}
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bMcuFlashWrWaitFlg = 1; //Updated parameters, and written to the flash
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bMcuFlashWrWaitCnt = 0;
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Uart0SendAck();
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}
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else
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{
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Uart0SendNack();
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}
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}
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#endif
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#if (UART1_DEFINE != 0)
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/*************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart1WriteInfo
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: ptr<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫд<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>ַ
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART1д<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*************************************************************************************************/
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void Uart1WriteInfo(U8 xdata *ptr)
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{
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U8 i;
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if(ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] == CRC8cal(&ucUart1Buf, ucUart1Buf[UART_LENGTH]+3))
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{
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for(i=0; i<ucUart1Buf[UART_LENGTH]; i++)
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{
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McuWDTClear();
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*ptr = ucUart1Buf[3+i];
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ptr++;
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}
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bMcuFlashWrWaitFlg = 1; //Updated parameters, and written to the flash
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bMcuFlashWrWaitCnt = 0;
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Uart1SendAck();
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}
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else
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{
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Uart1SendNack();
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}
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}
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#endif
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#if (UART2_DEFINE != 0)
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/*************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart2WriteInfo
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: ptr<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫд<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>ַ
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART2д<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*************************************************************************************************/
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void Uart2WriteInfo(U8 xdata *ptr)
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{
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U8 i;
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if(ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] == CRC8cal(&ucUart2Buf, ucUart2Buf[UART_LENGTH]+3))
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{
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for(i=0; i<ucUart2Buf[UART_LENGTH]; i++)
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{
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McuWDTClear();
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*ptr = ucUart2Buf[3+i];
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ptr++;
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}
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bMcuFlashWrWaitFlg = 1; //Updated parameters, and written to the flash
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bMcuFlashWrWaitCnt = 0;
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Uart2SendAck();
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}
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else
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{
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Uart2SendNack();
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}
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}
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#endif
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#if (UART0_DEFINE != 0)
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/*************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0ReadInfo
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: ptr<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>ַ
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*************************************************************************************************/
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void Uart0ReadInfo(U8 xdata *ptr)
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{
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U8 i;
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if(ucUart0Buf[UART_LENGTH] > 140)
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{
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ucUart0Buf[UART_LENGTH] = 0;
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}
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for(i=0; i<ucUart0Buf[UART_LENGTH]; i++)
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{
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McuWDTClear();
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ucUart0Buf[3+i] = *ptr;
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ptr++;
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}
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ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] = CRC8cal(&ucUart0Buf,ucUart0Buf[UART_LENGTH]+3);
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Uart0SendData(); //Start Send Data; Set UART REG
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}
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#endif
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#if (UART1_DEFINE != 0)
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/*************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart1ReadInfo
|
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: ptr<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>ַ
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
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|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART1<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
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|
*************************************************************************************************/
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void Uart1ReadInfo(U8 xdata *ptr)
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{
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U8 i;
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if(ucUart1Buf[UART_LENGTH] > 140)
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{
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ucUart1Buf[UART_LENGTH] = 0;
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}
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for(i=0; i<ucUart1Buf[UART_LENGTH]; i++)
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{
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McuWDTClear();
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ucUart1Buf[3+i] = *ptr;
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ptr++;
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}
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ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] = CRC8cal(&ucUart1Buf,ucUart1Buf[UART_LENGTH]+3);
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Uart1SendData(); //Start Send Data; Set UART REG
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}
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#endif
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#if (UART2_DEFINE != 0)
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/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart2ReadInfo
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: ptr<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>ַ
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART2<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
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|
void Uart2ReadInfo(U8 xdata *ptr)
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|
{
|
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|
U8 i;
|
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|
|
|||
|
if(ucUart2Buf[UART_LENGTH] > 140)
|
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|
{
|
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|
ucUart2Buf[UART_LENGTH] = 0;
|
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|
}
|
|||
|
for(i=0; i<ucUart2Buf[UART_LENGTH]; i++)
|
|||
|
{
|
|||
|
McuWDTClear();
|
|||
|
ucUart2Buf[3+i] = *ptr;
|
|||
|
ptr++;
|
|||
|
}
|
|||
|
ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] = CRC8cal(&ucUart2Buf,ucUart2Buf[UART_LENGTH]+3);
|
|||
|
|
|||
|
Uart2SendData(); //Start Send Data; Set UART REG
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART0_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0WriteManufacture
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD>ͨ<EFBFBD><EFBFBD>UART0д<EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
0x41<EFBFBD><EFBFBD>ϵͳ<EFBFBD><EFBFBD>λ
|
|||
|
0x05<EFBFBD><EFBFBD>ϵͳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>PD
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart0WriteManufacture(void)
|
|||
|
{
|
|||
|
if(ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] == CRC8cal(&ucUart0Buf, ucUart0Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
if(ucUart0Buf[4] == 0x41) //0x0041: Reset system
|
|||
|
{
|
|||
|
ucResetFlag = 0x12;
|
|||
|
}
|
|||
|
else if(ucUart0Buf[4] == 0x05) //0x0005: Enter sleep mode
|
|||
|
{
|
|||
|
bPCEnterPDFlg = 1;
|
|||
|
}
|
|||
|
bUart0SndAckFlg = 0;
|
|||
|
Uart0SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart0SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART1_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart1WriteManufacture
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD>ͨ<EFBFBD><EFBFBD>UART1д<EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
0x41<EFBFBD><EFBFBD>ϵͳ<EFBFBD><EFBFBD>λ
|
|||
|
0x05<EFBFBD><EFBFBD>ϵͳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>PD
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart1WriteManufacture(void)
|
|||
|
{
|
|||
|
if(ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] == CRC8cal(&ucUart1Buf, ucUart1Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
if(ucUart1Buf[4] == 0x41) //0x0041: Reset system
|
|||
|
{
|
|||
|
ucResetFlag = 0x12;
|
|||
|
}
|
|||
|
else if(ucUart1Buf[4] == 0x05) //0x0005: Enter sleep mode
|
|||
|
{
|
|||
|
bPCEnterPDFlg = 1;
|
|||
|
}
|
|||
|
bUart1SndAckFlg = 0;
|
|||
|
Uart1SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart1SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART2_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart2WriteManufacture
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD>ͨ<EFBFBD><EFBFBD>UART2д<EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
0x41<EFBFBD><EFBFBD>ϵͳ<EFBFBD><EFBFBD>λ
|
|||
|
0x05<EFBFBD><EFBFBD>ϵͳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>PD
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart2WriteManufacture(void)
|
|||
|
{
|
|||
|
if(ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] == CRC8cal(&ucUart2Buf, ucUart2Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
if(ucUart2Buf[4] == 0x41) //0x0041: Reset system
|
|||
|
{
|
|||
|
ucResetFlag = 0x12;
|
|||
|
}
|
|||
|
else if(ucUart2Buf[4] == 0x05) //0x0005: Enter sleep mode
|
|||
|
{
|
|||
|
bPCEnterPDFlg = 1;
|
|||
|
}
|
|||
|
bUart2SndAckFlg = 0;
|
|||
|
Uart2SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart2SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART0_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0ReadSubClassID
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart0ReadSubClassID(void)
|
|||
|
{
|
|||
|
if(ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] == CRC8cal(&ucUart0Buf, ucUart0Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
ucSubClassID=ucUart0Buf[3];
|
|||
|
|
|||
|
bUart0SndAckFlg = 0;
|
|||
|
Uart0SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart0SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART1_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart1ReadSubClassID
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART1<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart1ReadSubClassID(void)
|
|||
|
{
|
|||
|
if(ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] == CRC8cal(&ucUart1Buf, ucUart1Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
ucSubClassID=ucUart1Buf[3];
|
|||
|
|
|||
|
bUart1SndAckFlg = 0;
|
|||
|
Uart1SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart1SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART2_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart2ReadSubClassID
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART2<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart2ReadSubClassID(void)
|
|||
|
{
|
|||
|
if(ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] == CRC8cal(&ucUart2Buf, ucUart2Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
ucSubClassID=ucUart2Buf[3];
|
|||
|
|
|||
|
bUart2SndAckFlg = 0;
|
|||
|
Uart2SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart2SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART0_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0RdCmdProcess
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart0RdCmdProcess(void)
|
|||
|
{
|
|||
|
U8 xdata *rdaddr;
|
|||
|
|
|||
|
switch(ucUart0Buf[UART_CMD_NO])
|
|||
|
{
|
|||
|
case CELL1:
|
|||
|
case CELL2:
|
|||
|
case CELL3:
|
|||
|
case CELL4:
|
|||
|
case CELL5:
|
|||
|
case CELL6:
|
|||
|
case CELL7:
|
|||
|
case CELL8:
|
|||
|
case CELL9:
|
|||
|
case CELL10:
|
|||
|
Uart0ReadInfo((U8 xdata *)&Info.uiVCell[ucUart0Buf[UART_CMD_NO]-1]);
|
|||
|
break;
|
|||
|
|
|||
|
case TOTAL_VOLTAGE:
|
|||
|
Uart0ReadInfo((U8 xdata *)&Info.ulVoltage);
|
|||
|
break;
|
|||
|
|
|||
|
case CADC_CURRENT:
|
|||
|
Uart0ReadInfo((U8 xdata *)&Info.slCurr);
|
|||
|
break;
|
|||
|
|
|||
|
case EXT_TEMP1:
|
|||
|
Uart0ReadInfo((U8 xdata *)&Info.uiTS[0]);
|
|||
|
break;
|
|||
|
|
|||
|
case EXT_TEMP2:
|
|||
|
Uart0ReadInfo((U8 xdata *)&Info.uiTS[1]);
|
|||
|
break;
|
|||
|
|
|||
|
case DIE_TEMP1:
|
|||
|
Uart0ReadInfo((U8 xdata *)&Info.uiICTempe[0]);
|
|||
|
break;
|
|||
|
|
|||
|
case DIE_TEMP2:
|
|||
|
Uart0ReadInfo((U8 xdata *)&Info.uiICTempe[1]);
|
|||
|
break;
|
|||
|
|
|||
|
case FULL_CHG_CAP:
|
|||
|
Uart0ReadInfo((U8 xdata *)&Info.ulFCC);
|
|||
|
break;
|
|||
|
|
|||
|
case REMAIN_CAP:
|
|||
|
Uart0ReadInfo((U8 xdata *)&Info.ulRC);
|
|||
|
break;
|
|||
|
|
|||
|
case R_SOC:
|
|||
|
Uart0ReadInfo((U8 xdata *)&Info.uiRSOC);
|
|||
|
break;
|
|||
|
|
|||
|
case CYCLE_COUNT:
|
|||
|
Uart0ReadInfo((U8 xdata *)&Info.uiCycleCount);
|
|||
|
break;
|
|||
|
|
|||
|
case PACK_STATUS:
|
|||
|
Uart0ReadInfo((U8 xdata *)&Info.uiPackStatus);
|
|||
|
break;
|
|||
|
|
|||
|
case BATTERY_STATUS:
|
|||
|
Uart0ReadInfo((U8 xdata *)&Info.uiBatStatus);
|
|||
|
break;
|
|||
|
|
|||
|
case PACK_CONFIG:
|
|||
|
Uart0ReadInfo((U8 xdata *)&Info.uiPackConfig);
|
|||
|
break;
|
|||
|
|
|||
|
case MANUFACTURE_COMMAND:
|
|||
|
Uart0ReadInfo((U8 xdata *)&Info.uiManuCommand);
|
|||
|
break;
|
|||
|
|
|||
|
default: //read extern EEPRom data
|
|||
|
if(ucUart0Buf[UART_LENGTH] >= 128)
|
|||
|
{
|
|||
|
bE2PProcessFlg = 1;
|
|||
|
bUart0E2PRdData = 1;
|
|||
|
}
|
|||
|
else if(ucUart0Buf[UART_CMD_NO] == SUB_PAGE1 && ucSubClassID == RTC_SUBID)
|
|||
|
{
|
|||
|
bE2PProcessFlg = 1;
|
|||
|
bUart0RTCRdTime = 1;
|
|||
|
}
|
|||
|
else if(ucUart0Buf[UART_CMD_NO] == SUB_PAGE1)
|
|||
|
{
|
|||
|
rdaddr = (U8 xdata *)Page1WrRdFuncTable[ucSubClassID];
|
|||
|
Uart0ReadInfo(rdaddr);
|
|||
|
}
|
|||
|
else if(ucUart0Buf[UART_CMD_NO] == SUB_PAGE2)
|
|||
|
{
|
|||
|
rdaddr = (U8 xdata *)Page2WrRdFuncTable[ucSubClassID];
|
|||
|
Uart0ReadInfo(rdaddr);
|
|||
|
}
|
|||
|
break;
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART1_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0RdCmdProcess
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart1RdCmdProcess(void)
|
|||
|
{
|
|||
|
U8 xdata *rdaddr;
|
|||
|
|
|||
|
switch(ucUart1Buf[UART_CMD_NO])
|
|||
|
{
|
|||
|
case CELL1:
|
|||
|
case CELL2:
|
|||
|
case CELL3:
|
|||
|
case CELL4:
|
|||
|
case CELL5:
|
|||
|
case CELL6:
|
|||
|
case CELL7:
|
|||
|
case CELL8:
|
|||
|
case CELL9:
|
|||
|
case CELL10:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.uiVCell[ucUart1Buf[UART_CMD_NO]-1]);
|
|||
|
break;
|
|||
|
|
|||
|
case TOTAL_VOLTAGE:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.ulVoltage);
|
|||
|
break;
|
|||
|
|
|||
|
case CADC_CURRENT:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.slCurr);
|
|||
|
break;
|
|||
|
|
|||
|
case EXT_TEMP1:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.uiTS[0]);
|
|||
|
break;
|
|||
|
|
|||
|
case EXT_TEMP2:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.uiTS[1]);
|
|||
|
break;
|
|||
|
|
|||
|
case DIE_TEMP1:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.uiICTempe[0]);
|
|||
|
break;
|
|||
|
|
|||
|
case DIE_TEMP2:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.uiICTempe[1]);
|
|||
|
break;
|
|||
|
|
|||
|
case FULL_CHG_CAP:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.ulFCC);
|
|||
|
break;
|
|||
|
|
|||
|
case REMAIN_CAP:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.ulRC);
|
|||
|
break;
|
|||
|
|
|||
|
case R_SOC:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.uiRSOC);
|
|||
|
break;
|
|||
|
|
|||
|
case CYCLE_COUNT:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.uiCycleCount);
|
|||
|
break;
|
|||
|
|
|||
|
case PACK_STATUS:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.uiPackStatus);
|
|||
|
break;
|
|||
|
|
|||
|
case BATTERY_STATUS:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.uiBatStatus);
|
|||
|
break;
|
|||
|
|
|||
|
case PACK_CONFIG:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.uiPackConfig);
|
|||
|
break;
|
|||
|
|
|||
|
case MANUFACTURE_COMMAND:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.uiManuCommand);
|
|||
|
break;
|
|||
|
|
|||
|
default: //read extern EEPRom data
|
|||
|
if(ucUart1Buf[UART_LENGTH] >= 128)
|
|||
|
{
|
|||
|
bE2PProcessFlg = 1;
|
|||
|
bUart1E2PRdData = 1;
|
|||
|
}
|
|||
|
else if(ucUart1Buf[UART_CMD_NO] == SUB_PAGE1 && ucSubClassID == RTC_SUBID)
|
|||
|
{
|
|||
|
bE2PProcessFlg = 1;
|
|||
|
bUart1RTCRdTime = 1;
|
|||
|
}
|
|||
|
else if(ucUart1Buf[UART_CMD_NO] == SUB_PAGE1)
|
|||
|
{
|
|||
|
rdaddr = (U8 xdata *)Page1WrRdFuncTable[ucSubClassID];
|
|||
|
Uart1ReadInfo(rdaddr);
|
|||
|
}
|
|||
|
else if(ucUart1Buf[UART_CMD_NO] == SUB_PAGE2)
|
|||
|
{
|
|||
|
rdaddr = (U8 xdata *)Page2WrRdFuncTable[ucSubClassID];
|
|||
|
Uart1ReadInfo(rdaddr);
|
|||
|
}
|
|||
|
break;
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART2_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0RdCmdProcess
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart2RdCmdProcess(void)
|
|||
|
{
|
|||
|
U8 xdata *rdaddr;
|
|||
|
|
|||
|
switch(ucUart2Buf[UART_CMD_NO])
|
|||
|
{
|
|||
|
case CELL1:
|
|||
|
case CELL2:
|
|||
|
case CELL3:
|
|||
|
case CELL4:
|
|||
|
case CELL5:
|
|||
|
case CELL6:
|
|||
|
case CELL7:
|
|||
|
case CELL8:
|
|||
|
case CELL9:
|
|||
|
case CELL10:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.uiVCell[ucUart2Buf[UART_CMD_NO]-1]);
|
|||
|
break;
|
|||
|
|
|||
|
case TOTAL_VOLTAGE:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.ulVoltage);
|
|||
|
break;
|
|||
|
|
|||
|
case CADC_CURRENT:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.slCurr);
|
|||
|
break;
|
|||
|
|
|||
|
case EXT_TEMP1:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.uiTS[0]);
|
|||
|
break;
|
|||
|
|
|||
|
case EXT_TEMP2:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.uiTS[1]);
|
|||
|
break;
|
|||
|
|
|||
|
case DIE_TEMP1:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.uiICTempe[0]);
|
|||
|
break;
|
|||
|
|
|||
|
case DIE_TEMP2:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.uiICTempe[1]);
|
|||
|
break;
|
|||
|
|
|||
|
case FULL_CHG_CAP:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.ulFCC);
|
|||
|
break;
|
|||
|
|
|||
|
case REMAIN_CAP:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.ulRC);
|
|||
|
break;
|
|||
|
|
|||
|
case R_SOC:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.uiRSOC);
|
|||
|
break;
|
|||
|
|
|||
|
case CYCLE_COUNT:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.uiCycleCount);
|
|||
|
break;
|
|||
|
|
|||
|
case PACK_STATUS:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.uiPackStatus);
|
|||
|
break;
|
|||
|
|
|||
|
case BATTERY_STATUS:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.uiBatStatus);
|
|||
|
break;
|
|||
|
|
|||
|
case PACK_CONFIG:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.uiPackConfig);
|
|||
|
break;
|
|||
|
|
|||
|
case MANUFACTURE_COMMAND:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.uiManuCommand);
|
|||
|
break;
|
|||
|
|
|||
|
default: //read extern EEPRom data
|
|||
|
if(ucUart2Buf[UART_LENGTH] >= 128)
|
|||
|
{
|
|||
|
bE2PProcessFlg = 1;
|
|||
|
bUart2E2PRdData = 1;
|
|||
|
}
|
|||
|
else if(ucUart2Buf[UART_CMD_NO] == SUB_PAGE1 && ucSubClassID == RTC_SUBID)
|
|||
|
{
|
|||
|
bE2PProcessFlg = 1;
|
|||
|
bUart2RTCRdTime = 1;
|
|||
|
}
|
|||
|
else if(ucUart2Buf[UART_CMD_NO] == SUB_PAGE1)
|
|||
|
{
|
|||
|
rdaddr = (U8 xdata *)Page1WrRdFuncTable[ucSubClassID];
|
|||
|
Uart2ReadInfo(rdaddr);
|
|||
|
}
|
|||
|
else if(ucUart2Buf[UART_CMD_NO] == SUB_PAGE2)
|
|||
|
{
|
|||
|
rdaddr = (U8 xdata *)Page2WrRdFuncTable[ucSubClassID];
|
|||
|
Uart2ReadInfo(rdaddr);
|
|||
|
}
|
|||
|
break;
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART0_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0CaliCurrent
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART0ͨѶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD>ܵ<EFBFBD>ѹ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart0CaliVoltage(void)
|
|||
|
{
|
|||
|
if(ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] == CRC8cal(&ucUart0Buf, ucUart0Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
ulExtVPack = ((U16)ucUart0Buf[3]<<8)|ucUart0Buf[4];
|
|||
|
|
|||
|
if(!ulExtVPack)
|
|||
|
{
|
|||
|
Uart0SendNack();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
bCaliFlg = 1;
|
|||
|
ucExtcaliSwitch1 |= 0x01;
|
|||
|
Uart0SendAck();
|
|||
|
}
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart0SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART1_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart1CaliCurrent
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART1ͨѶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD>ܵ<EFBFBD>ѹ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart1CaliVoltage(void)
|
|||
|
{
|
|||
|
if(ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] == CRC8cal(&ucUart1Buf, ucUart1Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
ulExtVPack = ((U16)ucUart1Buf[3]<<8)|ucUart1Buf[4];
|
|||
|
|
|||
|
if(!ulExtVPack)
|
|||
|
{
|
|||
|
Uart1SendNack();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
bCaliFlg = 1;
|
|||
|
ucExtcaliSwitch1 |= 0x01;
|
|||
|
Uart1SendAck();
|
|||
|
}
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart1SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART2_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart2CaliCurrent
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART2ͨѶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD>ܵ<EFBFBD>ѹ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart2CaliVoltage(void)
|
|||
|
{
|
|||
|
if(ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] == CRC8cal(&ucUart2Buf, ucUart2Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
ulExtVPack = ((U16)ucUart2Buf[3]<<8)|ucUart2Buf[4];
|
|||
|
|
|||
|
if(!ulExtVPack)
|
|||
|
{
|
|||
|
Uart2SendNack();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
bCaliFlg = 1;
|
|||
|
ucExtcaliSwitch1 |= 0x01;
|
|||
|
Uart2SendAck();
|
|||
|
}
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart2SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART0_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0CaliCurrent<EFBFBD><EFBFBD>Uart0CaliCurOffset
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART0ͨѶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>&Offset<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart0CaliCurrent(void)
|
|||
|
{
|
|||
|
if(ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] == CRC8cal(&ucUart0Buf, ucUart0Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
slExtCur = ((U32)ucUart0Buf[3]<<24)
|
|||
|
| ((U32)ucUart0Buf[4]<<16)
|
|||
|
| ((U32)ucUart0Buf[5]<<8)
|
|||
|
| ((U32)ucUart0Buf[6]);
|
|||
|
|
|||
|
if((!AFE.siCurr) || (!slExtCur))
|
|||
|
{
|
|||
|
Uart0SendNack();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
bCaliFlg = 1;
|
|||
|
ucExtcaliSwitch1 |= 0x10;
|
|||
|
Uart0SendAck();
|
|||
|
}
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart0SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
void Uart0CaliCurOffset(void)
|
|||
|
{
|
|||
|
if(ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] == CRC8cal(&ucUart0Buf, ucUart0Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
bCaliFlg = 1; //Calibration offset Current
|
|||
|
ucExtcaliSwitch1 |= 0x20;
|
|||
|
|
|||
|
Uart0SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart0SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART1_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart1CaliCurrent<EFBFBD><EFBFBD>Uart1CaliCurOffset
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART1ͨѶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>&Offset<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart1CaliCurrent(void)
|
|||
|
{
|
|||
|
if(ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] == CRC8cal(&ucUart1Buf, ucUart1Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
slExtCur = ((U32)ucUart1Buf[3]<<24)
|
|||
|
| ((U32)ucUart1Buf[4]<<16)
|
|||
|
| ((U32)ucUart1Buf[5]<<8)
|
|||
|
| ((U32)ucUart1Buf[6]);
|
|||
|
|
|||
|
if((!AFE.siCurr) || (!slExtCur))
|
|||
|
{
|
|||
|
Uart1SendNack();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
bCaliFlg = 1;
|
|||
|
ucExtcaliSwitch1 |= 0x10;
|
|||
|
Uart1SendAck();
|
|||
|
}
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart1SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
void Uart1CaliCurOffset(void)
|
|||
|
{
|
|||
|
if(ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] == CRC8cal(&ucUart1Buf, ucUart1Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
bCaliFlg = 1; //Calibration offset Current
|
|||
|
ucExtcaliSwitch1 |= 0x20;
|
|||
|
|
|||
|
Uart1SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart1SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART2_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart2CaliCurrent<EFBFBD><EFBFBD>Uart2CaliCurOffset
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART2ͨѶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>&Offset<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart2CaliCurrent(void)
|
|||
|
{
|
|||
|
if(ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] == CRC8cal(&ucUart2Buf, ucUart2Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
slExtCur = ((U32)ucUart2Buf[3]<<24)
|
|||
|
| ((U32)ucUart2Buf[4]<<16)
|
|||
|
| ((U32)ucUart2Buf[5]<<8)
|
|||
|
| ((U32)ucUart2Buf[6]);
|
|||
|
|
|||
|
if((!AFE.siCurr) || (!slExtCur))
|
|||
|
{
|
|||
|
Uart2SendNack();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
bCaliFlg = 1;
|
|||
|
ucExtcaliSwitch1 |= 0x10;
|
|||
|
Uart2SendAck();
|
|||
|
}
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart2SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
void Uart2CaliCurOffset(void)
|
|||
|
{
|
|||
|
if(ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] == CRC8cal(&ucUart2Buf, ucUart2Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
bCaliFlg = 1; //Calibration offset Current
|
|||
|
ucExtcaliSwitch1 |= 0x20;
|
|||
|
|
|||
|
Uart2SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart2SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART0_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0CaliTS1<EFBFBD><EFBFBD>Uart0CaliTS2
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART0ͨѶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>УTS1/TS2<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart0CaliTS1(void)
|
|||
|
{
|
|||
|
if(ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] == CRC8cal(&ucUart0Buf, ucUart0Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
bCaliFlg = 1; //Calibration TS1
|
|||
|
uiExtTemp1 = ((U16)ucUart0Buf[3]<<8)|ucUart0Buf[4];
|
|||
|
ucExtcaliSwitch1 |= 0x04;
|
|||
|
|
|||
|
Uart0SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart0SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
void Uart0CaliTS2(void)
|
|||
|
{
|
|||
|
if(ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] == CRC8cal(&ucUart0Buf, ucUart0Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
bCaliFlg = 1; //Calibration TS2
|
|||
|
uiExtTemp2 = ((U16)ucUart0Buf[3]<<8)|ucUart0Buf[4];
|
|||
|
ucExtcaliSwitch1 |= 0x08;
|
|||
|
|
|||
|
Uart0SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart0SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART1_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart1CaliTS1<EFBFBD><EFBFBD>Uart1CaliTS2
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART1ͨѶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>УTS1/TS2<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart1CaliTS1(void)
|
|||
|
{
|
|||
|
if(ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] == CRC8cal(&ucUart1Buf, ucUart1Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
bCaliFlg = 1; //Calibration TS1
|
|||
|
uiExtTemp1 = ((U16)ucUart1Buf[3]<<8)|ucUart1Buf[4];
|
|||
|
ucExtcaliSwitch1 |= 0x04;
|
|||
|
|
|||
|
Uart1SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart1SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
void Uart1CaliTS2(void)
|
|||
|
{
|
|||
|
if(ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] == CRC8cal(&ucUart1Buf, ucUart1Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
bCaliFlg = 1; //Calibration TS2
|
|||
|
uiExtTemp2 = ((U16)ucUart1Buf[3]<<8)|ucUart1Buf[4];
|
|||
|
ucExtcaliSwitch1 |= 0x08;
|
|||
|
|
|||
|
Uart1SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart1SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART2_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart2CaliTS1<EFBFBD><EFBFBD>Uart2CaliTS2
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART2ͨѶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>УTS1/TS2<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart2CaliTS1(void)
|
|||
|
{
|
|||
|
if(ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] == CRC8cal(&ucUart2Buf, ucUart2Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
bCaliFlg = 1; //Calibration TS1
|
|||
|
uiExtTemp1 = ((U16)ucUart2Buf[3]<<8)|ucUart2Buf[4];
|
|||
|
ucExtcaliSwitch1 |= 0x04;
|
|||
|
|
|||
|
Uart2SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart2SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
void Uart2CaliTS2(void)
|
|||
|
{
|
|||
|
if(ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] == CRC8cal(&ucUart2Buf, ucUart2Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
bCaliFlg = 1; //Calibration TS2
|
|||
|
uiExtTemp2 = ((U16)ucUart2Buf[3]<<8)|ucUart2Buf[4];
|
|||
|
ucExtcaliSwitch1 |= 0x08;
|
|||
|
|
|||
|
Uart2SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart2SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART0_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0CaliRTC
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART0ͨѶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>УRTC<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart0CaliRTC(void)
|
|||
|
{
|
|||
|
U8 i;
|
|||
|
|
|||
|
if(ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] == CRC8cal(&ucUart0Buf, ucUart0Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
for(i=0; i<7; i++)
|
|||
|
{
|
|||
|
ucExtRTC[i] = ucUart0Buf[3+i];
|
|||
|
}
|
|||
|
bCaliFlg = 1;
|
|||
|
ucExtcaliSwitch1 |= 0x80;
|
|||
|
Uart0SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart0SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART1_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart1CaliRTC
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART1ͨѶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>УRTC<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart1CaliRTC(void)
|
|||
|
{
|
|||
|
U8 i;
|
|||
|
|
|||
|
if(ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] == CRC8cal(&ucUart1Buf, ucUart1Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
for(i=0; i<7; i++)
|
|||
|
{
|
|||
|
ucExtRTC[i] = ucUart1Buf[3+i];
|
|||
|
}
|
|||
|
bCaliFlg = 1;
|
|||
|
ucExtcaliSwitch1 |= 0x80;
|
|||
|
Uart1SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart1SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART2_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart2CaliRTC
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART2ͨѶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>УRTC<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart2CaliRTC(void)
|
|||
|
{
|
|||
|
U8 i;
|
|||
|
|
|||
|
if(ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] == CRC8cal(&ucUart2Buf, ucUart2Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
for(i=0; i<7; i++)
|
|||
|
{
|
|||
|
ucExtRTC[i] = ucUart2Buf[3+i];
|
|||
|
}
|
|||
|
bCaliFlg = 1;
|
|||
|
ucExtcaliSwitch1 |= 0x80;
|
|||
|
Uart2SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart2SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART0_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0WrCmdProcess
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART0д<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart0WrCmdProcess(void)
|
|||
|
{
|
|||
|
U8 xdata *rdaddr;
|
|||
|
switch(ucUart0Buf[UART_CMD_NO])
|
|||
|
{
|
|||
|
case MANUFACTURE_COMMAND:
|
|||
|
Uart0WriteManufacture();
|
|||
|
break;
|
|||
|
case DATA_FLASH_COMMAND:
|
|||
|
Uart0ReadSubClassID(); //accept command is dataflashcommand 0x77
|
|||
|
break;
|
|||
|
case CALI_CUR_COMMAND:
|
|||
|
Uart0CaliCurrent();
|
|||
|
break;
|
|||
|
case CALI_VOL_COMMAND:
|
|||
|
Uart0CaliVoltage();
|
|||
|
break;
|
|||
|
case CALI_ZERO_CUR_COMMAND:
|
|||
|
Uart0CaliCurOffset();
|
|||
|
break;
|
|||
|
case CALI_TS1_COMMAND:
|
|||
|
Uart0CaliTS1();
|
|||
|
break;
|
|||
|
case CALI_TS2_COMMAND:
|
|||
|
Uart0CaliTS2();
|
|||
|
break;
|
|||
|
|
|||
|
case CALI_RTC_COMMAND:
|
|||
|
Uart0CaliRTC();
|
|||
|
break;
|
|||
|
case SUB_PAGE1:
|
|||
|
rdaddr = (U8 xdata *)Page1WrRdFuncTable[ucSubClassID];
|
|||
|
Uart0WriteInfo(rdaddr);
|
|||
|
break;
|
|||
|
case SUB_PAGE2:
|
|||
|
rdaddr = (U8 xdata *)Page2WrRdFuncTable[ucSubClassID];
|
|||
|
Uart0WriteInfo(rdaddr);
|
|||
|
break;
|
|||
|
|
|||
|
case CMD_E2PROM_ERASE:
|
|||
|
if(ucUart0Buf[UART_DATA] == 0x55) //Testing equipment is properly
|
|||
|
{
|
|||
|
bE2PProcessFlg = 1;
|
|||
|
bE2PErase = 1;
|
|||
|
Uart0SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart0SendNack();
|
|||
|
}
|
|||
|
break;
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART1_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart1WrCmdProcess
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART1д<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart1WrCmdProcess(void)
|
|||
|
{
|
|||
|
U8 xdata *rdaddr;
|
|||
|
switch(ucUart1Buf[UART_CMD_NO])
|
|||
|
{
|
|||
|
case MANUFACTURE_COMMAND:
|
|||
|
Uart1WriteManufacture();
|
|||
|
break;
|
|||
|
case DATA_FLASH_COMMAND:
|
|||
|
Uart1ReadSubClassID(); //accept command is dataflashcommand 0x77
|
|||
|
break;
|
|||
|
case CALI_CUR_COMMAND:
|
|||
|
Uart1CaliCurrent();
|
|||
|
break;
|
|||
|
case CALI_VOL_COMMAND:
|
|||
|
Uart1CaliVoltage();
|
|||
|
break;
|
|||
|
case CALI_ZERO_CUR_COMMAND:
|
|||
|
Uart1CaliCurOffset();
|
|||
|
break;
|
|||
|
case CALI_TS1_COMMAND:
|
|||
|
Uart1CaliTS1();
|
|||
|
break;
|
|||
|
case CALI_TS2_COMMAND:
|
|||
|
Uart1CaliTS2();
|
|||
|
break;
|
|||
|
|
|||
|
case CALI_RTC_COMMAND:
|
|||
|
Uart1CaliRTC();
|
|||
|
break;
|
|||
|
case SUB_PAGE1:
|
|||
|
rdaddr = (U8 xdata *)Page1WrRdFuncTable[ucSubClassID];
|
|||
|
Uart1WriteInfo(rdaddr);
|
|||
|
break;
|
|||
|
case SUB_PAGE2:
|
|||
|
rdaddr = (U8 xdata *)Page2WrRdFuncTable[ucSubClassID];
|
|||
|
Uart1WriteInfo(rdaddr);
|
|||
|
break;
|
|||
|
|
|||
|
case CMD_E2PROM_ERASE:
|
|||
|
if(ucUart1Buf[UART_DATA] == 0x55) //Testing equipment is properly
|
|||
|
{
|
|||
|
bE2PProcessFlg = 1;
|
|||
|
bE2PErase = 1;
|
|||
|
Uart1SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart1SendNack();
|
|||
|
}
|
|||
|
break;
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART2_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart2WrCmdProcess
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART2д<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart2WrCmdProcess(void)
|
|||
|
{
|
|||
|
U8 xdata *rdaddr;
|
|||
|
switch(ucUart2Buf[UART_CMD_NO])
|
|||
|
{
|
|||
|
case MANUFACTURE_COMMAND:
|
|||
|
Uart2WriteManufacture();
|
|||
|
break;
|
|||
|
case DATA_FLASH_COMMAND:
|
|||
|
Uart2ReadSubClassID(); //accept command is dataflashcommand 0x77
|
|||
|
break;
|
|||
|
case CALI_CUR_COMMAND:
|
|||
|
Uart2CaliCurrent();
|
|||
|
break;
|
|||
|
case CALI_VOL_COMMAND:
|
|||
|
Uart2CaliVoltage();
|
|||
|
break;
|
|||
|
case CALI_ZERO_CUR_COMMAND:
|
|||
|
Uart2CaliCurOffset();
|
|||
|
break;
|
|||
|
case CALI_TS1_COMMAND:
|
|||
|
Uart2CaliTS1();
|
|||
|
break;
|
|||
|
case CALI_TS2_COMMAND:
|
|||
|
Uart2CaliTS2();
|
|||
|
break;
|
|||
|
|
|||
|
case CALI_RTC_COMMAND:
|
|||
|
Uart2CaliRTC();
|
|||
|
break;
|
|||
|
case SUB_PAGE1:
|
|||
|
rdaddr = (U8 xdata *)Page1WrRdFuncTable[ucSubClassID];
|
|||
|
Uart2WriteInfo(rdaddr);
|
|||
|
break;
|
|||
|
case SUB_PAGE2:
|
|||
|
rdaddr = (U8 xdata *)Page2WrRdFuncTable[ucSubClassID];
|
|||
|
Uart2WriteInfo(rdaddr);
|
|||
|
break;
|
|||
|
|
|||
|
case CMD_E2PROM_ERASE:
|
|||
|
if(ucUart2Buf[UART_DATA] == 0x55) //Testing equipment is properly
|
|||
|
{
|
|||
|
bE2PProcessFlg = 1;
|
|||
|
bE2PErase = 1;
|
|||
|
Uart2SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart2SendNack();
|
|||
|
}
|
|||
|
break;
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART0_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0IapCheckHandshake
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: IAP<EFBFBD><EFBFBD>ISP<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Э<EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart0IapCheckHandshake(void)
|
|||
|
{
|
|||
|
U8 i, databak;
|
|||
|
U16 checksum = 0;
|
|||
|
|
|||
|
if(ucUart0BufPT == 2)
|
|||
|
{
|
|||
|
if(ucUart0Buf[HEARD2] != 0xA5)
|
|||
|
{
|
|||
|
ucUart0BufPT = 0;
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
uiReceCheckSum = 0; //֡ͷ<D6A1>ж<EFBFBD><D0B6><EFBFBD>ȷ
|
|||
|
ucUartErrCode = 0;
|
|||
|
}
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
if(ucUart0BufPT < (ucUart0Buf[LENGTH]+9))
|
|||
|
{
|
|||
|
if(ucUart0BufPT <= (ucUart0Buf[LENGTH]+7))
|
|||
|
{
|
|||
|
uiReceCheckSum += ucUart0Buf[ucUart0BufPT-1];
|
|||
|
}
|
|||
|
if(ucUart0BufPT == (TARGET+1)) //<2F><><EFBFBD><EFBFBD>ID
|
|||
|
{
|
|||
|
if(ucUart0Buf[TARGET] != IAP_BMSID)
|
|||
|
{
|
|||
|
ucUart0BufPT = 0;
|
|||
|
}
|
|||
|
}
|
|||
|
else if(ucUart0BufPT == (COMMAND+1)) //<2F><><EFBFBD><EFBFBD>COMMAND
|
|||
|
{
|
|||
|
if((ucUart0Buf[COMMAND] != IAP_CMD_HANDSHAKE))
|
|||
|
{
|
|||
|
ucUartErrCode |= IAPERROR_CMD;
|
|||
|
}
|
|||
|
}
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
ucUart0BufPT = 0;
|
|||
|
if(uiReceCheckSum != ((ucUart0Buf[ucUart0Buf[LENGTH]+8]<<8) + ucUart0Buf[ucUart0Buf[LENGTH]+7]))
|
|||
|
{
|
|||
|
ucUartErrCode |= IAPERROR_CHECKSUM;
|
|||
|
}
|
|||
|
|
|||
|
if(ucUartErrCode != 0) //<2F><><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EEB4A6>
|
|||
|
{
|
|||
|
ucUart0Buf[INDEXES] = ucUartErrCode;
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
bISPFlg = 1; //<2F><>ת<EFBFBD><D7AA>BOOT<4F><54>
|
|||
|
ucUart0Buf[INDEXES] = 0;
|
|||
|
}
|
|||
|
|
|||
|
ucUart0Buf[LENGTH] = 0;
|
|||
|
ucUart0Buf[COMMAND] = 0x0B;
|
|||
|
|
|||
|
databak = ucUart0Buf[SOURCE]; //<2F><><EFBFBD><EFBFBD>ԴID<49><44>Ŀ<EFBFBD><C4BF>ID
|
|||
|
ucUart0Buf[SOURCE] = ucUart0Buf[TARGET];
|
|||
|
ucUart0Buf[TARGET] = databak;
|
|||
|
|
|||
|
for(i=2; i<(ucUart0Buf[LENGTH]+7); i++)
|
|||
|
{
|
|||
|
checksum += ucUart0Buf[i];
|
|||
|
}
|
|||
|
|
|||
|
ucUart0Buf[7+ucUart0Buf[LENGTH]] = checksum%256;
|
|||
|
ucUart0Buf[8+ucUart0Buf[LENGTH]] = checksum/256;
|
|||
|
|
|||
|
Uart0SendAck();
|
|||
|
}
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART1_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart1IapCheckHandshake
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: IAP<EFBFBD><EFBFBD>ISP<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Э<EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart1IapCheckHandshake(void)
|
|||
|
{
|
|||
|
U8 i, databak;
|
|||
|
U16 checksum = 0;
|
|||
|
|
|||
|
if(ucUart1BufPT == 2)
|
|||
|
{
|
|||
|
if(ucUart1Buf[HEARD2] != 0xA5)
|
|||
|
{
|
|||
|
ucUart1BufPT = 0;
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
uiReceCheckSum = 0; //֡ͷ<D6A1>ж<EFBFBD><D0B6><EFBFBD>ȷ
|
|||
|
ucUartErrCode = 0;
|
|||
|
}
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
if(ucUart1BufPT < (ucUart1Buf[LENGTH]+9))
|
|||
|
{
|
|||
|
if(ucUart1BufPT <= (ucUart1Buf[LENGTH]+7))
|
|||
|
{
|
|||
|
uiReceCheckSum += ucUart1Buf[ucUart1BufPT-1];
|
|||
|
}
|
|||
|
if(ucUart1BufPT == (TARGET+1)) //<2F><><EFBFBD><EFBFBD>ID
|
|||
|
{
|
|||
|
if(ucUart1Buf[TARGET] != IAP_BMSID)
|
|||
|
{
|
|||
|
ucUart1BufPT = 0;
|
|||
|
}
|
|||
|
}
|
|||
|
else if(ucUart1BufPT == (COMMAND+1)) //<2F><><EFBFBD><EFBFBD>COMMAND
|
|||
|
{
|
|||
|
if((ucUart1Buf[COMMAND] != IAP_CMD_HANDSHAKE))
|
|||
|
{
|
|||
|
ucUartErrCode |= IAPERROR_CMD;
|
|||
|
}
|
|||
|
}
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
ucUart1BufPT = 0;
|
|||
|
if(uiReceCheckSum != ((ucUart1Buf[ucUart1Buf[LENGTH]+8]<<8) + ucUart1Buf[ucUart1Buf[LENGTH]+7]))
|
|||
|
{
|
|||
|
ucUartErrCode |= IAPERROR_CHECKSUM;
|
|||
|
}
|
|||
|
|
|||
|
if(ucUartErrCode != 0) //<2F><><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EEB4A6>
|
|||
|
{
|
|||
|
ucUart1Buf[INDEXES] = ucUartErrCode;
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
bISPFlg = 1; //<2F><>ת<EFBFBD><D7AA>BOOT<4F><54>
|
|||
|
ucUart1Buf[INDEXES] = 0;
|
|||
|
}
|
|||
|
|
|||
|
ucUart1Buf[LENGTH] = 0;
|
|||
|
ucUart1Buf[COMMAND] = 0x0B;
|
|||
|
|
|||
|
databak = ucUart1Buf[SOURCE]; //<2F><><EFBFBD><EFBFBD>ԴID<49><44>Ŀ<EFBFBD><C4BF>ID
|
|||
|
ucUart1Buf[SOURCE] = ucUart1Buf[TARGET];
|
|||
|
ucUart1Buf[TARGET] = databak;
|
|||
|
|
|||
|
for(i=2; i<(ucUart1Buf[LENGTH]+7); i++)
|
|||
|
{
|
|||
|
checksum += ucUart1Buf[i];
|
|||
|
}
|
|||
|
|
|||
|
ucUart1Buf[7+ucUart1Buf[LENGTH]] = checksum%256;
|
|||
|
ucUart1Buf[8+ucUart1Buf[LENGTH]] = checksum/256;
|
|||
|
|
|||
|
Uart1SendAck();
|
|||
|
}
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART2_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart2IapCheckHandshake
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: IAP<EFBFBD><EFBFBD>ISP<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Э<EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart2IapCheckHandshake(void)
|
|||
|
{
|
|||
|
U8 i, databak;
|
|||
|
U16 checksum = 0;
|
|||
|
|
|||
|
if(ucUart2BufPT == 2)
|
|||
|
{
|
|||
|
if(ucUart2Buf[HEARD2] != 0xA5)
|
|||
|
{
|
|||
|
ucUart2BufPT = 0;
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
uiReceCheckSum = 0; //֡ͷ<D6A1>ж<EFBFBD><D0B6><EFBFBD>ȷ
|
|||
|
ucUartErrCode = 0;
|
|||
|
}
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
if(ucUart2BufPT < (ucUart2Buf[LENGTH]+9))
|
|||
|
{
|
|||
|
if(ucUart2BufPT <= (ucUart2Buf[LENGTH]+7))
|
|||
|
{
|
|||
|
uiReceCheckSum += ucUart2Buf[ucUart2BufPT-1];
|
|||
|
}
|
|||
|
if(ucUart2BufPT == (TARGET+1)) //<2F><><EFBFBD><EFBFBD>ID
|
|||
|
{
|
|||
|
if(ucUart2Buf[TARGET] != IAP_BMSID)
|
|||
|
{
|
|||
|
ucUart2BufPT = 0;
|
|||
|
}
|
|||
|
}
|
|||
|
else if(ucUart2BufPT == (COMMAND+1)) //<2F><><EFBFBD><EFBFBD>COMMAND
|
|||
|
{
|
|||
|
if((ucUart2Buf[COMMAND] != IAP_CMD_HANDSHAKE))
|
|||
|
{
|
|||
|
ucUartErrCode |= IAPERROR_CMD;
|
|||
|
}
|
|||
|
}
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
ucUart2BufPT = 0;
|
|||
|
if(uiReceCheckSum != ((ucUart2Buf[ucUart2Buf[LENGTH]+8]<<8) + ucUart2Buf[ucUart2Buf[LENGTH]+7]))
|
|||
|
{
|
|||
|
ucUartErrCode |= IAPERROR_CHECKSUM;
|
|||
|
}
|
|||
|
|
|||
|
if(ucUartErrCode != 0) //<2F><><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EEB4A6>
|
|||
|
{
|
|||
|
ucUart2Buf[INDEXES] = ucUartErrCode;
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
bISPFlg = 1; //<2F><>ת<EFBFBD><D7AA>BOOT<4F><54>
|
|||
|
ucUart2Buf[INDEXES] = 0;
|
|||
|
}
|
|||
|
|
|||
|
ucUart2Buf[LENGTH] = 0;
|
|||
|
ucUart2Buf[COMMAND] = 0x0B;
|
|||
|
|
|||
|
databak = ucUart2Buf[SOURCE]; //<2F><><EFBFBD><EFBFBD>ԴID<49><44>Ŀ<EFBFBD><C4BF>ID
|
|||
|
ucUart2Buf[SOURCE] = ucUart2Buf[TARGET];
|
|||
|
ucUart2Buf[TARGET] = databak;
|
|||
|
|
|||
|
for(i=2; i<(ucUart2Buf[LENGTH]+7); i++)
|
|||
|
{
|
|||
|
checksum += ucUart2Buf[i];
|
|||
|
}
|
|||
|
|
|||
|
ucUart2Buf[7+ucUart2Buf[LENGTH]] = checksum%256;
|
|||
|
ucUart2Buf[8+ucUart2Buf[LENGTH]] = checksum/256;
|
|||
|
|
|||
|
Uart2SendAck();
|
|||
|
}
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART0_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: InterruptUart0AppRx
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: RxData<EFBFBD><EFBFBD>Uart0<EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD><EFBFBD><EFBFBD>SBUF0<EFBFBD><EFBFBD>ȡ
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڣ<EFBFBD><EFBFBD>жϴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>øú<EFBFBD><EFBFBD><EFBFBD>
|
|||
|
ucUart0Buf[0]--Slave Addr
|
|||
|
ucUart0Buf[1]--CMD No.
|
|||
|
ucUart0Buf[2]--Offset
|
|||
|
ucUart0Buf[3]--Data Length
|
|||
|
ucUart0Buf[4...]--Data
|
|||
|
*************************************************************************************************/
|
|||
|
void InterruptUart0AppRx(U8 RxData)
|
|||
|
{
|
|||
|
ucUart0Buf[ucUart0BufPT] = RxData;
|
|||
|
ucUart0BufPT++;
|
|||
|
if(ucUart0BufPT >= 140)
|
|||
|
{
|
|||
|
ucUart0BufPT = 0;
|
|||
|
}
|
|||
|
if(ucUart0BufPT == 1)
|
|||
|
{
|
|||
|
if((ucUart0Buf[UART_SLAVE_ADDR]&0xFE) == SADDR) //<2F><><EFBFBD>յĵ<D5B5>һ<EFBFBD><D2BB><EFBFBD>ֽ<EFBFBD><D6BD>Ƿ<EFBFBD><C7B7><EFBFBD>UART<52><54>ַƥ<D6B7><C6A5>
|
|||
|
{
|
|||
|
if((ucUart0Buf[UART_SLAVE_ADDR]&0x01)==0) //bit7<74><37>R/W<><57>־<EFBFBD><D6BE>0--R, 1--W
|
|||
|
{
|
|||
|
bUart0ReadFlg = 1;
|
|||
|
bUart0WriteFlg = 0;
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
bUart0WriteFlg = 1;
|
|||
|
bUart0ReadFlg = 0;
|
|||
|
}
|
|||
|
}
|
|||
|
else if(ucUart0Buf[HEARD1] != 0x5A) //<2F>ж<EFBFBD><D0B6>Ƿ<EFBFBD>ΪIAP/ISP<53><50><EFBFBD><EFBFBD>ʼ֡
|
|||
|
{
|
|||
|
ucUart0BufPT = 0; //<2F><><EFBFBD><EFBFBD>֡ͷ<D6A1><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λָ<CEBB><D6B8>
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
if(bUart0ReadFlg)
|
|||
|
{
|
|||
|
if(ucUart0BufPT==3)
|
|||
|
{
|
|||
|
Uart0RdCmdProcess(); //Read the command process
|
|||
|
}
|
|||
|
}
|
|||
|
else if(bUart0WriteFlg)
|
|||
|
{
|
|||
|
if(ucUart0BufPT > (ucUart0Buf[UART_LENGTH]+3)) //If a write operation, and complete all the data has been received
|
|||
|
{
|
|||
|
Uart0WrCmdProcess(); //Write the command peocess
|
|||
|
bUart0WriteFlg = 0; //PC write MCU communiaction over
|
|||
|
ucUart0BufPT = 0;
|
|||
|
}
|
|||
|
}
|
|||
|
else //<2F>Ƕ<EFBFBD><C7B6><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ΪISP<53><50><EFBFBD><EFBFBD>IAP<41><50>begin<69><6E><EFBFBD><EFBFBD>
|
|||
|
{
|
|||
|
Uart0IapCheckHandshake();
|
|||
|
}
|
|||
|
bUart0SndAckFlg = 0;
|
|||
|
|
|||
|
ucSleepTimerCnt = 0; //UART<52><54><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><CDB9>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>UART<52><54>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
|||
|
ucPDTimerCnt = 0;
|
|||
|
ucUart0TimeoutCnt = 0;
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: InterruptUart0AppTx
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڣ<EFBFBD><EFBFBD>жϴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>øú<EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void InterruptUart0AppTx(void)
|
|||
|
{
|
|||
|
if((ucUart0Buf[HEARD1] == 0x5A) && (ucUart0Buf[HEARD2] == 0xA5) || bISPFlg)
|
|||
|
{
|
|||
|
if(ucUart0BufPT >= (ucUart0Buf[LENGTH]+8))
|
|||
|
{
|
|||
|
Uart0RxEn(); //Allow UART receive data
|
|||
|
ucUart0BufPT = 0;
|
|||
|
bUart0ReadFlg = 0; //PC read MCU communication over
|
|||
|
ucUart0Buf[0] = 0;
|
|||
|
ucUart0Buf[1] = 0;
|
|||
|
ucUart0Buf[2] = 0;
|
|||
|
ucUart0Buf[3] = 0;
|
|||
|
bUart0SndAckFlg = 1;
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
ucUart0BufPT++;
|
|||
|
Uart0TxEn(ucUart0Buf[ucUart0BufPT]); //20220620
|
|||
|
}
|
|||
|
}
|
|||
|
else if((ucUart0BufPT==0) || (ucUart0BufPT>=ucUart0Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
Uart0RxEn(); //UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
ucUart0BufPT = 0;
|
|||
|
bUart0ReadFlg = 0;
|
|||
|
ucUart0Buf[0] = 0;
|
|||
|
ucUart0Buf[1] = 0;
|
|||
|
ucUart0Buf[2] = 0;
|
|||
|
ucUart0Buf[3] = 0;
|
|||
|
bUart0SndAckFlg = 1; //UART<52>ѷ<EFBFBD><D1B7><EFBFBD><CDB9><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD>ACK<43><4B><EFBFBD>ܽ<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĺ<EFBFBD><C4B9><EFBFBD>
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
ucUart0BufPT++;
|
|||
|
Uart0TxEn(ucUart0Buf[ucUart0BufPT]);
|
|||
|
}
|
|||
|
|
|||
|
ucSleepTimerCnt = 0; //UART<52><54><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><CDB9>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>UART<52><54>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
|||
|
ucPDTimerCnt = 0;
|
|||
|
ucUart0TimeoutCnt = 0;
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: InterruptUart0AppTx
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڣ<EFBFBD><EFBFBD>жϴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>øú<EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart0Check(void)
|
|||
|
{
|
|||
|
if(++ucUart0TimeoutCnt >= 4) //<2F><><EFBFBD><EFBFBD>4*50mSû<53><C3BB>UARTͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λָ<CEBB><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
|||
|
{
|
|||
|
ucUart0TimeoutCnt = 0;
|
|||
|
ucUart0BufPT = 0;
|
|||
|
Uart0RxEn(); //UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART1_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: InterruptUart1AppRx
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: RxData<EFBFBD><EFBFBD>Uart1<EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD><EFBFBD><EFBFBD>SBUF1<EFBFBD><EFBFBD>ȡ
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART1<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڣ<EFBFBD><EFBFBD>жϴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>øú<EFBFBD><EFBFBD><EFBFBD>
|
|||
|
ucUart1Buf[0]--Slave Addr
|
|||
|
ucUart1Buf[1]--CMD No.
|
|||
|
ucUart1Buf[2]--Offset
|
|||
|
ucUart1Buf[3]--Data Length
|
|||
|
ucUart1Buf[4...]--Data
|
|||
|
*************************************************************************************************/
|
|||
|
void InterruptUart1AppRx(U8 RxData)
|
|||
|
{
|
|||
|
ucUart1Buf[ucUart1BufPT] = RxData;
|
|||
|
ucUart1BufPT++;
|
|||
|
if(ucUart1BufPT >= 140)
|
|||
|
{
|
|||
|
ucUart1BufPT = 0;
|
|||
|
}
|
|||
|
if(ucUart1BufPT == 1)
|
|||
|
{
|
|||
|
McuBank1Sel();
|
|||
|
if((ucUart1Buf[UART_SLAVE_ADDR]&0xFE) == SADDR1) //<2F><><EFBFBD>յĵ<D5B5>һ<EFBFBD><D2BB><EFBFBD>ֽ<EFBFBD><D6BD>Ƿ<EFBFBD><C7B7><EFBFBD>UART<52><54>ַƥ<D6B7><C6A5>
|
|||
|
{
|
|||
|
McuBank0Sel();
|
|||
|
if((ucUart1Buf[UART_SLAVE_ADDR]&0x01)==0) //bit7<74><37>R/W<><57>־<EFBFBD><D6BE>0--R, 1--W
|
|||
|
{
|
|||
|
bUart1ReadFlg = 1;
|
|||
|
bUart1WriteFlg = 0;
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
bUart1WriteFlg = 1;
|
|||
|
bUart1ReadFlg = 0;
|
|||
|
}
|
|||
|
}
|
|||
|
else if(ucUart1Buf[HEARD1] != 0x5A) //<2F>ж<EFBFBD><D0B6>Ƿ<EFBFBD>ΪIAP/ISP<53><50><EFBFBD><EFBFBD>ʼ֡
|
|||
|
{
|
|||
|
ucUart1BufPT = 0; //<2F><><EFBFBD><EFBFBD>֡ͷ<D6A1><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λָ<CEBB><D6B8>
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
if(bUart1ReadFlg)
|
|||
|
{
|
|||
|
if(ucUart1BufPT==3)
|
|||
|
{
|
|||
|
Uart1RdCmdProcess(); //Read the command process
|
|||
|
}
|
|||
|
}
|
|||
|
else if (bUart1WriteFlg)
|
|||
|
{
|
|||
|
if(ucUart1BufPT > (ucUart1Buf[UART_LENGTH]+3)) //If a write operation, and complete all the data has been received
|
|||
|
{
|
|||
|
Uart1WrCmdProcess(); //Write the command peocess
|
|||
|
bUart1WriteFlg = 0; //PC write MCU communiaction over
|
|||
|
ucUart1BufPT = 0;
|
|||
|
}
|
|||
|
}
|
|||
|
else //<2F>Ƕ<EFBFBD><C7B6><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ΪISP<53><50><EFBFBD><EFBFBD>IAP<41><50>begin<69><6E><EFBFBD><EFBFBD>
|
|||
|
{
|
|||
|
Uart1IapCheckHandshake();
|
|||
|
}
|
|||
|
bUart1SndAckFlg = 0;
|
|||
|
|
|||
|
ucSleepTimerCnt = 0; //UART<52><54><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><CDB9>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>UART<52><54>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
|||
|
ucPDTimerCnt = 0;
|
|||
|
ucUart1TimeoutCnt = 0;
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: InterruptUart1AppTx
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART1<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڣ<EFBFBD><EFBFBD>жϴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>øú<EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void InterruptUart1AppTx(void)
|
|||
|
{
|
|||
|
if((ucUart1Buf[HEARD1] == 0x5A) && (ucUart1Buf[HEARD2] == 0xA5) || bISPFlg)
|
|||
|
{
|
|||
|
if(ucUart1BufPT >= (ucUart1Buf[LENGTH]+8))
|
|||
|
{
|
|||
|
Uart1RxEn(); //Allow UART receive data
|
|||
|
ucUart1BufPT = 0;
|
|||
|
bUart1ReadFlg = 0; //PC read MCU communication over
|
|||
|
ucUart1Buf[0] = 0;
|
|||
|
ucUart1Buf[1] = 0;
|
|||
|
ucUart1Buf[2] = 0;
|
|||
|
ucUart1Buf[3] = 0;
|
|||
|
bUart1SndAckFlg = 1;
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
ucUart1BufPT++;
|
|||
|
Uart1TxEn(ucUart1Buf[ucUart1BufPT]); //20220620
|
|||
|
}
|
|||
|
}
|
|||
|
else if((ucUart1BufPT==0) || (ucUart1BufPT>=ucUart1Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
Uart1RxEn(); //UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
ucUart1BufPT = 0;
|
|||
|
bUart1ReadFlg = 0;
|
|||
|
ucUart1Buf[0] = 0;
|
|||
|
ucUart1Buf[1] = 0;
|
|||
|
ucUart1Buf[2] = 0;
|
|||
|
ucUart1Buf[3] = 0;
|
|||
|
bUart1SndAckFlg = 1; //UART<52>ѷ<EFBFBD><D1B7><EFBFBD><CDB9><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD>ACK<43><4B><EFBFBD>ܽ<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĺ<EFBFBD><C4B9><EFBFBD>
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
ucUart1BufPT++;
|
|||
|
Uart1TxEn(ucUart1Buf[ucUart1BufPT]);
|
|||
|
}
|
|||
|
|
|||
|
ucSleepTimerCnt = 0; //UART<52><54><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><CDB9>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>UART<52><54>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
|||
|
ucPDTimerCnt = 0;
|
|||
|
ucUart1TimeoutCnt = 0;
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: InterruptUart1AppTx
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART1<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڣ<EFBFBD><EFBFBD>жϴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>øú<EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart1Check(void)
|
|||
|
{
|
|||
|
if(++ucUart1TimeoutCnt >= 4) //<2F><><EFBFBD><EFBFBD>4*50mSû<53><C3BB>UARTͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λָ<CEBB><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
|||
|
{
|
|||
|
ucUart1TimeoutCnt = 0;
|
|||
|
ucUart1BufPT = 0;
|
|||
|
Uart1RxEn(); //UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
#if (UART2_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: InterruptUart2AppRx
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: RxData<EFBFBD><EFBFBD>Uart2<EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD><EFBFBD><EFBFBD>SBUF2<EFBFBD><EFBFBD>ȡ
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART2<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڣ<EFBFBD><EFBFBD>жϴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>øú<EFBFBD><EFBFBD><EFBFBD>
|
|||
|
ucUart2Buf[0]--Slave Addr
|
|||
|
ucUart2Buf[1]--CMD No.
|
|||
|
ucUart2Buf[2]--Offset
|
|||
|
ucUart2Buf[3]--Data Length
|
|||
|
ucUart2Buf[4...]--Data
|
|||
|
*************************************************************************************************/
|
|||
|
void InterruptUart2AppRx(U8 RxData)
|
|||
|
{
|
|||
|
ucUart2Buf[ucUart2BufPT] = RxData;
|
|||
|
ucUart2BufPT++;
|
|||
|
if(ucUart2BufPT >= 140)
|
|||
|
{
|
|||
|
ucUart2BufPT = 0;
|
|||
|
}
|
|||
|
if(ucUart2BufPT == 1)
|
|||
|
{
|
|||
|
McuBank1Sel();
|
|||
|
if((ucUart2Buf[UART_SLAVE_ADDR]&0xFE) == SADDR2) //<2F><><EFBFBD>յĵ<D5B5>һ<EFBFBD><D2BB><EFBFBD>ֽ<EFBFBD><D6BD>Ƿ<EFBFBD><C7B7><EFBFBD>UART<52><54>ַƥ<D6B7><C6A5>
|
|||
|
{
|
|||
|
McuBank0Sel();
|
|||
|
if((ucUart2Buf[UART_SLAVE_ADDR]&0x01)==0) //bit7<74><37>R/W<><57>־<EFBFBD><D6BE>0--R, 1--W
|
|||
|
{
|
|||
|
bUart2ReadFlg = 1;
|
|||
|
bUart2WriteFlg = 0;
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
bUart2WriteFlg = 1;
|
|||
|
bUart2ReadFlg = 0;
|
|||
|
}
|
|||
|
}
|
|||
|
else if(ucUart2Buf[HEARD1] != 0x5A) //<2F>ж<EFBFBD><D0B6>Ƿ<EFBFBD>ΪIAP/ISP<53><50><EFBFBD><EFBFBD>ʼ֡
|
|||
|
{
|
|||
|
ucUart2BufPT = 0; //<2F><><EFBFBD><EFBFBD>֡ͷ<D6A1><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λָ<CEBB><D6B8>
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
if(bUart2ReadFlg)
|
|||
|
{
|
|||
|
if(ucUart2BufPT==3)
|
|||
|
{
|
|||
|
Uart2RdCmdProcess(); //Read the command process
|
|||
|
}
|
|||
|
}
|
|||
|
else if(bUart2WriteFlg)
|
|||
|
{
|
|||
|
if(ucUart2BufPT > (ucUart2Buf[UART_LENGTH]+3)) //If a write operation, and complete all the data has been received
|
|||
|
{
|
|||
|
Uart2WrCmdProcess(); //Write the command peocess
|
|||
|
bUart2WriteFlg = 0; //PC write MCU communiaction over
|
|||
|
ucUart2BufPT = 0;
|
|||
|
}
|
|||
|
}
|
|||
|
else //<2F>Ƕ<EFBFBD><C7B6><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ΪISP<53><50><EFBFBD><EFBFBD>IAP<41><50>begin<69><6E><EFBFBD><EFBFBD>
|
|||
|
{
|
|||
|
Uart2IapCheckHandshake();
|
|||
|
}
|
|||
|
bUart2SndAckFlg = 0;
|
|||
|
|
|||
|
ucSleepTimerCnt = 0; //UART<52><54><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><CDB9>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>UART<52><54>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
|||
|
ucPDTimerCnt = 0;
|
|||
|
ucUart2TimeoutCnt = 0;
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: InterruptUartAppTx
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڣ<EFBFBD><EFBFBD>жϴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>øú<EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void InterruptUart2AppTx(void)
|
|||
|
{
|
|||
|
if((ucUart2Buf[HEARD1] == 0x5A) && (ucUart2Buf[HEARD2] == 0xA5) || bISPFlg)
|
|||
|
{
|
|||
|
if(ucUart2BufPT >= (ucUart2Buf[LENGTH]+8))
|
|||
|
{
|
|||
|
Uart2RxEn(); //Allow UART receive data
|
|||
|
ucUart2BufPT = 0;
|
|||
|
bUart2ReadFlg = 0; //PC read MCU communication over
|
|||
|
ucUart2Buf[0] = 0;
|
|||
|
ucUart2Buf[1] = 0;
|
|||
|
ucUart2Buf[2] = 0;
|
|||
|
ucUart2Buf[3] = 0;
|
|||
|
bUart2SndAckFlg = 1;
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
ucUart2BufPT++;
|
|||
|
Uart2TxEn(ucUart2Buf[ucUart2BufPT]); //20220620
|
|||
|
}
|
|||
|
}
|
|||
|
else if((ucUart2BufPT==0) || (ucUart2BufPT>=ucUart2Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
Uart2RxEn(); //UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
ucUart2BufPT = 0;
|
|||
|
bUart2ReadFlg = 0;
|
|||
|
ucUart2Buf[0] = 0;
|
|||
|
ucUart2Buf[1] = 0;
|
|||
|
ucUart2Buf[2] = 0;
|
|||
|
ucUart2Buf[3] = 0;
|
|||
|
bUart2SndAckFlg = 1; //UART<52>ѷ<EFBFBD><D1B7><EFBFBD><CDB9><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD>ACK<43><4B><EFBFBD>ܽ<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĺ<EFBFBD><C4B9><EFBFBD>
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
ucUart2BufPT++;
|
|||
|
Uart2TxEn(ucUart2Buf[ucUart2BufPT]);
|
|||
|
}
|
|||
|
|
|||
|
ucSleepTimerCnt = 0; //UART<52><54><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><CDB9>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>UART<52><54>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
|||
|
ucPDTimerCnt = 0;
|
|||
|
ucUart2TimeoutCnt = 0;
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
/*************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: InterruptUart0AppTx
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: UART<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڣ<EFBFBD><EFBFBD>жϴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>øú<EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart2Check(void)
|
|||
|
{
|
|||
|
if(++ucUart2TimeoutCnt >= 4) //<2F><><EFBFBD><EFBFBD>4*50mSû<53><C3BB>UARTͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λָ<CEBB><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
|||
|
{
|
|||
|
ucUart2TimeoutCnt = 0;
|
|||
|
ucUart2BufPT = 0;
|
|||
|
Uart2RxEn(); //UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|