2025-02-14 08:59:29 +00:00
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C51 COMPILER V9.01 MCULIB 02/13/2025 10:07:28 PAGE 1
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2025-02-06 07:35:32 +00:00
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C51 COMPILER V9.01, COMPILATION OF MODULE MCULIB
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OBJECT MODULE PLACED IN .\output\McuLib.obj
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COMPILER INVOKED BY: D:\Tool\Keil\C51\BIN\C51.EXE code_drv\McuLib.c LARGE OPTIMIZE(7,SIZE) REGFILE(.\output\MCUCore_Load
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-.ORC) BROWSE INTVECTOR(0X1000) INCDIR(.\header_app;.\header_drv;.\code_gasguage;.\code_classb\iec60730_lib\include;.\cod
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-e_classb\iec60730_proc\Include;.\code_classb\config) DEBUG OBJECTEXTEND PRINT(.\output\McuLib.lst) OBJECT(.\output\McuLi
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-b.obj)
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line level source
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1 /********************************************************************************
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2 Copyright (C), Sinowealth Electronic. Ltd.
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3 Author: Sino
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4 Version: V0.0
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5 Date: 2020/04/26
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6 History:
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7 V2.0 2020/04/26 Preliminary
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8 ********************************************************************************/
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9 #include "Main.h"
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10
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11
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12
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13 /*************************************************************************************************
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14 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: McuTimer3Set
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15 * <20><> <20><>: ClkSource: <20><>ʱ<EFBFBD><CAB1><EFBFBD>Ļ<EFBFBD>Դ<D7BC><D4B4><EFBFBD>ֱ<EFBFBD>Ϊ32KHz<48><7A>128KHz<48><7A>24MHz<48><7A>ϵͳʱ<CDB3>ӣ<EFBFBD>
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16 XmS<6D><53><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڣ<EFBFBD><DAA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>С<EFBFBD><D0A1>1000mSʱ<53><CAB1><EFBFBD><EFBFBD>ѡ<EFBFBD><D1A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>ӣ<EFBFBD><D3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD><DAB4><EFBFBD>1000mSʱ<53><CAB1>ֻ<EFBFBD><D6BB>ѡ<EFBFBD><D1A1>32KHz<48><7A>128K
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-Hz<48><7A>
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17 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
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18 * <20><> <20><>: <20><>ʼ<EFBFBD><CABC>Timer3<72><33>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
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19 *************************************************************************************************/
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20 void McuTimer3Set(U8 ClkSource, U16 XmS)
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21 {
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22 1 U16 TempVal;
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23 1
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24 1 McuBank1Sel();
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25 1
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26 1 // if(ClkSource == TIM_CLK_32KHz)
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27 1 // {
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28 1 // if(XmS < 1000)
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29 1 // {
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30 1 // T3CON = 0x02; //<2F>ⲿ32.768kHzΪʱ<EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD>1<EFBFBD><EFBFBD>Ƶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>2S
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31 1 // TempVal = (U32)0x10000 - (U32)32.768*XmS;
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32 1 // }
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33 1 // else
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34 1 // {
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35 1 // T3CON = 0x22; //<2F>ⲿ32.768kHzΪʱ<EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD>64<EFBFBD><EFBFBD>Ƶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>128s
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36 1 // TempVal = 0x10000 - (U32)32.768*XmS/64;
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37 1 // }
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38 1 // }
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39 1 // else if(ClkSource == TIM_CLK_128KHz)
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40 1 // {
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41 1 // if(XmS < 4000)
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42 1 // {
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43 1 // T3CON = 0x12; //<2F>ⲿ128kHzΪʱ<CEAA><CAB1>Դ<EFBFBD><D4B4>8<EFBFBD><38>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>4.096S
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44 1 // TempVal = 0x10000 - (U32)128*XmS/8;
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45 1 // }
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46 1 // else
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47 1 // {
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48 1 // T3CON = 0x32; //<2F>ⲿ128kHzΪʱ<CEAA><CAB1>Դ<EFBFBD><D4B4>256<35><36>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>131.072S
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49 1 // TempVal = 0x10000 - (U32)128*XmS/256;
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50 1 // }
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51 1 // }
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2025-02-14 08:59:29 +00:00
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C51 COMPILER V9.01 MCULIB 02/13/2025 10:07:28 PAGE 2
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2025-02-06 07:35:32 +00:00
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52 1 // else if(ClkSource == TIM_CLK_24MHz)
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53 1 // {
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54 1 // if(XmS < 500)
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55 1 // {
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56 1 // T3CON = 0x30; //ϵͳ24MHzΪʱ<CEAA><CAB1>Դ<EFBFBD><D4B4>256<35><36>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>669.5ms
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57 1 // TempVal = 0x10000 - (U32)24000*XmS/256;
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58 1 // }
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59 1 // else
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60 1 // {
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61 1 // T3CON = 0x32; //<2F>ⲿ128kHzΪʱ<CEAA><CAB1>Դ<EFBFBD><D4B4>256<35><36>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>131.072S
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62 1 // TempVal = 0x10000 - (U32)128*XmS/256;
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63 1 // }
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64 1 // }
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65 1
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66 1 //8MHz<48><7A><EFBFBD><EFBFBD>
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67 1 T3CON = 0x30; //ϵͳ8MHzΪʱ<CEAA><CAB1>Դ<EFBFBD><D4B4>256<35><36>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>669.5ms
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68 1 TempVal = 0x10000 - (U32)8000*XmS/256;
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69 1
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70 1 TL3 = TempVal;
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71 1 TH3 = TempVal>>8;
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72 1 TR3 = 1; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>3
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73 1
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74 1 McuBank0Sel();
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75 1 }
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*** WARNING C280 IN LINE 20 OF CODE_DRV\MCULIB.C: 'ClkSource': unreferenced local variable
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76
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77
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78 /*************************************************************************************************
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79 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: McuClockSet
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80 * <20><> <20><>: SysClock<63><6B><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>ϵͳʱ<CDB3><CAB1>
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81 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
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82 * <20><> <20><>: <20><>ʼ<EFBFBD><CABC>AFE
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83 *************************************************************************************************/
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84 void McuClockSet(U8 SysClock)
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85 {
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86 1 U8 ea;
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87 1
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88 1 ea = EA;
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89 1 EA = 0;
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90 1
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91 1 CLKCON |= 0x08; //SETB HFON
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92 1
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93 1 _nop_();
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94 1 _nop_();
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95 1 _nop_();
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96 1 _nop_();
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97 1 _nop_();
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98 1 _nop_();
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99 1 _nop_();
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100 1 _nop_();
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101 1
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102 1 CLKCON &= 0x60;
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103 1
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104 1 CLKCON |= 0x04; //SETB FS, SYSCLK=24M
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105 1
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106 1 EA = ea;
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107 1 }
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*** WARNING C280 IN LINE 84 OF CODE_DRV\MCULIB.C: 'SysClock': unreferenced local variable
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108
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109
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110 /*************************************************************************************************
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111 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: McuPWM0Set<65><74>McuPWM1Set<65><74>McuPWM2Set
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2025-02-14 08:59:29 +00:00
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C51 COMPILER V9.01 MCULIB 02/13/2025 10:07:28 PAGE 3
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2025-02-06 07:35:32 +00:00
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112 * <20><> <20><>: PwmFreq<65><71>PWM<57><4D>Ƶ<EFBFBD><C6B5>Hz<48><7A>DutyRatio<69><6F>PWM<57>ĸߵ<C4B8>ƽռ<C6BD>ձ<EFBFBD>
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113 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
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114 * <20><> <20><>: <20><>ʼ<EFBFBD><CABC>AFE
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115 *************************************************************************************************/
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116 void McuPWM0Set(U16 PwmFreq, U8 DutyRatio)
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117 {
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118 1 PWM0CON = 0xb0; //ϵͳʱ<CDB3><CAB1>/64
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119 1 PWM0PL = 375000/PwmFreq; //PWM2P=24000000/(64*E2uiDSG1PWMFreq);
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120 1 PWM0PH = (375000/PwmFreq) >> 8;
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121 1 PWM0DL = (U16)(PWM0PL+PWM0PH*256)*DutyRatio/100;
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122 1 PWM0DH = ((U16)(PWM0PL+PWM0PH*256)*DutyRatio/100) >> 8;
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123 1 }
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124
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125 void McuPWM1Set(U16 PwmFreq, U8 DutyRatio)
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126 {
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127 1 PWM1CON = 0xb0; //ϵͳʱ<CDB3><CAB1>/64
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128 1 PWM1PL = 375000/PwmFreq; //PWM2P=24000000/(64*E2uiDSG1PWMFreq);
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129 1 PWM1PH = (375000/PwmFreq) >> 8;
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130 1 PWM1DL = (U16)(PWM1PL+(U16)PWM1PH*256)*DutyRatio/100;
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131 1 PWM1DH = ((U16)(PWM1PL+(U16)PWM1PH*256)*DutyRatio/100) >> 8;
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132 1 }
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133
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134 void McuPWM2Set(U16 PwmFreq, U8 DutyRatio)
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135 {
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136 1 PWM2CON = 0xb0; //ϵͳʱ<CDB3><CAB1>/64
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137 1 PWM2PL = 375000/PwmFreq; //PWM2P=24000000/(64*E2uiDSG1PWMFreq);
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138 1 PWM2PH = (375000/PwmFreq) >> 8;
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139 1 PWM2DL = (U16)(PWM2PL+(U16)PWM2PH*256)*DutyRatio/100;
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140 1 PWM2DH = ((U16)(PWM2PL+(U16)PWM2PH*256)*DutyRatio/100) >> 8;
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141 1 }
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142
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143
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144 /*************************************************************************************************
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145 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Delay1ms
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146 * <20><> <20><>: Xms<6D><73><EFBFBD>ӳٶ<D3B3><D9B6><EFBFBD>mS
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147 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
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148 * <20><> <20><>: <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λΪ1mS
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149 <20>ر<EFBFBD>ע<EFBFBD><D7A2><EFBFBD>ú<EFBFBD><C3BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱȷ<D7BC><C8B7><EFBFBD><EFBFBD><EFBFBD>⣬<EFBFBD>ڲ<EFBFBD>ͬ<EFBFBD>Ż<EFBFBD><C5BB>ȼ<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͬ<E0B2BB><CDAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>һ<EFBFBD>£<EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD>£<EFBFBD>
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150 1.<2E><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><D1A1><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>Ż<EFBFBD><C5BB>ȼ<EFBFBD><C8BC><EFBFBD><EFBFBD><EFBFBD>Ϊ3ʱ<33><CAB1>j=1670<37><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD><EFBFBD>жϣ<D0B6><CFA3><EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD>ʱΪ3.484ms<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֹ<EFBFBD>ж<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ӱ<EFBFBD><EFBFBD>
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-<2D><><EFBFBD>ﵽ3.804ms
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151 2.<2E><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><D1A1><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>Ż<EFBFBD><C5BB>ȼ<EFBFBD><C8BC><EFBFBD><EFBFBD><EFBFBD>Ϊ3ʱ<33><CAB1>j=480<38><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD><EFBFBD>жϣ<D0B6><CFA3><EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD>ʱΪ1.010ms<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֹ<EFBFBD>ж<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ӱ<EFBFBD><EFBFBD><EFBFBD>
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-<2D><>ﵽ1.104ms
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152 3.<2E><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><D1A1><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>Ż<EFBFBD><C5BB>ȼ<EFBFBD><C8BC><EFBFBD><EFBFBD><EFBFBD>Ϊ7ʱ<37><CAB1>j=1670<37><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD><EFBFBD>жϣ<D0B6><CFA3><EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD>ʱΪ1.002ms<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֹ<EFBFBD>ж<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ӱ<EFBFBD><EFBFBD>
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-<2D><><EFBFBD>ﵽ1.090ms
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153 *************************************************************************************************/
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154 void Delay1ms(U8 Xms)
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155 {
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156 1 U8 i;
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157 1 U16 j, Tcnt;
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158 1
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159 1 if((CLKCON&0x70) == MCU_CLK_24MHz)
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160 1 {
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161 2 Tcnt = 1670;
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162 2 }
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163 1 else if((CLKCON&0x70) == MCU_CLK_12MHz)
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164 1 {
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165 2 Tcnt = 1670/2;
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166 2 }
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167 1 else if((CLKCON&0x70) == MCU_CLK_6MHz)
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168 1 {
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169 2 Tcnt = 1670/4;
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170 2 }
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2025-02-14 08:59:29 +00:00
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C51 COMPILER V9.01 MCULIB 02/13/2025 10:07:28 PAGE 4
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2025-02-06 07:35:32 +00:00
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171 1 else //2MHz
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172 1 {
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173 2 Tcnt = 1670/12;
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174 2 }
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175 1
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176 1
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177 1 for(i=0; i<Xms; i++) //system clock = 24MHz
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178 1 {
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179 2 for(j=0; j<Tcnt; j++)
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180 2 {
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181 3 }
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182 2 }
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183 1 }
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184
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185
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186
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187 /*************************************************************************************************
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188 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: ClrRam
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189 * <20><> <20><>: <20><>
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190 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
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191 * <20><> <20><>: <20><><EFBFBD><EFBFBD>DATA<54><41>IDATA<54><41>XRAM<41><4D><EFBFBD><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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192 *************************************************************************************************/
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193 //void ClrRam(void)
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194 //{
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195 // U8 idata *ptr1;
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196 // U8 xdata *ptr2;
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197 // U8 xdata i;
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198 // U16 idata j;
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199
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200 // for(i=0x08; i<=STACK_ADDR-1; i++) //clear ram address: 08H~STACK_ADDR-1
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201 // {
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202 // ptr1 = (U8 idata *)i;
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203 // *ptr1 = 0;
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204 // }
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205
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206 // for(j=0; j<=0xAFF; j++) //clear XDATA address:0000H-0AFFH
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207 // {
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208 // ptr2 = (U8 xdata *)j;
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209 // *ptr2 = 0;
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210 // }
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211 //}
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212
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213
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214 /*************************************************************************************************
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215 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: RamCheckProcess
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216 * <20><> <20><>: <20><>
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217 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
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218 * <20><> <20><>: <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ϵͳ<CFB5><CDB3><EFBFBD><EFBFBD>XRAM<41><4D><EFBFBD>ı<EFBFBD>־<EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD>ȷ<EFBFBD><C8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȷ<EFBFBD><C8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>
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219 *************************************************************************************************/
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220 BOOL RamCheckProcess(void)
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221 {
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222 1 if((E2ucRamCheckFlg0 != RAM_CHECK_DATA)
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223 1 || (E2ucRamCheckFlg1 != RAM_CHECK_DATA)
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224 1 || (E2ucRamCheckFlg2 != RAM_CHECK_DATA)
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225 1 || (E2ucRamCheckFlg3 != RAM_CHECK_DATA)
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226 1 || (E2ucRamCheckFlg5 != RAM_CHECK_DATA)
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227 1 || (E2ucRamCheckFlg6 != RAM_CHECK_DATA)
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228 1 || (E2ucRamCheckFlg7 != RAM_CHECK_DATA)
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229 1 || (E2ucRamCheckFlg8 != RAM_CHECK_DATA)
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230 1 || (E2ucRamCheckFlg9 != RAM_CHECK_DATA)
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231 1 || (E2ucRamCheckFlgA != RAM_CHECK_DATA)
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232 1 || (E2ucRamCheckFlgB != RAM_CHECK_DATA)
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2025-02-14 08:59:29 +00:00
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C51 COMPILER V9.01 MCULIB 02/13/2025 10:07:28 PAGE 5
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2025-02-06 07:35:32 +00:00
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233 1 || (E2uiCheckFlag != 0x5AA5))
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234 1 {
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235 2 return 0;
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236 2 }
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237 1 else
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238 1 {
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239 2 return 1;
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240 2 }
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241 1 }
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242
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243
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244 /*************************************************************************************************
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245 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: MemorySet
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246 * <20><> <20><>: pt--memoryָ<79><D6B8>
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247 setval---<2D><>Ҫ<EFBFBD><D2AA>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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248 length---<2D><>Ҫ<EFBFBD><D2AA>ֵ<EFBFBD><D6B5>memory<72><79><EFBFBD><EFBFBD>(Byres)
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249 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
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250 * <20><> <20><>: <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ϵͳ<CFB5><CDB3><EFBFBD><EFBFBD>XRAM<41><4D><EFBFBD>ı<EFBFBD>־<EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD>ȷ<EFBFBD><C8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȷ<EFBFBD><C8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>
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251 *************************************************************************************************/
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252 void MemorySet(U8 xdata *pt, U8 setval, U8 length)
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253 {
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254 1 U8 i;
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255 1 for(i=0; i<length; i++)
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256 1 {
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257 2 *pt = setval;
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258 2 pt++;
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259 2 }
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260 1 }
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261
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262
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263 /*************************************************************************************************
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264 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: MemoryCopy
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265 * <20><> <20><>: source--ԴMemoryָ<79><D6B8>
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266 target---Ŀ<><C4BF>Memoryָ<79><D6B8>
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267 length---<2D><>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>(Byres)
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268 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
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269 * <20><> <20><>: <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ϵͳ<CFB5><CDB3><EFBFBD><EFBFBD>XRAM<41><4D><EFBFBD>ı<EFBFBD>־<EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD>ȷ<EFBFBD><C8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȷ<EFBFBD><C8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>
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270 *************************************************************************************************/
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271 void MemoryCopy(U8 xdata *source, U8 xdata *target, U8 length)
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272 {
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273 1 U8 i;
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274 1 for(i=0; i<length; i++)
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275 1 {
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276 2 *target = *source;
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277 2 target++;
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278 2 source++;
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279 2 }
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280 1 }
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281
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282
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283 /*************************************************************************************************
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284 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: McuIntoIdle<6C><65>McuIntoPD
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285 * <20><> <20><>: <20><>
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286 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
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287 * <20><> <20><>: MCU<43><55><EFBFBD><EFBFBD>PD<50><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD>IDLEģʽ<C4A3><CABD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><CDB9><EFBFBD>
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288 *************************************************************************************************/
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289 void McuIntoIdle(void)
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290 {
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291 1 SUSLO = 0x55;
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292 1 PCON |= 0x01;
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293 1 _nop_();
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294 1 _nop_();
|
2025-02-14 08:59:29 +00:00
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|
C51 COMPILER V9.01 MCULIB 02/13/2025 10:07:28 PAGE 6
|
2025-02-06 07:35:32 +00:00
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295 1 _nop_();
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296 1 _nop_();
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297 1 _nop_();
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298 1 }
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299
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300 void McuIntoPD(void)
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301 {
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302 1 SUSLO = 0x55;
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303 1 PCON |= 0x02;
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304 1 _nop_();
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305 1 _nop_();
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306 1 _nop_();
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307 1 _nop_();
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308 1 _nop_();
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309 1 }
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310
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311
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312 /*************************************************************************************************
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313 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: SystemResetProcess
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314 * <20><> <20><>: <20><>
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315 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
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316 * <20><> <20><>: ϵͳ<CFB5><CDB3>λ<EFBFBD><CEBB><EFBFBD>ӳ<EFBFBD><D3B3><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ<EFBFBD><D6B7>ʼִ<CABC><D6B4>
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317 *************************************************************************************************/
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318 void SystemResetProcess(void)
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319 {
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320 1 if( (ucResetFlag==0x12) && (bUart0SndAckFlg||bUart1SndAckFlg||bUart2SndAckFlg) //Software reset
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- occurs, and ended UART communication
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321 1 && (!bMcuFlashWrWaitFlg) && (!bMcuFlashWrFlg) ) //Flash has been updated
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322 1 {
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323 2 IrqDis();
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324 2 IEN0 = 0x00; //Disable Interrupt
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325 2 IEN1 = 0x00;
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326 2 TCON = 0x00;
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327 2 EXF0 = 0x00;
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328 2
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329 2 SBRTH = 0x00; //Disable UART0
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330 2 SBRTL = 0x00;
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331 2 SCON = 0x00;
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332 2
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333 2 ((void(code*)(void))0x0000)(); //ָ<><D6B8><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
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334 2 }
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335 1 }
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336
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337
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338
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339
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340
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341
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342
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343
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MODULE INFORMATION: STATIC OVERLAYABLE
|
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CODE SIZE = 804 ----
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CONSTANT SIZE = ---- ----
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XDATA SIZE = ---- 15
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PDATA SIZE = ---- ----
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DATA SIZE = ---- ----
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IDATA SIZE = ---- ----
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BIT SIZE = ---- ----
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END OF MODULE INFORMATION.
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C51 COMPILATION COMPLETE. 2 WARNING(S), 0 ERROR(S)
|