359 lines
16 KiB
Plaintext
359 lines
16 KiB
Plaintext
|
C51 COMPILER V9.01 UART 02/06/2025 15:28:46 PAGE 1
|
|||
|
|
|
|||
|
|
|
|||
|
|
C51 COMPILER V9.01, COMPILATION OF MODULE UART
|
|||
|
|
OBJECT MODULE PLACED IN .\output\Uart.obj
|
|||
|
|
COMPILER INVOKED BY: D:\Tool\Keil\C51\BIN\C51.EXE code_drv\Uart.c LARGE OPTIMIZE(7,SIZE) REGFILE(.\output\MCUCore_Load.O
|
|||
|
|
-RC) BROWSE INTVECTOR(0X1000) INCDIR(.\header_app;.\header_drv;.\code_gasguage;.\code_classb\iec60730_lib\include;.\code_
|
|||
|
|
-classb\iec60730_proc\Include;.\code_classb\config) DEBUG OBJECTEXTEND PRINT(.\output\Uart.lst) OBJECT(.\output\Uart.obj)
|
|||
|
|
|
|||
|
|
line level source
|
|||
|
|
|
|||
|
|
1 /********************************************************************************
|
|||
|
|
2 Copyright (C), Sinowealth Electronic. Ltd.
|
|||
|
|
3 Author: Sino
|
|||
|
|
4 Version: V0.0
|
|||
|
|
5 Date: 2020/04/26
|
|||
|
|
6 History:
|
|||
|
|
7 V2.0 2020/04/26 Preliminary
|
|||
|
|
8 ********************************************************************************/
|
|||
|
|
9 #include "Main.h"
|
|||
|
|
10
|
|||
|
|
11
|
|||
|
|
-
|
|||
|
|
-
|
|||
|
|
12 #if (UART0_DEFINE != 0)
|
|||
|
|
13 /*************************************************************************************************
|
|||
|
|
14 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: UART0Init
|
|||
|
|
15 * <20><> <20><>: Bps: UARTͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
16 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
|
17 * <20><> <20><>: <20><>ʼ<EFBFBD><CABC>UART0ģ<30><C4A3>
|
|||
|
|
18 *************************************************************************************************/
|
|||
|
|
19 void UART0Init(void)
|
|||
|
|
20 {
|
|||
|
|
21 1 #if UART0_DEFINE == 1
|
|||
|
|
22 1 UART0CR = 0x32;
|
|||
|
|
23 1 #elif UART0_DEFINE == 2
|
|||
|
|
UART0CR = 0x42;
|
|||
|
|
#elif UART0_DEFINE == 3
|
|||
|
|
UART0CR = 0x52;
|
|||
|
|
#elif UART0_DEFINE == 4
|
|||
|
|
UART0CR = 0x02;
|
|||
|
|
#elif UART0_DEFINE == 5
|
|||
|
|
UART0CR = 0x12;
|
|||
|
|
#elif UART0_DEFINE == 6
|
|||
|
|
UART0CR = 0x23;
|
|||
|
|
#elif UART0_DEFINE == 7
|
|||
|
|
UART0CR = 0x43;
|
|||
|
|
#elif UART0_DEFINE == 8
|
|||
|
|
UART0CR = 0x53;
|
|||
|
|
#elif UART0_DEFINE == 9
|
|||
|
|
UART0CR = 0x03;
|
|||
|
|
#elif UART0_DEFINE == 10
|
|||
|
|
UART0CR = 0x13;
|
|||
|
|
#elif UART0_DEFINE == 11
|
|||
|
|
UART0CR = 0x24;
|
|||
|
|
#elif UART0_DEFINE == 12
|
|||
|
|
UART0CR = 0x34;
|
|||
|
|
#elif UART0_DEFINE == 13
|
|||
|
|
UART0CR = 0x54;
|
|||
|
|
#elif UART0_DEFINE == 14
|
|||
|
|
UART0CR = 0x04;
|
|||
|
|
#elif UART0_DEFINE == 15
|
|||
|
|
UART0CR = 0x14;
|
|||
|
|
#elif UART0_DEFINE == 16
|
|||
|
|
C51 COMPILER V9.01 UART 02/06/2025 15:28:46 PAGE 2
|
|||
|
|
|
|||
|
|
UART0CR = 0x25;
|
|||
|
|
#elif UART0_DEFINE == 17
|
|||
|
|
UART0CR = 0x35;
|
|||
|
|
#elif UART0_DEFINE == 18
|
|||
|
|
UART0CR = 0x45;
|
|||
|
|
#elif UART0_DEFINE == 19
|
|||
|
|
UART0CR = 0x05;
|
|||
|
|
#elif UART0_DEFINE == 20
|
|||
|
|
UART0CR = 0x15;
|
|||
|
|
#elif UART0_DEFINE == 21
|
|||
|
|
UART0CR = 0x30;
|
|||
|
|
#elif UART0_DEFINE == 22
|
|||
|
|
UART0CR = 0x40;
|
|||
|
|
#elif UART0_DEFINE == 23
|
|||
|
|
UART0CR = 0x50;
|
|||
|
|
#elif UART0_DEFINE == 24
|
|||
|
|
UART0CR = 0x20;
|
|||
|
|
#elif UART0_DEFINE == 25
|
|||
|
|
UART0CR = 0x10;
|
|||
|
|
#elif UART0_DEFINE == 26
|
|||
|
|
UART0CR = 0x31;
|
|||
|
|
#elif UART0_DEFINE == 27
|
|||
|
|
UART0CR = 0x41;
|
|||
|
|
#elif UART0_DEFINE == 28
|
|||
|
|
UART0CR = 0x51;
|
|||
|
|
#elif UART0_DEFINE == 29
|
|||
|
|
UART0CR = 0x01;
|
|||
|
|
#elif UART0_DEFINE == 30
|
|||
|
|
UART0CR = 0x21;
|
|||
|
|
#else
|
|||
|
|
#Error: "UART0_DEFINE ERROR"
|
|||
|
|
#endif
|
|||
|
|
84 1 {
|
|||
|
|
85 2 U16 TempVal;
|
|||
|
|
86 2 PCON = 0x00;
|
|||
|
|
87 2 SCON = 0x50; //<2F><><EFBFBD><EFBFBD>Uart<72><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ1
|
|||
|
|
88 2 // SBRTH = UART_BPS_H;
|
|||
|
|
89 2 // SBRTL = UART_BPS_L;
|
|||
|
|
90 2 // SFINE = UART_BPS_F;
|
|||
|
|
91 2
|
|||
|
|
92 2 TempVal = 32768 - (U16)(8000000 / 16 / 9600); //<2F><><EFBFBD>㹫ʽ<E3B9AB><CABD>(int)X=FSY/(16*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>) ; SBRT=32768-X ;
|
|||
|
|
-SFINE=<3D><>FSY/<2F><><EFBFBD><EFBFBD><EFBFBD>ʣ<EFBFBD>-16*X FSY=24M
|
|||
|
|
93 2 SBRTH = TempVal / 256;
|
|||
|
|
94 2 SBRTL = TempVal % 256;
|
|||
|
|
95 2 SFINE = (float)8000000 / 9600 - (16 * (32768 - TempVal));
|
|||
|
|
96 2
|
|||
|
|
97 2 SBRTH |= 0x80; //ʹ<>ܲ<EFBFBD><DCB2><EFBFBD><EFBFBD>ʷ<EFBFBD><CAB7><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
98 2 SADDR = UART_SLAVE_SADDR; //UART<52><54>ַ<EFBFBD><D6B7>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>Ĭ<EFBFBD><C4AC>Ϊ0x0A
|
|||
|
|
99 2 SADEN = 0xFF;
|
|||
|
|
100 2 }
|
|||
|
|
101 1 }
|
|||
|
|
102
|
|||
|
|
103
|
|||
|
|
104 /*************************************************************************************************
|
|||
|
|
105 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: InterruptUART0
|
|||
|
|
106 * <20><> <20><>: <20><>
|
|||
|
|
107 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
|
108 * <20><> <20><>: UART0<54>жϴ<D0B6><CFB4><EFBFBD>
|
|||
|
|
109 *************************************************************************************************/
|
|||
|
|
110 void InterruptUART0(void) interrupt 4
|
|||
|
|
111 {
|
|||
|
|
112 1 U8 xdata RxData;
|
|||
|
|
C51 COMPILER V9.01 UART 02/06/2025 15:28:46 PAGE 3
|
|||
|
|
|
|||
|
|
113 1
|
|||
|
|
114 1 _push_(INSCON);
|
|||
|
|
115 1 McuBank0Sel();
|
|||
|
|
116 1
|
|||
|
|
117 1 if(RI) //RT1 interrupt means MCU recept data though UART
|
|||
|
|
118 1 {
|
|||
|
|
119 2 RI = 0;
|
|||
|
|
120 2 RxData = SBUF;
|
|||
|
|
121 2 // InterruptUart0AppRx(RxData); //<2F><>ӱЭ<D3B1><D0AD>
|
|||
|
|
122 2 }
|
|||
|
|
123 1
|
|||
|
|
124 1 if(TI)
|
|||
|
|
125 1 {
|
|||
|
|
126 2 // TI = 0;
|
|||
|
|
127 2 // InterruptUart0AppTx(); //<2F><>ӱЭ<D3B1><D0AD>
|
|||
|
|
128 2
|
|||
|
|
129 2 }
|
|||
|
|
130 1
|
|||
|
|
131 1 _pop_(INSCON);
|
|||
|
|
132 1 }
|
|||
|
|
133 #endif
|
|||
|
|
134
|
|||
|
|
135
|
|||
|
|
136 #if (UART1_DEFINE != 0)
|
|||
|
|
/*************************************************************************************************
|
|||
|
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: UART1Init
|
|||
|
|
* <20><> <20><>: Bps: UARTͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
|
* <20><> <20><>: <20><>ʼ<EFBFBD><CABC>UART1ģ<31><C4A3>
|
|||
|
|
*************************************************************************************************/
|
|||
|
|
void UART1Init(void)
|
|||
|
|
{
|
|||
|
|
// U16 TempVal;
|
|||
|
|
|
|||
|
|
_push_(INSCON);
|
|||
|
|
McuBank0Sel();
|
|||
|
|
#if UART1_DEFINE == 1
|
|||
|
|
UART1CR = 0x10;
|
|||
|
|
#elif UART1_DEFINE == 2
|
|||
|
|
UART1CR = 0x40;
|
|||
|
|
#elif UART1_DEFINE == 3
|
|||
|
|
UART1CR = 0x50;
|
|||
|
|
#elif UART1_DEFINE == 4
|
|||
|
|
UART1CR = 0x20;
|
|||
|
|
#elif UART1_DEFINE == 5
|
|||
|
|
UART1CR = 0x30;
|
|||
|
|
#elif UART1_DEFINE == 6
|
|||
|
|
UART1CR = 0x01;
|
|||
|
|
#elif UART1_DEFINE == 7
|
|||
|
|
UART1CR = 0x41;
|
|||
|
|
#elif UART1_DEFINE == 8
|
|||
|
|
UART1CR = 0x51;
|
|||
|
|
#elif UART1_DEFINE == 9
|
|||
|
|
UART1CR = 0x21;
|
|||
|
|
#elif UART1_DEFINE == 10
|
|||
|
|
UART1CR = 0x31;
|
|||
|
|
#elif UART1_DEFINE == 11
|
|||
|
|
UART1CR = 0x04;
|
|||
|
|
#elif UART1_DEFINE == 12
|
|||
|
|
UART1CR = 0x14;
|
|||
|
|
#elif UART1_DEFINE == 13
|
|||
|
|
UART1CR = 0x54;
|
|||
|
|
C51 COMPILER V9.01 UART 02/06/2025 15:28:46 PAGE 4
|
|||
|
|
|
|||
|
|
#elif UART1_DEFINE == 14
|
|||
|
|
UART1CR = 0x24;
|
|||
|
|
#elif UART1_DEFINE == 15
|
|||
|
|
UART1CR = 0x34;
|
|||
|
|
#elif UART1_DEFINE == 16
|
|||
|
|
UART1CR = 0x05;
|
|||
|
|
#elif UART1_DEFINE == 17
|
|||
|
|
UART1CR = 0x15;
|
|||
|
|
#elif UART1_DEFINE == 18
|
|||
|
|
UART1CR = 0x45;
|
|||
|
|
#elif UART1_DEFINE == 19
|
|||
|
|
UART1CR = 0x25;
|
|||
|
|
#elif UART1_DEFINE == 20
|
|||
|
|
UART1CR = 0x35;
|
|||
|
|
#elif UART1_DEFINE == 21
|
|||
|
|
UART1CR = 0x02;
|
|||
|
|
#elif UART1_DEFINE == 22
|
|||
|
|
UART1CR = 0x12;
|
|||
|
|
#elif UART1_DEFINE == 23
|
|||
|
|
UART1CR = 0x42;
|
|||
|
|
#elif UART1_DEFINE == 24
|
|||
|
|
UART1CR = 0x52;
|
|||
|
|
#elif UART1_DEFINE == 25
|
|||
|
|
UART1CR = 0x32;
|
|||
|
|
#elif UART1_DEFINE == 26
|
|||
|
|
UART1CR = 0x03;
|
|||
|
|
#elif UART1_DEFINE == 27
|
|||
|
|
UART1CR = 0x13;
|
|||
|
|
#elif UART1_DEFINE == 28
|
|||
|
|
UART1CR = 0x43;
|
|||
|
|
#elif UART1_DEFINE == 29
|
|||
|
|
UART1CR = 0x53;
|
|||
|
|
#elif UART1_DEFINE == 30
|
|||
|
|
UART1CR = 0x23;
|
|||
|
|
#else
|
|||
|
|
#Error: "UART1_DEFINE ERROR"
|
|||
|
|
#endif
|
|||
|
|
{
|
|||
|
|
McuBank1Sel();
|
|||
|
|
PCON1 = 0x00;
|
|||
|
|
SCON1 = 0x50; //<2F><><EFBFBD><EFBFBD>Uart<72><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ1
|
|||
|
|
SBRTH1 = UART_BPS_H;
|
|||
|
|
SBRTL1 = UART_BPS_L;
|
|||
|
|
SFINE1 = UART_BPS_F;
|
|||
|
|
SBRTH1 |= 0x80; //ʹ<>ܲ<EFBFBD><DCB2><EFBFBD><EFBFBD>ʷ<EFBFBD><CAB7><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
SADDR1 = UART_SLAVE_SADDR; //UART<52><54>ַ<EFBFBD><D6B7>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>Ĭ<EFBFBD><C4AC>Ϊ0x0A
|
|||
|
|
SADEN1 = 0xFF;
|
|||
|
|
McuBank0Sel();
|
|||
|
|
}
|
|||
|
|
_pop_(INSCON);
|
|||
|
|
|
|||
|
|
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
|
|||
|
|
/*************************************************************************************************
|
|||
|
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: InterruptUart1
|
|||
|
|
* <20><> <20><>: <20><>
|
|||
|
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
|
* <20><> <20><>: UART1<54><31><EFBFBD>պͷ<D5BA><CDB7><EFBFBD><EFBFBD>жϷ<D0B6><CFB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
InterruptUart1AppRx(RxData)<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>APP<50><50><EFBFBD>Ľ<EFBFBD><C4BD><EFBFBD><EFBFBD>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
InterruptUart1AppTx()<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>APP<50><50><EFBFBD>ķ<EFBFBD><C4B7><EFBFBD><EFBFBD>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
C51 COMPILER V9.01 UART 02/06/2025 15:28:46 PAGE 5
|
|||
|
|
|
|||
|
|
*************************************************************************************************/
|
|||
|
|
void InterruptUart1(void) interrupt 15
|
|||
|
|
{
|
|||
|
|
U8 xdata RxData;
|
|||
|
|
|
|||
|
|
_push_(INSCON);
|
|||
|
|
McuBank1Sel();
|
|||
|
|
|
|||
|
|
if(RI1)
|
|||
|
|
{
|
|||
|
|
RI1 = 0;
|
|||
|
|
RxData = SBUF1;
|
|||
|
|
McuBank0Sel(); //<2F><><EFBFBD><EFBFBD>APP<50><50><EFBFBD><EFBFBD>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD>BANK0
|
|||
|
|
InterruptUart1AppRx(RxData);
|
|||
|
|
}
|
|||
|
|
McuBank1Sel();
|
|||
|
|
if(TI1)
|
|||
|
|
{
|
|||
|
|
TI1 = 0;
|
|||
|
|
McuBank0Sel(); //<2F><><EFBFBD><EFBFBD>APP<50><50><EFBFBD><EFBFBD>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD>BANK0
|
|||
|
|
InterruptUart1AppTx();
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
_pop_(INSCON);
|
|||
|
|
}
|
|||
|
|
#endif
|
|||
|
|
263
|
|||
|
|
264 #if (UART2_DEFINE != 0)
|
|||
|
|
/*************************************************************************************************
|
|||
|
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: UART2Init
|
|||
|
|
* <20><> <20><>: Bps: UARTͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
|
* <20><> <20><>: <20><>ʼ<EFBFBD><CABC>UART2ģ<32><C4A3>
|
|||
|
|
*************************************************************************************************/
|
|||
|
|
void UART2Init(void)
|
|||
|
|
{
|
|||
|
|
{
|
|||
|
|
McuBank1Sel();
|
|||
|
|
PCON2 = 0x00;
|
|||
|
|
SCON2 = 0x50; //<2F><><EFBFBD><EFBFBD>Uart<72><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ1
|
|||
|
|
SBRTH2 = UART_BPS_H;
|
|||
|
|
SBRTL2 = UART_BPS_L;
|
|||
|
|
SFINE2 = UART_BPS_F;
|
|||
|
|
SBRTH2 |= 0x80; //ʹ<>ܲ<EFBFBD><DCB2><EFBFBD><EFBFBD>ʷ<EFBFBD><CAB7><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
SADDR2 = UART_SLAVE_SADDR; //UART<52><54>ַ<EFBFBD><D6B7>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>Ĭ<EFBFBD><C4AC>Ϊ0x0A
|
|||
|
|
SADEN2 = 0xFF;
|
|||
|
|
McuBank0Sel();
|
|||
|
|
}
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
/*************************************************************************************************
|
|||
|
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: InterruptUart2
|
|||
|
|
* <20><> <20><>: <20><>
|
|||
|
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
|
* <20><> <20><>: UART2<54><32><EFBFBD>պͷ<D5BA><CDB7><EFBFBD><EFBFBD>жϷ<D0B6><CFB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
InterruptUart2AppRx(RxData)<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>APP<50><50><EFBFBD>Ľ<EFBFBD><C4BD><EFBFBD><EFBFBD>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
InterruptUart2AppTx()<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>APP<50><50><EFBFBD>ķ<EFBFBD><C4B7><EFBFBD><EFBFBD>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
*************************************************************************************************/
|
|||
|
|
void InterruptUart2(void) interrupt 16
|
|||
|
|
{
|
|||
|
|
U8 xdata RxData;
|
|||
|
|
|
|||
|
|
C51 COMPILER V9.01 UART 02/06/2025 15:28:46 PAGE 6
|
|||
|
|
|
|||
|
|
_push_(INSCON);
|
|||
|
|
McuBank1Sel();
|
|||
|
|
|
|||
|
|
if(RI2)
|
|||
|
|
{
|
|||
|
|
RI2 = 0;
|
|||
|
|
RxData = SBUF2;
|
|||
|
|
McuBank0Sel(); //<2F><><EFBFBD><EFBFBD>APP<50><50><EFBFBD><EFBFBD>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD>BANK0
|
|||
|
|
InterruptUart2AppRx(RxData);
|
|||
|
|
}
|
|||
|
|
McuBank1Sel();
|
|||
|
|
if(TI2)
|
|||
|
|
{
|
|||
|
|
TI2 = 0;
|
|||
|
|
McuBank0Sel(); //<2F><><EFBFBD><EFBFBD>APP<50><50><EFBFBD><EFBFBD>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD>BANK0
|
|||
|
|
InterruptUart2AppTx();
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
_pop_(INSCON);
|
|||
|
|
}
|
|||
|
|
#endif
|
|||
|
|
320
|
|||
|
|
|
|||
|
|
|
|||
|
|
MODULE INFORMATION: STATIC OVERLAYABLE
|
|||
|
|
CODE SIZE = 128 ----
|
|||
|
|
CONSTANT SIZE = ---- ----
|
|||
|
|
XDATA SIZE = ---- 3
|
|||
|
|
PDATA SIZE = ---- ----
|
|||
|
|
DATA SIZE = ---- ----
|
|||
|
|
IDATA SIZE = ---- ----
|
|||
|
|
BIT SIZE = ---- ----
|
|||
|
|
END OF MODULE INFORMATION.
|
|||
|
|
|
|||
|
|
|
|||
|
|
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
|