103 lines
3.2 KiB
C
103 lines
3.2 KiB
C
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#ifndef __MCU_LIB_H
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#define __MCU_LIB_H
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#define RAM_CHECK_DATA 0x5A
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#define TIM_CLK_24MHz 0x00
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#define TIM_CLK_12MHz 0x11
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#define TIM_CLK_6MHz 0x22
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#define TIM_CLK_2MHz 0x33
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#define TIM_CLK_128KHz 0x44
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#define TIM_CLK_32KHz 0x55
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#define MCU_CLK_24MHz 0x00
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#define MCU_CLK_12MHz 0x20
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#define MCU_CLK_6MHz 0x40
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#define MCU_CLK_2MHz 0x60
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#define MCU_CLK_128KHz 0x80
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#define MCU_CLK_32KHz 0xA0
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#define McuBank0Sel() INSCON = 0x00; //<2F><><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>Bank0
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#define McuBank1Sel() INSCON = 0x40; //<2F><><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>Bank1
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#define McuWDTClear() RSTSTAT &= 0xF8; //<2F>忴<EFBFBD>Ź<EFBFBD>
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#define McuFlashEn() FLASHCON |= 0x01; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>MCU<43><55>Flash
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#define McuFlashDis() FLASHCON &= ~0x01; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>MCU<43><55>Flash
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#define McuTwiEn() ENTWI = 1; //<2F><><EFBFBD><EFBFBD>MCU<43><55>Twiģ<69><C4A3>
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#define McuTwiDis() ENTWI = 0; //<2F>ر<EFBFBD>MCU<43><55>Twiģ<69><C4A3>
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#define McuPWM0En() PWM0CON |= 0x01; //PWM<57><4D><EFBFBD><EFBFBD>
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#define McuPWM1En() PWM1CON |= 0x01; //PWM<57><4D><EFBFBD><EFBFBD>
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#define McuPWM2En() PWM2CON |= 0x01; //PWM<57><4D><EFBFBD><EFBFBD>
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#define McuPWM0Dis() PWM0CON &= ~0x81; //<2F>ر<EFBFBD>PWM<57><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ΪIO
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#define McuPWM1Dis() PWM1CON &= ~0x81; //<2F>ر<EFBFBD>PWM<57><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ΪIO
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#define McuPWM2Dis() PWM2CON &= ~0x81; //<2F>ر<EFBFBD>PWM<57><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ΪIO
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#define IrqEn() EA = 1; //<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʹ<EFBFBD><CAB9>λ
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#define IrqDis() EA = 0; //<2F>ر<EFBFBD><D8B1>ж<EFBFBD><D0B6><EFBFBD>ʹ<EFBFBD><CAB9>λ
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#define IrqINT0En() EX0 = 1; //<2F>ⲿ<EFBFBD>ж<EFBFBD>0<EFBFBD><30><EFBFBD>ؿ<EFBFBD><D8BF><EFBFBD>
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#define IrqINT0Dis() EX0 = 0;
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#define IrqINT0FlgClr() IE0 = 0;
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#define IrqINT0TrigLow() IT0 = 0;
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#define IrqINT0TrigFalling() IT0 = 1;
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#define IrqINT1En() EX1 = 1; //<2F>ⲿ<EFBFBD>ж<EFBFBD>1<EFBFBD><31><EFBFBD>ؿ<EFBFBD><D8BF><EFBFBD>
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#define IrqINT1Dis() EX1 = 0;
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#define IrqINT1FlgClr() IE1 = 0;
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#define IrqINT1TrigLow() IT1 = 0;
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#define IrqINT1TrigFalling() IT1 = 1;
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#define INT4_EXS40 0x01
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#define INT4_EXS41 0x02
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#define INT4_EXS42 0x04
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#define INT4_EXS43 0x08
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#define INT4_EXS44 0x10
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#define INT4_EXS45 0x20
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#define INT4_EXS46 0x40
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#define INT4_EXS47 0x80
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#define IrqINT4En() IEN1 |= 0x08;
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#define IrqINT4Dis() IEN1 &= ~0x08;
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#define IrqINT4xChEn(INT4x) IENC |= INT4x;
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#define IrqINT4xChDis(INT4x) IENC &= ~INT4x;
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#define IrqINT4FlgClr() EXF1 = 0;
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#define INT4_TRIG_LOW 0x00
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#define INT4_TRIG_FALLING 0x40
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#define INT4_TRIG_RISING 0x80
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#define INT4_TRIG_FALL_RISE 0xC0
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#define IrqINT4Trig(INT4Trig) EXF0 |= INT4Trig;
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#define IrqTimer3En() ET3 = 1;
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#define IrqTimer3Dis() ET3 = 0;
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#define IrqTimer3FlgClr() _push_(INSCON);McuBank1Sel();TF3 = 0;_pop_(INSCON);
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#define IrqUart0En() ES0 = 1;
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#define IrqUart0Dis() ES0 = 0;
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#define IrqUart1En() IEN2 |= 0x01;
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#define IrqUart1Dis() IEN2 &= 0xFE;
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#define IrqUart2En() IEN2 |= 0x02;
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#define IrqUart2Dis() IEN2 &= 0xFD;
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extern void ClrRam(void);
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extern void MemorySet(U8 xdata *pt, U8 setval, U8 length);
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extern void MemoryCopy(U8 xdata *source, U8 xdata *target, U8 length);
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extern void McuTimer3Set(U8 ClkSource, U16 XmS);
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extern void McuClockSet(U8 SysClock);
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extern void McuPWM0Set(U16 PwmFreq, U8 DutyRatio);
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extern void McuPWM1Set(U16 PwmFreq, U8 DutyRatio);
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extern void McuPWM2Set(U16 PwmFreq, U8 DutyRatio);
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extern void Delay1ms(U8 delaycnt);
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extern void McuIntoIdle(void);
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extern void McuIntoPD(void);
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extern void SystemResetProcess(void);
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extern BOOL RamCheckProcess(void);
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#endif
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