ZDBMS/output/sh_iec60730b_8051f_porting.lst

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2025-02-06 07:35:32 +00:00
C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE SH_IEC60730B_8051F_PORTING
OBJECT MODULE PLACED IN .\output\sh_iec60730b_8051f_porting.obj
COMPILER INVOKED BY: C:\Keil_v5\C51\BIN\C51.EXE code_classb\iec60730_proc\sh_iec60730b_8051f_porting.c LARGE OPTIMIZE(7,
-SIZE) REGFILE(.\output\McuFlash_ISP.ORC) BROWSE INTVECTOR(0X1000) INCDIR(.\header_app;.\header_drv;.\code_gasguage) DEBU
-G OBJECTEXTEND PRINT(.\output\sh_iec60730b_8051f_porting.lst) OBJECT(.\output\sh_iec60730b_8051f_porting.obj)
line level source
1 /*
2 * IEC60730 Class B TEST PROCESS for SINOWEALTH 8051 based ICs.
3 * File: sh_iec60730b_8051f_testproc.h
4 * Version: 1.0
5 * Author: Robin.zhang Chaoming.luo
6 * Date: 04/21/2023
7 * SINOWEALTH IS SUPPLYING THIS SOFTWARE FOR USE EXCLUSIVELY ON SINOWEALTH'S
8 * MICROCONTROLLER PRODUCTS. IT IS PROTECTED UNDER APPLICABLE COPYRIGHT LAWS.
9 * THIS SOFTWARE IS FOR GUIDANCE IN ORDER TO SAVE TIME. AS A RESULT, SINOWEALTH
10 * SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES
11 * WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF SUCH FIRMWARE AND/OR
12 * THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN
13 * CONNECTION WITH THEIR PRODUCTS.
14 *
15 */
16
17 #include "sh_iec60730b_8051f_testproc.h"
*** WARNING C318 IN LINE 17 OF code_classb\iec60730_proc\sh_iec60730b_8051f_porting.c: can't open file 'sh_iec60730b_805
-1f_testproc.h'
18 #include "main.h"
19
20
21 #if SH_CHK_DIO_TEST_EN == 1
*** WARNING C322 IN LINE 21 OF code_classb\iec60730_proc\sh_iec60730b_8051f_porting.c: unknown identifier
/*******************************************************************************
*
* @brief This function is used for read GPIO port value
*
* @param pin: GPIO ID
*
* @return GPIO Value
*
******************************************************************************/
SHT_U8 sh_8051f_dio_read_port_val(SHT_GPIO_ID pin)
{
SHT_U8 readV;
switch(pin&0xF0)
{
case 0x00:
readV = P0;
break;
case 0x10:
readV = P1;
break;
case 0x20:
readV = P2;
break;
case 0x30:
readV = P3;
break;
case 0x40:
readV = P4;
break;
C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 2
case 0x50:
INSCON = 0x40; //SFR Bank1 selected
readV = P5;
INSCON = 0x00; //SFR Bank0 selected
break;
}
return readV;
}
/*******************************************************************************
*
* @brief This function is used for read GPIO port mode control register(CR)
*
* @param pin: GPIO ID
*
* @return GPIO mode control register value
*
******************************************************************************/
SHT_U8 sh_8051f_dio_read_port_cr(SHT_GPIO_ID pin)
{
SHT_U8 readV;
switch(pin&0xF0)
{
case 0x00:
readV = P0CR;
break;
case 0x10:
readV = P1CR;
break;
case 0x20:
readV = P2CR;
break;
case 0x30:
readV = P3CR;
break;
case 0x40:
readV = P4CR;
break;
case 0x50:
INSCON = 0x40; //SFR Bank1 selected
readV = P5CR;
INSCON = 0x00; //SFR Bank0 selected
break;
}
return readV;
}
/*******************************************************************************
*
* @brief This function is used for read GPIO port pull control register(PCR)
*
* @param pin: GPIO ID
*
* @return GPIO pull control register value
*
******************************************************************************/
SHT_U8 sh_8051f_dio_read_port_pcr(SHT_GPIO_ID pin)
{
SHT_U8 readV;
switch(pin&0xF0)
{
case 0x00:
readV = P0PCR;
break;
C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 3
case 0x10:
readV = P1PCR;
break;
case 0x20:
readV = P2PCR;
break;
case 0x30:
readV = P3PCR;
break;
case 0x40:
readV = P4PCR;
break;
case 0x50:
INSCON = 0x40; //SFR Bank1 selected
readV = P5PCR;
INSCON = 0x00; //SFR Bank0 selected
break;
}
return readV;
}
/*******************************************************************************
*
* @brief This function is used for write GPIO pin value
*
* @param pin: GPIO ID
* pinVal: SH_DIO_PINV_0 or SH_DIO_PINV_1
*
* @return void
*
******************************************************************************/
void sh_8051f_dio_write_pin(SHT_GPIO_ID pin,SHT_BOOL pinVal)
{
SHT_U8 readV;
readV = 1;
readV <<= (pin&0xF);
if(pinVal == SH_DIO_PINV_1)
{
switch(pin&0xF0)
{
case 0x00:
P0 |= readV;
break;
case 0x10:
P1 |= readV;
break;
case 0x20:
P2 |= readV;
break;
case 0x30:
P3 |= readV;
break;
case 0x40:
P4 |= readV;
break;
case 0x50:
INSCON = 0x40; //SFR Bank1 selected
P5 |= readV;
INSCON = 0x00; //SFR Bank0 selected
break;
}
}
else
C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 4
{
readV =~readV;
switch(pin&0xF0)
{
case 0x00:
P0 &= readV;
break;
case 0x10:
P1 &= readV;
break;
case 0x20:
P2 &= readV;
break;
case 0x30:
P3 &= readV;
break;
case 0x40:
P4 &= readV;
break;
case 0x50:
INSCON = 0x40; //SFR Bank1 selected
P5 &= readV;
INSCON = 0x00; //SFR Bank0 selected
break;
}
}
}
/*******************************************************************************
*
* @brief This function is used for write GPIO port value
*
* @param pin: GPIO ID
* writerv: value of all 8 pins
*
* @return void
*
******************************************************************************/
void sh_8051f_dio_write_port_val(SHT_GPIO_ID pin,SHT_U8 writev)
{
switch(pin&0xF0)
{
case 0x00:
P0 = writev;
break;
case 0x10:
P1 = writev;
break;
case 0x20:
P2 = writev;
break;
case 0x30:
P3 = writev;
break;
case 0x40:
P4 = writev;
break;
case 0x50:
INSCON = 0x40; //SFR Bank1 selected
P5 = writev;
INSCON = 0x00; //SFR Bank0 selected
break;
}
C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 5
}
/*******************************************************************************
*
* @brief This function is used for write GPIO mode control register (CR)
*
* @param pin: GPIO ID
* writerv: value of mode control register
*
* @return void
*
******************************************************************************/
void sh_8051f_dio_write_port_cr(SHT_GPIO_ID pin,SHT_U8 writev)
{
switch(pin&0xF0)
{
case 0x00:
P0CR = writev;
break;
case 0x10:
P1CR = writev;
break;
case 0x20:
P2CR = writev;
break;
case 0x30:
P3CR = writev;
break;
case 0x40:
P4CR = writev;
break;
case 0x50:
INSCON = 0x40; //SFR Bank1 selected
P5CR = writev;
INSCON = 0x00; //SFR Bank0 selected
break;
}
}
/*******************************************************************************
*
* @brief This function is used for write GPIO pull control register(PCR)
*
* @param pin: GPIO ID
* writerv: value of pull control register
*
* @return void
*
******************************************************************************/
void sh_8051f_dio_write_port_pcr(SHT_GPIO_ID pin,SHT_U8 writev)
{
switch(pin&0xF0)
{
case 0x00:
P0PCR = writev;
break;
case 0x10:
P1PCR = writev;
break;
case 0x20:
P2PCR = writev;
break;
case 0x30:
P3PCR = writev;
C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 6
break;
case 0x40:
P4PCR = writev;
break;
case 0x50:
INSCON = 0x40; //SFR Bank1 selected
P5PCR = writev;
INSCON = 0x00; //SFR Bank0 selected
break;
}
}
/* config tested pins */
static SHT_IEC60730B_DIO_TEST __iec60730b_dio_pin_out0 = {OUTPUT_PORT,0,0,0}; //P4_3 : output
static SHT_IEC60730B_DIO_TEST __iec60730b_dio_pin_in0 = {INPUT_PORT,0,0,0}; //P4_2 : check input
/*******************************************************************************
*
* @brief This function is used for Digital IO test
*
* @param void
*
* @return SH_CHK_PASS - digital IO tested correct
* SH_CHK_FAIL_DIO - digital IO failed
******************************************************************************/
SHT_RESULT sh_8051f_dio_test(void)
{
SHT_RESULT checkResult = SH_CHK_PASS;
checkResult = sh_8051f_dio_short_to_adjacent_set(&__iec60730b_dio_pin_in0,
&__iec60730b_dio_pin_out0,
SH_DIO_BACKUP_ENABLE);
if( checkResult != SH_CHK_PASS)
return checkResult;
checkResult = sh_8051f_dio_input(__iec60730b_dio_pin_in0.gpio,SH_DIO_PINV_1);
if( checkResult != SH_CHK_PASS)
return checkResult;
checkResult = sh_8051f_dio_short_to_supply_set(&__iec60730b_dio_pin_in0,SH_DIO_BACKUP_DISABLE);
if( checkResult != SH_CHK_PASS)
return checkResult;
checkResult = sh_8051f_dio_input_ext(&__iec60730b_dio_pin_in0,&__iec60730b_dio_pin_out0,SH_DIO_PINV_1,
-SH_DIO_BACKUP_ENABLE);
if( checkResult != SH_CHK_PASS)
return checkResult;
checkResult = sh_8051f_dio_output(__iec60730b_dio_pin_out0.gpio,100);
if( checkResult != SH_CHK_PASS)
return checkResult;
return checkResult;
}
#endif
348
349 #if SH_CHK_AIO_TEST_EN == 1
*** WARNING C322 IN LINE 349 OF code_classb\iec60730_proc\sh_iec60730b_8051f_porting.c: unknown identifier
/*******************************************************************************
*
* @brief Initialize Analog IO test structure
*
*
******************************************************************************/
/*AIO convert limit*/
code const SHT_IEC60730B_AIO_LIMITS __iec60730b_aio_limit[SH_CHK_AIO_TEST_NUM] = {
{LOWER_LIMIT_CH1,UPPER_LIMIT_CH1},
C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 7
{LOWER_LIMIT_CH2,UPPER_LIMIT_CH2},
// {LOWER_LIMIT_CH3,UPPER_LIMIT_CH3},
};
SHT_U16 __iec60730b_aio_val[SH_CHK_AIO_TEST_NUM] = {0}; /*ADC sequence index array*/
/*******************************************************************************
*
* @brief This function is used for Analog IO test
*
* @param void
*
* @return SH_CHK_PASS - Analog IO tested correct
* SH_CHK_FAIL_AIO - Analog IO failed
******************************************************************************/
SHT_RESULT sh_8051f_aio_test(void)
{
SHT_RESULT checkResult = SH_CHK_PASS;
// __iec60730b_aio_val[0] = uiAdcVal[VVBIAS];
// __iec60730b_aio_val[1] = uiAdcVal[VBG];
checkResult = sh_8051f_aio_input_check();
return checkResult;
}
/*******************************************************************************
*
* @brief This function is used for Analog IO test at runtime
*
* @param void
*
* @return SH_CHK_PASS - Analog IO tested correct
* SH_CHK_FAIL_AIO - Analog IO failed
******************************************************************************/
SHT_RESULT sh_8051f_aio_test_runtime(void)
{
SHT_RESULT checkResult = SH_CHK_PASS;
// __iec60730b_aio_val[0] = uiAdcVal[VVBIAS];
// __iec60730b_aio_val[1] = uiAdcVal[VBG];
checkResult = sh_8051f_aio_input_check();
return checkResult;
}
#endif
404
405 #if SH_CHK_WDG_EN == 1
*** WARNING C322 IN LINE 405 OF code_classb\iec60730_proc\sh_iec60730b_8051f_porting.c: unknown identifier
/*******************************************************************************
*
* @brief This function is used for watchdog testing
*
* @param void
*
* @return SH_CHK_PASS - watchdog runs correct
* SH_CHK_FAIL_WDG - watchdog doesn't fit into limit
******************************************************************************/
SHT_RESULT sh_8051f_wdg_test(void)
{
SHT_RESULT checkResult = SH_CHK_PASS;
__iec60730b_wdg_test_obj.resetSource = RSTSTAT;
C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 8
/*clear reset flags and reset watchdog config */
RSTSTAT = SH_CHK_WDG_EXPECT_TIME;
if( sh_8051f_wdg_setup() != SH_CHK_PASS)
{
/* measure watchdog timeout */
EA = 0;
__iec60730b_wdg_test_obj.counter = 0;
sh_8051f_wdg_init_timer();
if(ucKeyValue == KEY_ON_S)
{
__iec60730b_wdg_test_obj.resetflag = 1;
}
CLR_WDT();
while(1){
sh_8051f_wdg_delay_1ms();
__iec60730b_wdg_test_obj.counter++;
}
}
checkResult = sh_8051f_wdg_check();
if(checkResult != SH_CHK_PASS && SH_CHK_WDG_ENDLESS_LOOP)
{
/* measure watchdog timeout */
EA = 0;
__iec60730b_wdg_test_obj.counter = 0;
sh_8051f_wdg_init_timer();
CLR_WDT();
while(1){
sh_8051f_wdg_delay_1ms();
__iec60730b_wdg_test_obj.counter++;
}
}
if(checkResult != SH_CHK_PASS)
return checkResult;
return checkResult;
}
#if (SH_CHK_WDG_TIMER_SEL == SH_CHK_WDG_P0)
/*******************************************************************************
*
* @brief This function is used for initializing timer to generate 1ms timeout event
*
* @param void
*
* @return void
*
******************************************************************************/
#define SH_CHK_WDG_TV (SH_CHK_SYSCLK*1000/16)
void sh_8051f_wdg_init_timer()
{
PWM0CON = 0x20;
PWM0PL = (SH_CHK_WDG_TV&0xFF);
PWM0PH = (SH_CHK_WDG_TV>>8);
PWM0CON = 0xA0;
}
/*******************************************************************************
*
* @brief This function is used for delay 1ms
*
C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 9
* @param void
*
* @return void
*
******************************************************************************/
void sh_8051f_wdg_delay_1ms()
{
PWM0CON &= ~(1<<7);
PWM0PL = (SH_CHK_WDG_TV&0xFF);
PWM0PH = (SH_CHK_WDG_TV>>8);
PWM0CON &= ~(1<<1);
PWM0CON |= (1<<7);
while((PWM0CON&0x02) == 0){}
}
#elif (SH_CHK_WDG_TIMER_SEL == SH_CHK_WDG_P1)
#define SH_CHK_WDG_TV (SH_CHK_SYSCLK*1000/16)
void sh_8051f_wdg_init_timer()
{
PWM1CON = 0x20;
PWM1PL = (SH_CHK_WDG_TV&0xFF);
PWM1PH = (SH_CHK_WDG_TV>>8);
PWM1CON = 0xA0;
}
void sh_8051f_wdg_delay_1ms()
{
PWM1CON &= ~(1<<7);
PWM1PL = (SH_CHK_WDG_TV&0xFF);
PWM1PH = (SH_CHK_WDG_TV>>8);
PWM1CON &= ~(1<<1);
PWM1CON |= (1<<7);
while((PWM1CON&0x02) == 0){}
}
#elif (SH_CHK_WDG_TIMER_SEL == SH_CHK_WDG_P2)
#define SH_CHK_WDG_TV (SH_CHK_SYSCLK*1000/16)
void sh_8051f_wdg_init_timer()
{
PWM2CON = 0x20;
PWM2PL = (SH_CHK_WDG_TV&0xFF);
PWM2PH = (SH_CHK_WDG_TV>>8);
PWM2CON = 0xA0;
}
void sh_8051f_wdg_delay_1ms()
{
PWM2CON &= ~(1<<7);
PWM2PL = (SH_CHK_WDG_TV&0xFF);
PWM2PH = (SH_CHK_WDG_TV>>8);
PWM2CON &= ~(1<<1);
PWM2CON |= (1<<7);
while((PWM2CON&0x02) == 0){}
}
#elif (SH_CHK_WDG_TIMER_SEL == SH_CHK_WDG_T3)
#define SH_CHK_WDG_TV (0xFFFF - ((SH_CHK_SYSCLK/8*1000)))
void sh_8051f_wdg_init_timer()
{
INSCON = 0x40; //SFR Bank1 selected
T3CON = (1<<4)|(0<<0);//SYSCLK/8
TL3 = (SH_CHK_WDG_TV&0xFF);
TH3 = (SH_CHK_WDG_TV>>8);
T3CON |= (1<<2);//START TIMER
INSCON = 0x00; //SFR Bank0 selected
}
C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 10
void sh_8051f_wdg_delay_1ms()
{
INSCON = 0x40; //SFR Bank1 selected
T3CON &= ~((1<<2)|(1<<7));
TL3 = (SH_CHK_WDG_TV&0xFF);
TH3 = (SH_CHK_WDG_TV>>8);
T3CON |= (1<<2);//START TIMER2
while((T3CON & (1<<7)) == 0){}
INSCON = 0x00; //SFR Bank0 selected
}
#endif
#endif
556
557 /*******************************************************************************
558 * CLOCK TESTING FUNCTIONS
559 ******************************************************************************/
560 #if SH_CHK_CLOCK_EN == 1
*** WARNING C322 IN LINE 560 OF code_classb\iec60730_proc\sh_iec60730b_8051f_porting.c: unknown identifier
/*******************************************************************************
*
* @brief This function is used for Start Timer (with clock source different from system clock)
*
* @param void
*
* @return void
*
******************************************************************************/
#if (SH_CHK_CLOCK_LOWSPD_SEL == SH_CHK_CLOCK_T3)
void sh_8051f_clk_start_lowspeed_timer()
{
INSCON = 0x40; //SFR Bank1 selected
T3CON = 0x02; //128k
TL3 = 0;
TH3 = 0;
T3CON |= (1<<2);//START TIMER
INSCON = 0x00; //SFR Bank0 selected
}
void sh_8051f_clk_capture()
{
INSCON = 0x40; //SFR Bank1 selected
T3CON &= ~(1<<2);//STOP TIMER
__iec60730b_clk_context = T3_16;
TL3 = 0;
TH3 = 0;
T3CON |= (1<<2);//START TIMER
INSCON = 0x00; //SFR Bank0 selected
}
#endif
/*******************************************************************************
*
* @brief This function is used for Start Timer (with system clock source)
*
* @param void
*
* @return void
*
******************************************************************************/
#if (SH_CHK_CLOCK_HIGHSPD_SEL == SH_CHK_CLOCK_P0)
C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 11
void sh_8051f_clk_start_highspeed_timer()
{
PWM0PL = 0x53;
PWM0PH = 0x07;
PWM0DL = 0x53;
PWM0DH = 0x07;
PWM0CON = 0xB4;
IEN1 |= (1<<1);
}
void InterruptPWM0(void) interrupt 8
{
PWM0CON &= ~(1<<1);
sh_8051f_clk_capture();
InterruptTimer3App(); //<2F><>ʱ<EFBFBD><CAB1>
}
#elif (SH_CHK_CLOCK_HIGHSPD_SEL == SH_CHK_CLOCK_P1)
void sh_8051f_clk_start_highspeed_timer()
{
PWM1PL = 0x53;
PWM1PH = 0x07;
PWM1DL = 0x53;
PWM1DH = 0x07;
PWM1CON = 0xB4;
IEN1 |= (1<<2);
}
void InterruptPWM1(void) interrupt 9
{
PWM1CON &= ~(1<<1);
sh_8051f_clk_capture();
InterruptTimer3App(); //<2F><>ʱ<EFBFBD><CAB1>
}
#elif (SH_CHK_CLOCK_HIGHSPD_SEL == SH_CHK_CLOCK_P2)
void sh_8051f_clk_start_highspeed_timer()
{
PWM2PL = 0x53;
PWM2PH = 0x07;
PWM2DL = 0x53;
PWM2DH = 0x07;
PWM2CON = 0xB4;
IEN2 |= (1<<3);
}
void InterruptPWM2(void) interrupt 18
{
PWM2CON &= ~(1<<1);
sh_8051f_clk_capture();
InterruptTimer3App(); //<2F><>ʱ<EFBFBD><CAB1>
}
#endif
#endif
657 /*******************************************************************************
658 * ERROR OPERATION FUNCTION
659 ******************************************************************************/
660 void sh_8051f_safety_error(SHT_RESULT checkResult)
*** ERROR C141 IN LINE 660 OF CODE_CLASSB\IEC60730_PROC\SH_IEC60730B_8051F_PORTING.C: syntax error near 'checkResult', e
-xpected ')'
661 {
662 1 #if 1
663 1 //for debug
664 1 checkResult = RSTSTAT;
C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 12
*** ERROR C202 IN LINE 664 OF CODE_CLASSB\IEC60730_PROC\SH_IEC60730B_8051F_PORTING.C: 'checkResult': undefined identifie
-r
665 1 while(1){
666 2 CLR_WDT();
667 2 }
668 1 #else
/*WAIT WATCHDOG REST*/
RSTSTAT = 7; /*fast reset*/
while(1){
};
#endif
674 1 }
C51 COMPILATION COMPLETE. 5 WARNING(S), 2 ERROR(S)