From 0ed08a8452d5927b281270e1bfe5066dff297561 Mon Sep 17 00:00:00 2001 From: 95384 <664090429@qq.com> Date: Tue, 11 Feb 2025 16:17:56 +0800 Subject: [PATCH] =?UTF-8?q?=E8=BF=87=E6=B5=81=E4=BF=9D=E6=8A=A4=E9=97=B4?= =?UTF-8?q?=E9=9A=94=E4=B8=80=E5=AE=9A=E6=97=B6=E9=97=B4=E8=87=AA=E6=81=A2?= =?UTF-8?q?=E5=A4=8D=EF=BC=8C=E6=AC=A0=E5=8E=8B=E8=BF=87=E5=8E=8B=E4=BF=9D?= =?UTF-8?q?=E6=8A=A4=E8=BF=98=E6=9C=AA=E9=AA=8C=E8=AF=81?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- MCUCore.uvopt | 182 +++++++++++++++------------ MCUCore_uvopt.bak | 216 ++++++++++++++++++-------------- code_dataflash/DataFlash.c | 9 +- output/AFE.lst | 18 +-- output/AFE.obj | Bin 84820 -> 84820 bytes output/Balance.lst | 10 +- output/Balance.obj | Bin 71782 -> 71782 bytes output/BootApp.lst | 2 +- output/BootApp.obj | Bin 65572 -> 65572 bytes output/BootIAP.lst | 10 +- output/BootIAP.obj | Bin 68977 -> 68977 bytes output/BootLoad | Bin 50164 -> 49689 bytes output/BootLoad.m51 | 56 ++++----- output/BootLoad.plg | 0 output/Calculate.lst | 18 +-- output/Calculate.obj | Bin 80210 -> 80210 bytes output/Calibrate.lst | 8 +- output/Calibrate.obj | Bin 70872 -> 70872 bytes output/ChargerLoad.lst | 4 +- output/ChargerLoad.obj | Bin 68179 -> 68179 bytes output/DataFlash.lst | 30 ++--- output/DataFlash.obj | Bin 19647 -> 19647 bytes output/Eeprom | Bin 19703 -> 19703 bytes output/Eeprom.hex | 4 +- output/Eeprom.m51 | 2 +- output/ExtE2PRom.lst | 20 +-- output/ExtE2PRom.obj | Bin 88859 -> 88859 bytes output/Flash.lst | 12 +- output/Flash.obj | Bin 14172 -> 14017 bytes output/GasGaugeInter_V4_13.lst | 10 +- output/GasGaugeInter_V4_13.obj | Bin 73026 -> 73026 bytes output/IapIsp.lst | 32 ++--- output/IapIsp.obj | Bin 29512 -> 29349 bytes output/Initial.lst | 22 ++-- output/Initial.obj | Bin 74063 -> 74063 bytes output/Interrupt.lst | 4 +- output/Interrupt.obj | Bin 67856 -> 67856 bytes output/InterruptApp.lst | 4 +- output/InterruptApp.obj | Bin 66887 -> 66887 bytes output/KeyApp.lst | 4 +- output/KeyApp.obj | Bin 67401 -> 67401 bytes output/KeyScan.lst | 6 +- output/KeyScan.obj | Bin 67441 -> 67441 bytes output/Led.lst | 6 +- output/Led.obj | Bin 67914 -> 67914 bytes output/LowPower.lst | 10 +- output/LowPower.obj | Bin 73204 -> 73204 bytes output/MCUCore_Load | Bin 2086212 -> 2086212 bytes output/MCUCore_Load.m51 | 222 ++++++++++++++++----------------- output/MCUCore_Load.plg | 131 +++---------------- output/Main.lst | 6 +- output/Main.obj | Bin 70448 -> 70448 bytes output/McuFlash.lst | 14 +-- output/McuFlash.obj | Bin 77983 -> 77983 bytes output/McuLib.lst | 12 +- output/McuLib.obj | Bin 76793 -> 76793 bytes output/Memory.lst | 8 +- output/Memory.obj | Bin 89679 -> 89679 bytes output/MosCtrl.lst | 4 +- output/MosCtrl.obj | Bin 67065 -> 67065 bytes output/PorSelfTest.lst | 8 +- output/PorSelfTest.obj | Bin 70874 -> 70874 bytes output/Protect.lst | 16 +-- output/Protect.obj | Bin 78746 -> 78746 bytes output/RTC.lst | 10 +- output/RTC.obj | Bin 74436 -> 74436 bytes output/STARTUP.lst | 4 +- output/STARTUP.obj | Bin 804 -> 804 bytes output/TWI.lst | 16 +-- output/TWI.obj | Bin 75578 -> 75578 bytes output/Thermistor.lst | 14 +-- output/Thermistor.obj | Bin 65266 -> 65266 bytes output/TwiIO.lst | 16 +-- output/TwiIO.obj | Bin 64730 -> 64730 bytes output/Uart.lst | 12 +- output/Uart.obj | Bin 68621 -> 68621 bytes output/UartApp.lst | 70 +++++------ output/UartApp.obj | Bin 95104 -> 95104 bytes 78 files changed, 605 insertions(+), 657 deletions(-) create mode 100644 output/BootLoad.plg diff --git a/MCUCore.uvopt b/MCUCore.uvopt index 1600b41..408576e 100644 --- a/MCUCore.uvopt +++ b/MCUCore.uvopt @@ -1532,10 +1532,10 @@ 1 0 0 - 18 + 14 0 - 25 - 33 + 31 + 61 0 .\code_app\Main.c Main.c @@ -1563,7 +1563,7 @@ 63 0 5 - 41 + 5 0 .\code_app\InterruptApp.c InterruptApp.c @@ -1604,7 +1604,7 @@ 0 8 0 - 54 + 63 89 0 .\code_app\LowPower.c @@ -1630,10 +1630,10 @@ 1 0 0 - 5 + 0 0 1 - 1 + 23 0 .\code_app\Memory.c Memory.c @@ -1695,7 +1695,7 @@ 0 49 0 - 46 + 50 76 0 .\code_drv\Calculate.c @@ -1721,10 +1721,10 @@ 1 0 0 - 13 + 19 0 - 13 - 37 + 45 + 45 0 .\code_drv\ChargerLoad.c ChargerLoad.c @@ -1833,10 +1833,10 @@ 1 0 0 - 5 + 34 0 - 413 - 431 + 431 + 455 0 .\code_drv\Protect.c Protect.c @@ -1877,7 +1877,7 @@ 0 21 0 - 97 + 101 127 0 .\code_drv\Uart.c @@ -1891,7 +1891,7 @@ 0 54 0 - 330 + 336 362 0 .\code_drv\Thermistor.c @@ -2008,10 +2008,10 @@ 1 0 0 - 31 + 46 0 - 1 - 30 + 115 + 142 0 .\code_dataflash\DataFlash.c DataFlash.c @@ -3807,8 +3807,86 @@ 0 100 - 5 + 2 + + \Y\KEIL\ZDBMS\ZDBMS\HEADER_APP\MEMORY.H + 48 + 100 + 115 + + + .\code_app\Main.c + 14 + 31 + 61 + + + .\code_dataflash\DataFlash.c + 46 + 115 + 142 + + + .\code_drv\Protect.c + 34 + 431 + 455 + + + .\code_app\Memory.c + 0 + 1 + 23 + + + .\HEADER_DRV\PROTECT.H + 18 + 1 + 18 + + + .\HEADER_DRV\EXTE2PROM.H + 5266323 + 1 + 1 + + + .\HEADER_DRV\CHARGERLOAD.H + 5266323 + 1 + 19 + + + .\HEADER_DRV\CALIBRATE.H + 14 + 1 + 19 + + + .\HEADER_DRV\BALANCE.H + 5266323 + 1 + 30 + + + \Y\KEIL\ZDBMS\ZDBMS\HEADER_APP\UARTAPP.H + 12 + 128 + 128 + + + .\header_app\Main.h + 28 + 103 + 103 + + + .\code_drv\ChargerLoad.c + 19 + 45 + 45 + .\HEADER_DRV\AFE.H 8 @@ -3824,25 +3902,13 @@ .\code_drv\Thermistor.c 54 - 330 + 336 362 - - .\code_app\Main.c - 18 - 25 - 33 - - - .\code_app\Memory.c - 5 - 1 - 1 - .\code_drv\Calculate.c 49 - 46 + 50 76 @@ -3851,28 +3917,16 @@ 79 80 - - .\code_dataflash\DataFlash.c - 31 - 1 - 30 - .\code_drv\ExtE2PRom.c 13 461 461 - - \Y\KEIL\ZDBMS\ZDBMS\HEADER_APP\UARTAPP.H - 12 - 128 - 128 - .\code_drv\Uart.c 21 - 97 + 101 127 @@ -3893,24 +3947,6 @@ 304 304 - - \Y\KEIL\ZDBMS\ZDBMS\HEADER_APP\MEMORY.H - 0 - 1 - 1 - - - .\code_drv\ChargerLoad.c - 13 - 13 - 37 - - - .\code_drv\Protect.c - 5 - 413 - 431 - .\code_drv\Balance.c 5 @@ -3941,18 +3977,6 @@ 1 7 - - .\header_app\Main.h - 28 - 1 - 4 - - - .\HEADER_DRV\CALIBRATE.H - 33 - 1 - 5 - .\HEADER_DRV\MCUFLASH.H 79 @@ -3963,7 +3987,7 @@ .\code_app\InterruptApp.c 63 5 - 41 + 5 .\code_drv\McuLib.c @@ -3986,7 +4010,7 @@ .\code_app\LowPower.c 8 - 54 + 63 89 diff --git a/MCUCore_uvopt.bak b/MCUCore_uvopt.bak index 049a910..9b98266 100644 --- a/MCUCore_uvopt.bak +++ b/MCUCore_uvopt.bak @@ -1532,10 +1532,10 @@ 1 0 0 - 18 + 22 0 - 25 - 33 + 32 + 42 0 .\code_app\Main.c Main.c @@ -1563,7 +1563,7 @@ 63 0 5 - 41 + 5 0 .\code_app\InterruptApp.c InterruptApp.c @@ -1630,10 +1630,10 @@ 1 0 0 - 5 + 0 0 1 - 1 + 23 0 .\code_app\Memory.c Memory.c @@ -1656,7 +1656,7 @@ Driver - 0 + 1 0 0 @@ -1693,10 +1693,10 @@ 1 0 0 - 40 + 49 0 - 30 - 67 + 46 + 76 0 .\code_drv\Calculate.c Calculate.c @@ -1707,9 +1707,9 @@ 1 0 0 - 28 + 31 0 - 61 + 79 80 0 .\code_drv\Calibrate.c @@ -1721,10 +1721,10 @@ 1 0 0 - 13 + 19 0 - 13 - 37 + 45 + 45 0 .\code_drv\ChargerLoad.c ChargerLoad.c @@ -1835,8 +1835,8 @@ 0 5 0 - 413 - 431 + 316 + 316 0 .\code_drv\Protect.c Protect.c @@ -1889,10 +1889,10 @@ 1 0 0 - 58 + 54 0 - 346 - 383 + 330 + 362 0 .\code_drv\Thermistor.c Thermistor.c @@ -2008,10 +2008,10 @@ 1 0 0 - 38 + 29 0 - 1 - 34 + 7 + 36 0 .\code_dataflash\DataFlash.c DataFlash.c @@ -3807,43 +3807,61 @@ 0 100 - 4 + 0 .\code_app\Main.c - 18 - 25 - 33 + 22 + 32 + 42 + + + .\code_dataflash\DataFlash.c + 29 + 7 + 36 + + + .\code_drv\Protect.c + 5 + 316 + 316 .\code_app\Memory.c - 5 + 0 + 1 + 23 + + + .\HEADER_DRV\PROTECT.H + 5266242 1 1 - .\code_drv\Calculate.c - 40 - 30 - 67 - - - .\code_drv\Calibrate.c - 28 - 61 - 80 - - - .\code_dataflash\DataFlash.c - 38 + .\HEADER_DRV\EXTE2PROM.H + 5266323 1 - 34 + 1 - .\code_drv\ExtE2PRom.c - 13 - 461 - 461 + .\HEADER_DRV\CHARGERLOAD.H + 5266323 + 1 + 19 + + + .\HEADER_DRV\CALIBRATE.H + 14 + 1 + 19 + + + .\HEADER_DRV\BALANCE.H + 5266323 + 1 + 30 \Y\KEIL\ZDBMS\ZDBMS\HEADER_APP\UARTAPP.H @@ -3851,6 +3869,60 @@ 128 128 + + \Y\KEIL\ZDBMS\ZDBMS\HEADER_APP\MEMORY.H + 0 + 1 + 18 + + + .\header_app\Main.h + 28 + 103 + 103 + + + .\code_drv\ChargerLoad.c + 19 + 45 + 45 + + + .\HEADER_DRV\AFE.H + 8 + 1 + 4 + + + .\HEADER_DRV\CALCULATE.H + 14 + 1 + 13 + + + .\code_drv\Thermistor.c + 54 + 330 + 362 + + + .\code_drv\Calculate.c + 49 + 46 + 76 + + + .\code_drv\Calibrate.c + 31 + 79 + 80 + + + .\code_drv\ExtE2PRom.c + 13 + 461 + 461 + .\code_drv\Uart.c 21 @@ -3869,42 +3941,12 @@ 121 121 - - .\HEADER_DRV\CALCULATE.H - 28 - 1 - 31 - - - .\code_drv\Thermistor.c - 58 - 346 - 383 - .\code_drv\AFE.c 9 304 304 - - \Y\KEIL\ZDBMS\ZDBMS\HEADER_APP\MEMORY.H - 0 - 1 - 1 - - - .\code_drv\ChargerLoad.c - 13 - 13 - 37 - - - .\code_drv\Protect.c - 5 - 413 - 431 - .\code_drv\Balance.c 5 @@ -3935,35 +3977,17 @@ 1 7 - - .\header_app\Main.h - 28 - 1 - 4 - - - .\HEADER_DRV\CALIBRATE.H - 33 - 1 - 5 - .\HEADER_DRV\MCUFLASH.H 79 55 64 - - .\HEADER_DRV\AFE.H - 8 - 16 - 52 - .\code_app\InterruptApp.c 63 5 - 41 + 5 .\code_drv\McuLib.c diff --git a/code_dataflash/DataFlash.c b/code_dataflash/DataFlash.c index 8b6a510..e37a7bc 100644 --- a/code_dataflash/DataFlash.c +++ b/code_dataflash/DataFlash.c @@ -17,23 +17,24 @@ V0.0 2014/09/10 Preliminary // ³äµçÆ÷Ëø¶¨ #define _EPCM_CHARGER_LOCK 0 //BIT14; 0£º²»Ö§³Ö³äµçÆ÷Ëø¶¨; 1£ºÖ§³Ö³äµçÆ÷Ëø¶¨ // ζȼì²âµã¸öÊý -#define _EPCM_TEMP_NUM 1 //BIT13; 0£ºµ¥¸öζȼì²âµã 1£ºÁ½¸öζȼì²âµã +#define _EPCM_TEMP_NUM 0 //BIT13; 0£ºµ¥¸öζȼì²âµã 1£ºÁ½¸öζȼì²âµã // LEDÏÔʾ¸öÊý #define _EPCM_LED_NUM 0 //BIT11~12; δµ÷Óà // µçо´®Êý #define _EPCM_CELL_NUM 4 //BIT8~10; µçо´®Êý£¬6~10´® // Íâ¹ÒEEPROM±¸·Ý #define _EPCM_EEPROM_EN 0 //BIT7; 0£º²»Ê¹ÄÜÍâ¹ÒEE±¸·Ý¹¦ÄÜ; 1£ºÊ¹ÄÜÍâ¹ÒEE±¸·Ý¹¦ÄÜ -// ·Åµç¹ýÁ÷MOS¿ØÖÆ +// ·Åµç¹ýÁ÷MOS¿ØÖÆ + #define _EPCM_OCPM 0 //BIT6; δµ÷Óã¨0£º·Åµç¹ýÁ÷¹Ø±Õ·Åµçmos 1£º·Åµç¹ýÁ÷¹Ø±Õ³ä·Åµçmos£© // ¶ÏÏß¼ì²â #define _EPCM_CTO_EN 1 //BIT5; 0£º²»Ê¹ÄܶÏÏß±£»¤¹¦ÄÜ; 1£ºÊ¹ÄܶÏÏß±£»¤¹¦ÄÜ // ¶þ¼¶±£»¤ #define _EPCM_PF_EN 1 //BIT4; 0£º²»Ê¹Äܶþ¼¶±£»¤¹¦ÄÜ; 1£ºÊ¹Äܶþ¼¶±£»¤¹¦ÄÜ // ¾ùºâ -#define _EPCM_BAL_EN 0 //BIT3; 0£º²»Ê¹Äܾùºâ¹¦ÄÜ£» 1£ºÊ¹Äܾùºâ¹¦ÄÜ +#define _EPCM_BAL_EN 1 //BIT3; 0£º²»Ê¹Äܾùºâ¹¦ÄÜ£» 1£ºÊ¹Äܾùºâ¹¦ÄÜ // ¹ýÁ÷×Ô»Ö¸´ -#define _EPCM_OCRC_EN 0 //BIT2; 0:²»Ê¹ÄܹýÁ÷×Ô»Ö¸´¹¦ÄÜ£» 1£ºÊ¹ÄܹýÁ÷×Ô»Ö¸´¹¦ÄÜ +#define _EPCM_OCRC_EN 1 //BIT2; 0:²»Ê¹ÄܹýÁ÷×Ô»Ö¸´¹¦ÄÜ£» 1£ºÊ¹ÄܹýÁ÷×Ô»Ö¸´¹¦ÄÜ // Ó²¼þ¹ýѹ±£»¤ #define _EPCM_OV_EN 1 //BIT1; 0:²»Ê¹ÄÜÓ²¼þ¹ýѹ¹¦ÄÜ£» 1£ºÊ¹ÄÜÓ²¼þ¹ýѹ¹¦ÄÜ // Ó²¼þ¶Ì·±£»¤ diff --git a/output/AFE.lst b/output/AFE.lst index a28a65c..1834edd 100644 --- a/output/AFE.lst +++ b/output/AFE.lst @@ -1,4 +1,4 @@ -C51 COMPILER V9.01 AFE 02/08/2025 15:18:20 PAGE 1 +C51 COMPILER V9.01 AFE 02/11/2025 15:43:03 PAGE 1 C51 COMPILER V9.01, COMPILATION OF MODULE AFE @@ -62,7 +62,7 @@ line level source 50 3 ucAfeI2CErrDelayCnt = TIME_1S_5S; 51 3 } 52 2 } - C51 COMPILER V9.01 AFE 02/08/2025 15:18:20 PAGE 2 + C51 COMPILER V9.01 AFE 02/11/2025 15:43:03 PAGE 2 53 1 else 54 1 { @@ -126,7 +126,7 @@ line level source 112 2 } 113 1 bAfeI2CRWErrFlg = !Result; //±ê¼ÇͨѶÊÇ·ñÕý³£ 114 1 - C51 COMPILER V9.01 AFE 02/08/2025 15:18:20 PAGE 3 + C51 COMPILER V9.01 AFE 02/11/2025 15:43:03 PAGE 3 115 1 return Result; 116 1 } @@ -190,7 +190,7 @@ line level source 174 3 AFEWriteReg(AFE_SCONF1, 1, ®.AFESCONF1); 175 3 } 176 2 } - C51 COMPILER V9.01 AFE 02/08/2025 15:18:20 PAGE 4 + C51 COMPILER V9.01 AFE 02/11/2025 15:43:03 PAGE 4 177 1 } 178 @@ -254,7 +254,7 @@ line level source 233 1 { 234 2 if( AFEWriteReg(AFE_INT_EN, 11, ®.AFEINTEN)) 235 2 { - C51 COMPILER V9.01 AFE 02/08/2025 15:18:20 PAGE 5 + C51 COMPILER V9.01 AFE 02/11/2025 15:43:03 PAGE 5 236 3 for(i=3; i<=11; i=i+2) 237 3 { @@ -318,7 +318,7 @@ line level source 295 2 296 2 if((REG.AFEFLAG2&0x04) != 0) //ÅжÏFLAG2µÄbit2ÊÇ·ñΪ1£¬ÈçΪ1Ôò±íʾAFE·¢Éú¹ýLVR£¬ÐèÒ -ªÖØгõʼ»¯AFE¼Ä´æÆ÷ - C51 COMPILER V9.01 AFE 02/08/2025 15:18:20 PAGE 6 + C51 COMPILER V9.01 AFE 02/11/2025 15:43:03 PAGE 6 297 2 { 298 3 AFEInit(); @@ -382,7 +382,7 @@ line level source 356 void AFEEnterPD(void) 357 { 358 1 REG.AFESCONF10 = 0x33; - C51 COMPILER V9.01 AFE 02/08/2025 15:18:20 PAGE 7 + C51 COMPILER V9.01 AFE 02/11/2025 15:43:03 PAGE 7 359 1 if(AFEWriteReg(AFE_SCONF10, 1, ®.AFESCONF10)) 360 1 { @@ -446,7 +446,7 @@ line level source 418 * ²Î Êý: BalChTemp£ºÆ½ºâ¶ÔÓ¦µÄCELL£¬Èç¹ûÈ«²¿Îª0£¬Ôò¹Ø±Õƽºâ 419 * ·µ»ØÖµ: ÎÞ 420 * Ãè Êö: ¿ªÆôºÍ¹Ø±Õƽºâ - C51 COMPILER V9.01 AFE 02/08/2025 15:18:20 PAGE 8 + C51 COMPILER V9.01 AFE 02/11/2025 15:43:03 PAGE 8 421 *************************************************************************************************/ 422 void AfeBalCtl(U16 BalChTemp) @@ -510,7 +510,7 @@ line level source 480 { 481 1 REG.AFESCONF3 &= ~0xe0; 482 1 AFEWriteReg(AFE_SCONF3, 1, ®.AFESCONF3); - C51 COMPILER V9.01 AFE 02/08/2025 15:18:20 PAGE 9 + C51 COMPILER V9.01 AFE 02/11/2025 15:43:03 PAGE 9 483 1 } 484 diff --git a/output/AFE.obj b/output/AFE.obj index a7b3ea4926e074365f0826420ee81b38a1295357..532efd3ea971f7f7214757339d5d4ed92264e048 100644 GIT binary patch delta 104 zcmcaIjrGbj)(uXK%QyW zGBHT##dx?ny0`|#y99;BxJHDy8U+OT`|5e@n_Ou86QVKCM3Panxx-|8hY8~uF#x1J BD2D(5 delta 104 zcmcaIjrGbj)(uXK%r>mcH@h;PWnz)PDx5l5jO8nfb>{iF$pt3jlhs($84qplV?C^^ z0Fq>4kkE_qaCLNX4T^UO3X5@#2yrzE2=e#U^I)D_X#5kRG0#MjQN6jtWP67R;~6mk DE&C#e diff --git a/output/Balance.lst b/output/Balance.lst index 4b3a9bc..c489031 100644 --- a/output/Balance.lst +++ b/output/Balance.lst @@ -1,4 +1,4 @@ -C51 COMPILER V9.01 BALANCE 02/08/2025 15:18:20 PAGE 1 +C51 COMPILER V9.01 BALANCE 02/11/2025 15:43:03 PAGE 1 C51 COMPILER V9.01, COMPILATION OF MODULE BALANCE @@ -62,7 +62,7 @@ line level source 47 4 } 48 3 else 49 3 { - C51 COMPILER V9.01 BALANCE 02/08/2025 15:18:20 PAGE 2 + C51 COMPILER V9.01 BALANCE 02/11/2025 15:43:03 PAGE 2 50 4 if(((uiCellVmax>E2uiBalanceVol) && (uiCellVmax-uiCellVmin)>=E2uiBalanceVolDiff) && (Info.slCurr>=E2 -siBalCurrent)) @@ -126,7 +126,7 @@ line level source 107 5 bCTOValidFlg = 0; 108 5 ucCtoCnt = 0; 109 5 } - C51 COMPILER V9.01 BALANCE 02/08/2025 15:18:20 PAGE 3 + C51 COMPILER V9.01 BALANCE 02/11/2025 15:43:03 PAGE 3 110 4 } 111 3 } @@ -190,7 +190,7 @@ line level source 168 3 AfeBalCtl(BalChTemp); //¿ªÆôƽºâ 169 3 ucBalanceStep = BALANCE_START; 170 3 bBalancingFlg = 1; - C51 COMPILER V9.01 BALANCE 02/08/2025 15:18:20 PAGE 4 + C51 COMPILER V9.01 BALANCE 02/11/2025 15:43:03 PAGE 4 171 3 } 172 2 break; @@ -254,7 +254,7 @@ line level source 230 4 uiBalanceChannel = 0x03ff; 231 4 } 232 3 } - C51 COMPILER V9.01 BALANCE 02/08/2025 15:18:20 PAGE 5 + C51 COMPILER V9.01 BALANCE 02/11/2025 15:43:03 PAGE 5 233 2 } 234 1 } diff --git a/output/Balance.obj b/output/Balance.obj index fab26ca83f8b2c635fd66e60c2092af16e1b502c..179127c68765fb80637bf7380078747e0a67238d 100644 GIT binary patch delta 100 zcmaF1f#ul-mJNQ4%mcHwQ9aWnz)PDx5l5i{&eeb>{iF$@8SdCtIH-RM^ delta 94 zcmZ3|z_O%)WrH6hvn}iL&4G+pnONkn3a3uiV)@Eqoq0ZPvNCHOqrv7ytX-@S2?K6v tM&`*r+&|?&(o76udNCfZjxMf2@h(AOF#$pTA+F9LdLHVVlX(t)1^|?D9vc7v diff --git a/output/BootIAP.lst b/output/BootIAP.lst index 7682432..39b5afb 100644 --- a/output/BootIAP.lst +++ b/output/BootIAP.lst @@ -1,4 +1,4 @@ -C51 COMPILER V9.01 BOOTIAP 02/08/2025 15:18:21 PAGE 1 +C51 COMPILER V9.01 BOOTIAP 02/11/2025 15:43:04 PAGE 1 C51 COMPILER V9.01, COMPILATION OF MODULE BOOTIAP @@ -62,7 +62,7 @@ line level source 50 0x25,0xF5,0x24,0xF5,0x23,0xE4,0xF5,0x0F,0x30,0x01,0x5E,0x25,0x26,0xF5,0x0E,0xE5, //02D0 51 0x25,0x34,0x10,0xF5,0x0D,0xE4,0x35,0x24,0xF5,0x0C,0xE4,0x35,0x23,0xF5,0x0B,0xE4, //02E0 52 0x25,0x2A,0xFF,0xE5,0x29,0x34,0x0C,0xFE,0xE4,0x35,0x28,0xFD,0xE4,0x35,0x27,0xFC, //02F0 - C51 COMPILER V9.01 BOOTIAP 02/08/2025 15:18:21 PAGE 2 + C51 COMPILER V9.01 BOOTIAP 02/11/2025 15:43:04 PAGE 2 53 0xAB,0x0E,0xAA,0x0D,0xA9,0x0C,0xA8,0x0B,0xC3,0x12,0x07,0x18,0x40,0x40,0xE4,0x25, //0300 54 0x2A,0xFB,0xE5,0x29,0x34,0x0C,0xFA,0xE4,0x35,0x28,0xF9,0xE4,0x35,0x27,0xF8,0xC3, //0310 @@ -126,7 +126,7 @@ line level source 112 0x40,0x04,0xEB,0x99,0xFB,0x0F,0xD8,0xE5,0xE4,0xF9,0xFA,0x22,0x78,0x18,0xEF,0x2F, //06B0 113 0xFF,0xEE,0x33,0xFE,0xED,0x33,0xFD,0xEC,0x33,0xFC,0xC9,0x33,0xC9,0x10,0xD7,0x05, //06C0 114 0x9B,0xE9,0x9A,0x40,0x07,0xEC,0x9B,0xFC,0xE9,0x9A,0xF9,0x0F,0xD8,0xE0,0xE4,0xC9, //06D0 - C51 COMPILER V9.01 BOOTIAP 02/08/2025 15:18:21 PAGE 3 + C51 COMPILER V9.01 BOOTIAP 02/11/2025 15:43:04 PAGE 3 115 0xFA,0xE4,0xCC,0xFB,0x22,0x75,0xF0,0x10,0xEF,0x2F,0xFF,0xEE,0x33,0xFE,0xED,0x33, //06E0 116 0xFD,0xCC,0x33,0xCC,0xC8,0x33,0xC8,0x10,0xD7,0x07,0x9B,0xEC,0x9A,0xE8,0x99,0x40, //06F0 @@ -190,7 +190,7 @@ line level source 174 0x25,0x2B,0xF5,0x82,0xE4,0x34,0x02,0xF5,0x83,0xE0,0xF5,0x99,0x22,0xE4,0xF5,0x2B, //0A90 175 0x90,0x02,0x02,0xE0,0xFD,0x24,0x08,0xF5,0x82,0xE4,0x34,0x02,0xF5,0x83,0xE0,0xFE, //0AA0 176 0x74,0x07,0x2D,0xF5,0x82,0xE4,0x34,0x02,0xF5,0x83,0xE0,0x7C,0x00,0x24,0x00,0xFF, //0AB0 - C51 COMPILER V9.01 BOOTIAP 02/08/2025 15:18:21 PAGE 4 + C51 COMPILER V9.01 BOOTIAP 02/11/2025 15:43:04 PAGE 4 177 0xEC,0x3E,0xFE,0xEF,0x65,0x32,0x70,0x03,0xEE,0x65,0x31,0x60,0x03,0x43,0x22,0x80, //0AC0 178 0xE5,0x22,0x60,0x06,0x90,0x02,0x06,0xF0,0x80,0x38,0x90,0x02,0x05,0xE0,0xFE,0xB4, //0AD0 @@ -254,7 +254,7 @@ line level source 236 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, //0E70 237 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, //0E80 238 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, //0E90 - C51 COMPILER V9.01 BOOTIAP 02/08/2025 15:18:21 PAGE 5 + C51 COMPILER V9.01 BOOTIAP 02/11/2025 15:43:04 PAGE 5 239 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, //0EA0 240 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, //0EB0 diff --git a/output/BootIAP.obj b/output/BootIAP.obj index df0685c287e203638efb8f10e8f517fe206429d0..10892226f944c6341609f17c3bafd9c4dac52d3f 100644 GIT binary patch delta 96 zcmex3i{;}imJNQ4%pLz%Z4P9-%EWT}=&JO|S}b2#eu5avtaXfbn-{Svi70?1m>4AV tVmw?OU0j3WU4p`5Tq8nUjRJ!Fef2!{O@1Qz6Qb#%lq93(=HF6fp8$v*CvX4& delta 96 zcmex3i{;}imJNQ4%(kq{HwQ9aWnz)PDx5l5i{&eeb>{iF$;zyCj3+lQVpS4R07)=0 vNa)3QxH`JH2F1Gsg~hl=gt!_71o`{wc`#3YBKZ@d>7kS)qx$CGQe~e2I0qqc diff --git a/output/BootLoad b/output/BootLoad index 76510afb1fea5f45acaf7bda479b2dc55c3f56ed..7cc95839614e87f829fc90a08e9e58ef37052c76 100644 GIT binary patch delta 615 zcmey;&OEb)S+QU>_@w;&lAQd+l+>aa-^9#3y=0}yJ6YT&R;seN z99fk6zGB@)Sd{!v3y(`$r_`hRv7mM8F zT`V~ejasbBaBA|n(8%OPz+FrXAVsoR9q;HA?C9*Q=ixv32HQ-Cb*1bU%-aj@PTs(- zD1BDFGgVM8Ccm_#ptK~$2^f4nz~EzM0E$n3!!9Y!RIoH1ArB7I{G==vu)G3?csNME z5L~}oPGWI}9$3LSpo9oqA~?h`C?qrhBDKQ2*&EZbKAui7z@QD*12XP!?%`O?s-Xt< l7ZU>k@4w$1%O~9*K&Hl_@w;&lAQd+l+>aa-^9#3y<{Z?|9}urU(YC4 z4GW#%09RKR&54THEMB~=sS_tGsXrJK8tfVr924&9=Mn0t7w+ii9^>K~>>c7C0Hl5W zx9{DsLk*-v!9CQ|#r5*h-Ron5J&Y~g3=E9bfP_grNR_j{i)(zCk)EMxype&Cv7wQn zF>$KYh*LIsp^xz72R>YrWto-rm>4cJGI_~3Tg7<0diunNnZ^LUALHrg48$Qpo_@i4 z9<~L>O#kPCLuGP2lY}sqK$v`yF&`WXlU}4$egvTdGbeAQF9=jDykQgUs_U7S`y;~%q~8_?4p;GSHQy1$lsDG2$uurpZugO z76y=BTQ+eSkX|9UyjxCUafTjPK{il90h> \BootLoad PRINT (.\output\BootLoad.m51) RAMSIZE (256) DISABLEWARNING (16) CODE (0X0000-0X0FFF, ?PR?BOOTIAPISP?IAPISP ->> (0XA6)) +D:\TOOL\KEIL\C51\BIN\BL51.EXE .\output\Main.obj, .\output\IapIsp.obj, .\output\Flash.obj, .\output\STARTUP.obj TO .\outp +>> ut\BootLoad PRINT (.\output\BootLoad.m51) RAMSIZE (256) DISABLEWARNING (16) CODE (0X0000-0X0FFF, ?PR?BOOTIAPISP?IAPIS +>> P (0XA6)) MEMORY MODEL: SMALL @@ -15,12 +15,12 @@ INPUT MODULES INCLUDED: .\output\IapIsp.obj (IAPISP) .\output\Flash.obj (FLASH) .\output\STARTUP.obj (?C_STARTUP) - C:\KEIL_V5\C51\LIB\C51S.LIB (?C?IMUL) - C:\KEIL_V5\C51\LIB\C51S.LIB (?C?ULDIV) - C:\KEIL_V5\C51\LIB\C51S.LIB (?C?ULCMP) - C:\KEIL_V5\C51\LIB\C51S.LIB (?C?ULSHR) - C:\KEIL_V5\C51\LIB\C51S.LIB (?C?LSHL) - C:\KEIL_V5\C51\LIB\C51S.LIB (?C?LIMUL) + D:\TOOL\KEIL\C51\LIB\C51S.LIB (?C?IMUL) + D:\TOOL\KEIL\C51\LIB\C51S.LIB (?C?ULDIV) + D:\TOOL\KEIL\C51\LIB\C51S.LIB (?C?ULCMP) + D:\TOOL\KEIL\C51\LIB\C51S.LIB (?C?ULSHR) + D:\TOOL\KEIL\C51\LIB\C51S.LIB (?C?LSHL) + D:\TOOL\KEIL\C51\LIB\C51S.LIB (?C?LIMUL) LINK MAP OF MODULE: .\output\BootLoad (MAIN) @@ -59,7 +59,7 @@ LINK MAP OF MODULE: .\output\BootLoad (MAIN) CODE 002BH 0003H ABSOLUTE 002EH 0005H *** GAP *** CODE 0033H 0003H ABSOLUTE - BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 2 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 2 0036H 0005H *** GAP *** @@ -119,7 +119,7 @@ LINK MAP OF MODULE: .\output\BootLoad (MAIN) OVERLAY MAP OF MODULE: .\output\BootLoad (MAIN) - BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 3 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 3 @@ -179,7 +179,7 @@ SEGMENT BIT_GROUP DATA_GROUP ?PR?IAPRECEIVEDATA?IAPISP ----- ----- 0008H 0008H +--> ?PR?IAPWRSECTOR?IAPISP +--> ?PR?_MCUFLASHERASESECTOR?FLASH - BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 4 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 4 +--> ?PR?_MCUFLASHBLANKCHECK?FLASH @@ -239,7 +239,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN) D:009EH PUBLIC SFINE ------- PROC INITGPIO C:0D0DH LINE# 23 - BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 5 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 5 C:0D0DH LINE# 24 @@ -299,7 +299,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN) C:0C4EH LINE# 606 C:0C50H LINE# 607 C:0C53H LINE# 608 - BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 6 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 6 C:0C58H LINE# 609 @@ -359,7 +359,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN) C:0BDEH PUBLIC IapCmdReset D:0027H PUBLIC ulIapRecDataLen D:00B1H PUBLIC RSTSTAT - BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 7 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 7 C:0A1BH PUBLIC UartSendAck @@ -419,7 +419,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN) C:0D0AH LINE# 83 C:0D0CH LINE# 84 C:0D0CH LINE# 85 - BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 8 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 8 ------- ENDPROC IAPHANDSHAKE @@ -479,7 +479,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN) C:059EH LINE# 154 C:05A3H LINE# 155 C:05A5H LINE# 157 - BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 9 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 9 C:05A5H LINE# 158 @@ -539,7 +539,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN) C:0965H LINE# 220 C:0967H LINE# 221 C:0969H LINE# 222 - BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 10 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 10 C:0969H LINE# 223 @@ -599,7 +599,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN) C:0337H LINE# 287 C:0339H LINE# 289 C:0339H LINE# 290 - BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 11 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 11 C:034EH LINE# 291 @@ -659,7 +659,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN) C:0BF3H LINE# 370 C:0C00H LINE# 371 C:0C00H LINE# 372 - BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 12 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 12 C:0C03H LINE# 373 @@ -719,7 +719,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN) C:00A6H LINE# 444 C:00A6H LINE# 445 C:00AFH LINE# 446 - BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 13 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 13 C:00B7H LINE# 447 @@ -779,7 +779,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN) C:0186H LINE# 515 C:0189H LINE# 516 C:018CH LINE# 517 - BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 14 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 14 C:018CH LINE# 518 @@ -839,7 +839,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN) D:00FBH PUBLIC IB_OFFSET D:00B1H PUBLIC RSTSTAT D:00A7H PUBLIC FLASHCON - BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 15 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 15 C:0D38H PUBLIC BootUpgradeCode @@ -899,7 +899,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN) C:0CC5H LINE# 74 C:0CCFH LINE# 75 C:0CD2H LINE# 77 - BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 16 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 16 C:0CD4H LINE# 78 @@ -959,7 +959,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN) D:0008H SYMBOL i D:0009H SYMBOL McuCode D:000AH SYMBOL McuFlashType - BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 17 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 17 D:000BH SYMBOL j @@ -1019,7 +1019,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN) C:0D5DH LINE# 209 ------- ENDPROC BOOTUPGRADECODE ------- ENDMOD FLASH - BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 18 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 18 @@ -1079,7 +1079,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN) ------- ENDMOD ?C?IMUL ------- MODULE ?C?ULDIV - BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 19 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 19 C:0686H PUBLIC ?C?ULDIV diff --git a/output/BootLoad.plg b/output/BootLoad.plg new file mode 100644 index 0000000..e69de29 diff --git a/output/Calculate.lst b/output/Calculate.lst index 5e597c7..04eb15d 100644 --- a/output/Calculate.lst +++ b/output/Calculate.lst @@ -1,4 +1,4 @@ -C51 COMPILER V9.01 CALCULATE 02/08/2025 15:18:20 PAGE 1 +C51 COMPILER V9.01 CALCULATE 02/11/2025 15:43:03 PAGE 1 C51 COMPILER V9.01, COMPILATION OF MODULE CALCULATE @@ -62,7 +62,7 @@ line level source 49 2 if(Tempcalcu > NTC103AT[i]) 50 2 { 51 3 for(i=ucTempeMiddle-1; i>=0; i--) - C51 COMPILER V9.01 CALCULATE 02/08/2025 15:18:20 PAGE 2 + C51 COMPILER V9.01 CALCULATE 02/11/2025 15:43:03 PAGE 2 52 3 { 53 4 if(Tempcalcu <= NTC103AT[i]) //NTC103AT[i+1] E2siDfilterCur) @@ -510,7 +510,7 @@ line level source 483 *************************************************************************************************/ 484 void AFEInfoProcess(void) 485 { - C51 COMPILER V9.01 CALCULATE 02/08/2025 15:18:20 PAGE 9 + C51 COMPILER V9.01 CALCULATE 02/11/2025 15:43:03 PAGE 9 486 1 AFERdFlg(); 487 1 diff --git a/output/Calculate.obj b/output/Calculate.obj index 49790745da58a9507fa969ca973c8697199b2a87..f8ea95e60d385e3e6ed6a27ac4673bd4fe2e444c 100644 GIT binary patch delta 80 zcmccgiRIEKmJK0{%mcH-|IcWMYxODx5mmgyk!Xb>{iF$-1m{jJccFuwGDxNHl0l eGcr$}qxq8!B+bMCR3Of%-n?0B`(`c1`FsGixf~Aw diff --git a/output/Calibrate.lst b/output/Calibrate.lst index 4471648..6c5aef3 100644 --- a/output/Calibrate.lst +++ b/output/Calibrate.lst @@ -1,4 +1,4 @@ -C51 COMPILER V9.01 CALIBRATE 02/08/2025 15:18:20 PAGE 1 +C51 COMPILER V9.01 CALIBRATE 02/11/2025 15:43:03 PAGE 1 C51 COMPILER V9.01, COMPILATION OF MODULE CALIBRATE @@ -62,7 +62,7 @@ line level source 50 1 TempGain = (S32)CALICUR*(AFE.siCurr-E2siCadcOffset)/slExtCur; 51 1 if(TempGain != 0) 52 1 { - C51 COMPILER V9.01 CALIBRATE 02/08/2025 15:18:20 PAGE 2 + C51 COMPILER V9.01 CALIBRATE 02/11/2025 15:43:03 PAGE 2 53 2 E2siCadcGain = TempGain; 54 2 } @@ -126,7 +126,7 @@ line level source 112 1 RTC.Month = ucExtRTC[4]; 113 1 RTC.Year = ucExtRTC[5]; 114 1 RTC.Week = ucExtRTC[6]; - C51 COMPILER V9.01 CALIBRATE 02/08/2025 15:18:20 PAGE 3 + C51 COMPILER V9.01 CALIBRATE 02/11/2025 15:43:03 PAGE 3 115 1 116 1 RTCModifyTime(&RTC); @@ -190,7 +190,7 @@ line level source 174 175 - C51 COMPILER V9.01 CALIBRATE 02/08/2025 15:18:20 PAGE 4 + C51 COMPILER V9.01 CALIBRATE 02/11/2025 15:43:03 PAGE 4 MODULE INFORMATION: STATIC OVERLAYABLE diff --git a/output/Calibrate.obj b/output/Calibrate.obj index 59dad727a7e6d185ec49a21506130088e3b3b9f4..1535da875dd8e8c15e3295396c4dd54ac831aa7c 100644 GIT binary patch delta 96 zcmcbylI6xqmJK0{%L^qI delta 96 zcmcbylI6xqmJK0{%r>mcH-|IcWMYxODx5mmgyk!Xb>{iF$-1m{j5eFsu!;*RfFzh0 vB=llDTpe9pgW_F+!eU$_LR^gkg8Y5;JeVgx7W)a&^gvvaQGN3-@q2#&8Pp+E diff --git a/output/ChargerLoad.lst b/output/ChargerLoad.lst index fad50f1..2704baa 100644 --- a/output/ChargerLoad.lst +++ b/output/ChargerLoad.lst @@ -1,4 +1,4 @@ -C51 COMPILER V9.01 CHARGERLOAD 02/08/2025 15:18:20 PAGE 1 +C51 COMPILER V9.01 CHARGERLOAD 02/11/2025 15:43:04 PAGE 1 C51 COMPILER V9.01, COMPILATION OF MODULE CHARGERLOAD @@ -62,7 +62,7 @@ line level source 50 4 bOCD2 = 0; 51 4 if(bAFE_SC) 52 4 { - C51 COMPILER V9.01 CHARGERLOAD 02/08/2025 15:18:20 PAGE 2 + C51 COMPILER V9.01 CHARGERLOAD 02/11/2025 15:43:04 PAGE 2 53 5 bAFE_SC = 0; 54 5 AFEClrFlg(); //Çå³ý¶Ì·±£»¤±êÖ¾ diff --git a/output/ChargerLoad.obj b/output/ChargerLoad.obj index df055cd08d73747de793b4c371d223988fed9691..6172a17fd8cc13ea797cf6e2564c1a96bbcad42c 100644 GIT binary patch delta 103 zcmcaSh2`=TmJLyi%pLz%O^#)hVX2t8GJSI`<6b6~+ecTWPqt(E%JLJ$FlVh}oU(Zv z>qT}pkP=3Q$+e8)jJGx~<$ce@22#qz08}i=xNq_nfu9g98wDj9H8-CY?Dzoy*Ly2t delta 103 zcmcaSh2`=TmJLyi%r>mcC&x0%u<%7rOx|3}xR;4V{;F{5WIL9xEY_Ll<0hN4)-gWY zyp8oDI~zy|Bg5ocMsdako0sywXJP{>Wnus-mSkj}yhY$AM9W4&Nk;X}rv*EH00159 BBVzyn diff --git a/output/DataFlash.lst b/output/DataFlash.lst index 7dbdfef..de94d01 100644 --- a/output/DataFlash.lst +++ b/output/DataFlash.lst @@ -1,4 +1,4 @@ -C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 1 +C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 1 C51 COMPILER V9.01, COMPILATION OF MODULE DATAFLASH @@ -27,7 +27,7 @@ line level source 17 // ³äµçÆ÷Ëø¶¨ 18 #define _EPCM_CHARGER_LOCK 0 //BIT14; 0£º²»Ö§³Ö³äµçÆ÷Ëø¶¨; 1£ºÖ§³Ö³äµçÆ÷Ëø¶¨ 19 // ζȼì²âµã¸öÊý - 20 #define _EPCM_TEMP_NUM 1 //BIT13; 0£ºµ¥¸öζȼì²âµã 1£ºÁ½¸öζȼì²âµã + 20 #define _EPCM_TEMP_NUM 0 //BIT13; 0£ºµ¥¸öζȼì²âµã 1£ºÁ½¸öζȼì²âµã 21 // LEDÏÔʾ¸öÊý 22 #define _EPCM_LED_NUM 0 //BIT11~12; δµ÷Óà 23 // µçо´®Êý @@ -42,9 +42,9 @@ line level source 31 // ¶þ¼¶±£»¤ 32 #define _EPCM_PF_EN 1 //BIT4; 0£º²»Ê¹Äܶþ¼¶±£»¤¹¦ÄÜ; 1£ºÊ¹Äܶþ¼¶±£»¤¹¦ÄÜ 33 // ¾ùºâ - 34 #define _EPCM_BAL_EN 0 //BIT3; 0£º²»Ê¹Äܾùºâ¹¦ÄÜ£» 1£ºÊ¹Äܾùºâ¹¦ÄÜ + 34 #define _EPCM_BAL_EN 1 //BIT3; 0£º²»Ê¹Äܾùºâ¹¦ÄÜ£» 1£ºÊ¹Äܾùºâ¹¦ÄÜ 35 // ¹ýÁ÷×Ô»Ö¸´ - 36 #define _EPCM_OCRC_EN 0 //BIT2; 0:²»Ê¹ÄܹýÁ÷×Ô»Ö¸´¹¦ÄÜ£» 1£ºÊ¹ÄܹýÁ÷×Ô»Ö¸´¹¦ÄÜ + 36 #define _EPCM_OCRC_EN 1 //BIT2; 0:²»Ê¹ÄܹýÁ÷×Ô»Ö¸´¹¦ÄÜ£» 1£ºÊ¹ÄܹýÁ÷×Ô»Ö¸´¹¦ÄÜ 37 // Ó²¼þ¹ýѹ±£»¤ 38 #define _EPCM_OV_EN 1 //BIT1; 0:²»Ê¹ÄÜÓ²¼þ¹ýѹ¹¦ÄÜ£» 1£ºÊ¹ÄÜÓ²¼þ¹ýѹ¹¦ÄÜ 39 // Ó²¼þ¶Ì·±£»¤ @@ -62,7 +62,7 @@ line level source 50 // 10%ÈÝÁ¿¶ÔÓ¦µçѹ 51 #define _E2_VOC10 3200 //U16 xdata VOC10 52 // 20%ÈÝÁ¿¶ÔÓ¦µçѹ - C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 2 + C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 2 53 #define _E2_VOC20 3400 //U16 xdata VOC10 54 // 30%ÈÝÁ¿¶ÔÓ¦µçѹ @@ -126,7 +126,7 @@ line level source 112 #define _E2_DeviceName "SH39F003" // U8 xdata DeviceName[12] 113 // µçо²ÄÁÏ 114 #define _E2_DeviceChem "LION" // U8 xdata DeviceChem[12] - C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 3 + C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 3 115 // µçо»¯Ñ§ID<0x0000-0xffff> 116 #define _E2_ChemID 0x0000 // U16 xdata ChemID @@ -190,7 +190,7 @@ line level source 174 #define _E2_DSG1PWMRatioL 30 // U8 xdata DSG1PWMRatioL 175 // PWM¸ßµµÕ¼¿Õ±È(%) 176 #define _E2_DSG1PWMRatioH 70 // U8 xdata DSG1PWMRatioH - C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 4 + C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 4 177 #define _E2_ucRamCheckFlg5 _RAM_CHECK_DATA // U8 xdata E2ucRamCheckFlg5 178 // @@ -254,7 +254,7 @@ line level source 236 // AFE²ÎÊý(SubClassID=0x0A length=4) 237 // ±£»¤ÅäÖà 238 #define _E2_AFEProtectConfig 0x74 // U8 xdata AFEProtectConfig - C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 5 + C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 5 239 // Ó²¼þ¹ýѹ±£»¤ãÐÖµ 240 #define _E2_AFEOVvol 4400 // U16 xdata AFEOVvol @@ -318,7 +318,7 @@ line level source 286 unsigned char E2ucChgBKDelay; 287 unsigned int E2siChgBKCur; 288 unsigned char E2ucRTCBKDelay; - C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 6 + C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 6 289 unsigned char E2ucRamCheckFlg0; 290 @@ -382,7 +382,7 @@ line level source 348 unsigned int TempOTDR; 349 unsigned int TempUTD; 350 unsigned int TempUTDR; - C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 7 + C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 7 351 unsigned char E2ucRamCheckFlg7; 352 @@ -446,7 +446,7 @@ line level source 408 _E2_VOC30, //U16 xdata VOC30 409 _E2_VOC40, //U16 xdata VOC40 410 _E2_VOC50, //U16 xdata VOC50 - C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 8 + C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 8 411 _E2_VOC60, //U16 xdata VOC60 412 _E2_VOC70, //U16 xdata VOC70 @@ -510,7 +510,7 @@ line level source 470 //·ÅµçPWM²ÎÊýÇø¿ªÊ¼ SubClassID=0x05 langth=5 471 _E2_DSG1PWMFreq, //U16 xdata DSG1PWMFreq 472 _E2_DSG1PWMRatioL, //U8 xdata DSG1PWMRatioL - C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 9 + C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 9 473 _E2_DSG1PWMRatioH, //U8 xdata DSG1PWMRatioH 474 _E2_ucRamCheckFlg5, //U8 xdata E2ucRamCheckFlg5 @@ -574,7 +574,7 @@ line level source 530 /********************************************************************************************************* -********/ 531 //ϵͳÐÅÏ¢Çø¿ªÊ¼ SubClassID=0x00 langth=48 - C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 10 + C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 10 532 { 533 _E2_PACKCONFIGMAP, //U16 xdata E2uiPackConfigMap @@ -638,7 +638,7 @@ line level source 591 _E2_ucDelayOCD, //U8 xdata E2ucDelayOCD 592 _E2_slOCD2vol, //S32 xdata E2slOCD2vol 593 _E2_ucDelayOCD2, //U8 xdata E2ucDelayOCD2 - C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 11 + C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 11 594 _E2_ucDelayLoadR, //U8 xdata E2ucDelayLoadR 595 _E2_ucRamCheckFlg3, //U8 xdata E2ucRamCheckFlg3 @@ -702,7 +702,7 @@ line level source 653 }; 654 655 //*** <<< end of configuration section >>> *** - C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 12 + C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 12 diff --git a/output/DataFlash.obj b/output/DataFlash.obj index 0f9be96253860e16df3bab2051fad7c24ae4c77b..58564ffc54e5510b9918d970b50164e10cf3c4dd 100644 GIT binary patch delta 89 zcmdl#lX3q{#tF-mTK=y}7t@Q$FD)r3Es1eSEJ<|BNi5FL%TLN;WJm={N=@XFVpN~_ mIGf3yadQCUKSmhMXujE>bv_$2P|@U%+;WWHHVg2qcK`qz?IB74 delta 89 zcmdl#lX3q{#tF-msu-51i|NJWmzETimc+OumL$66Bo=4rlZ} mcqx-Ts&TwprXl|JaUZRHhb`_cK`rdZ6YcF delta 89 zcmex9lkxjZ#tF+5s~DE2i|NJWmzETimc+OumL$66Bo=4r+nc3DolL5 ll*w3ea~I=3Mi|W~w7HXYE*mpY(PT{?ImXAEJ$TkT007O1A1VL< diff --git a/output/Eeprom.hex b/output/Eeprom.hex index d3d3eaa..35ff62d 100644 --- a/output/Eeprom.hex +++ b/output/Eeprom.hex @@ -1,4 +1,4 @@ -:1000000033210C800D480DDE0E740ED80F3C0FA06E +:100000003F010C800D480DDE0E740ED80F3C0FA082 :1000100010041036106800000FA000000FA00000B0 :100020000BB800000B410000006414010064055A85 :10003000021501300073696E6F7765616C7468003A @@ -30,7 +30,7 @@ :1001D000000000000000000000000000000000001F :1001E000000000000000000000000000000000000F :1001F00000000000000000000000000000005AA500 -:1002000033210C800D480DDE0E740ED80F3C0FA06C +:100200003F010C800D480DDE0E740ED80F3C0FA080 :1002100010041036106800000FA000000FA00000AE :100220000BB800000B410000006414010064055A83 :10023000021501300073696E6F7765616C74680038 diff --git a/output/Eeprom.m51 b/output/Eeprom.m51 index e498480..98cddef 100644 --- a/output/Eeprom.m51 +++ b/output/Eeprom.m51 @@ -1,4 +1,4 @@ -BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 14:58:03 PAGE 1 +BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:01 PAGE 1 BL51 BANKED LINKER/LOCATER V6.22, INVOKED BY: diff --git a/output/ExtE2PRom.lst b/output/ExtE2PRom.lst index 68f0d1c..0679da4 100644 --- a/output/ExtE2PRom.lst +++ b/output/ExtE2PRom.lst @@ -1,4 +1,4 @@ -C51 COMPILER V9.01 EXTE2PROM 02/08/2025 15:18:20 PAGE 1 +C51 COMPILER V9.01 EXTE2PROM 02/11/2025 15:43:04 PAGE 1 C51 COMPILER V9.01, COMPILATION OF MODULE EXTE2PROM @@ -62,7 +62,7 @@ line level source 49 3 if(++ucE2PTwiRWErrDelayCnt >= TIME_1S_5S) 50 3 { 51 4 bE2PRErr = 1; - C51 COMPILER V9.01 EXTE2PROM 02/08/2025 15:18:20 PAGE 2 + C51 COMPILER V9.01 EXTE2PROM 02/11/2025 15:43:04 PAGE 2 52 4 ucE2PTwiRWErrDelayCnt = TIME_1S_5S; 53 4 } @@ -126,7 +126,7 @@ line level source 111 1 if(!bE2PRErr) 112 1 { 113 2 for(i=0; i<5; i++) - C51 COMPILER V9.01 EXTE2PROM 02/08/2025 15:18:20 PAGE 3 + C51 COMPILER V9.01 EXTE2PROM 02/11/2025 15:43:04 PAGE 3 114 2 { 115 3 #ifdef TWI_Hardware_Module @@ -190,7 +190,7 @@ line level source 173 1 174 1 Result = E2PRomRead(E2PROM_BOOT_ADDR, 8, RdBuf); 175 1 - C51 COMPILER V9.01 EXTE2PROM 02/08/2025 15:18:20 PAGE 4 + C51 COMPILER V9.01 EXTE2PROM 02/11/2025 15:43:04 PAGE 4 176 1 RdBuf[2] = RdBuf[0]+RdBuf[1]; 177 1 RdBuf[6] = RdBuf[4]+RdBuf[5]; @@ -254,7 +254,7 @@ line level source 235 1 WrBuf[5] = WrBuf[1]; 236 1 WrBuf[7] = WrBuf[3]; 237 1 - C51 COMPILER V9.01 EXTE2PROM 02/08/2025 15:18:20 PAGE 5 + C51 COMPILER V9.01 EXTE2PROM 02/11/2025 15:43:04 PAGE 5 238 1 E2PRomWrite(E2PROM_BOOT_ADDR, 8, WrBuf); 239 1 } @@ -318,7 +318,7 @@ line level source 297 2 } 298 1 299 1 E2PRomBKBoot(); - C51 COMPILER V9.01 EXTE2PROM 02/08/2025 15:18:20 PAGE 6 + C51 COMPILER V9.01 EXTE2PROM 02/11/2025 15:43:04 PAGE 6 300 1 } 301 @@ -382,7 +382,7 @@ line level source 356 * º¯ÊýÃû: UartRdRTC 357 * ²Î Êý: ÎÞ 358 * ·µ»ØÖµ: ÎÞ - C51 COMPILER V9.01 EXTE2PROM 02/08/2025 15:18:20 PAGE 7 + C51 COMPILER V9.01 EXTE2PROM 02/11/2025 15:43:04 PAGE 7 359 * Ãè Êö: ¶ÁÈ¡RTCʱ¼ä£ºÃë¡¢·Ö¡¢Ê±¡¢ÈÕ¡¢Ô¡¢Ä꣬²¢·µ»Ø¸øUART 360 *************************************************************************************************/ @@ -446,7 +446,7 @@ line level source 418 2 { 419 3 bE2PErase = 0; 420 3 E2PRomErase(); - C51 COMPILER V9.01 EXTE2PROM 02/08/2025 15:18:20 PAGE 8 + C51 COMPILER V9.01 EXTE2PROM 02/11/2025 15:43:04 PAGE 8 421 3 } 422 2 @@ -510,7 +510,7 @@ line level source 480 3 } 481 2 482 2 if(bE2PBKDsgEnd) - C51 COMPILER V9.01 EXTE2PROM 02/08/2025 15:18:20 PAGE 9 + C51 COMPILER V9.01 EXTE2PROM 02/11/2025 15:43:04 PAGE 9 483 2 { 484 3 bE2PBKDsgEnd = 0; @@ -574,7 +574,7 @@ line level source 542 3 { 543 4 RTCReadTime(&RTC); 544 4 MemoryCopy((U8 xdata *)&RTC, ucRTCBuf, 7); - C51 COMPILER V9.01 EXTE2PROM 02/08/2025 15:18:20 PAGE 10 + C51 COMPILER V9.01 EXTE2PROM 02/11/2025 15:43:04 PAGE 10 545 4 } 546 3 diff --git a/output/ExtE2PRom.obj b/output/ExtE2PRom.obj index ae44b5227c435ed9d6e62a7bcc92b6a5401456e3..af9e10eae78b9a767a8ee4d32fbec86aee42400b 100644 GIT binary patch delta 102 zcmbQejdk`m)(s(y%pLz%Z4PI=$;5K|=&JO|CM;iBeu5aftaXg_o7b>587qJ!m>4AV zVmw?OU0j3WU4p`5Tq8nUjRJ!Fef2!{P4=_=$p+HI!~oPL&Zya(YPCJpigB9)0AH&n A&Hw-a delta 102 zcmbQejdk`m)(s(y%r>mcH-|IcWMYxODx5mmgyk!Xb>{iF$-1m{jNF^our?VhfFzh0 zB=llDTpe9pgW_F+!eU$_LR^gkg8Y5;JeVi@S^i`LX<}jkY7=KvZ%(z^o@&LoO#uL^ CZy(M8 diff --git a/output/Flash.lst b/output/Flash.lst index 6e6e23b..d04fad2 100644 --- a/output/Flash.lst +++ b/output/Flash.lst @@ -1,10 +1,10 @@ -C51 COMPILER V9.01 FLASH 12/22/2023 12:15:06 PAGE 1 +C51 COMPILER V9.01 FLASH 02/11/2025 11:30:12 PAGE 1 C51 COMPILER V9.01, COMPILATION OF MODULE FLASH OBJECT MODULE PLACED IN .\output\Flash.obj -COMPILER INVOKED BY: C:\Keil_v5\C51\BIN\C51.EXE code_bootloader\Flash.c OPTIMIZE(8,SPEED) BROWSE INCDIR(.\header_bootloa - -der) DEBUG OBJECTEXTEND PRINT(.\output\Flash.lst) OBJECT(.\output\Flash.obj) +COMPILER INVOKED BY: D:\Tool\Keil\C51\BIN\C51.EXE code_bootloader\Flash.c BROWSE INCDIR(.\header_bootloader) DEBUG OBJEC + -TEXTEND PRINT(.\output\Flash.lst) OBJECT(.\output\Flash.obj) line level source @@ -62,7 +62,7 @@ line level source 52 1 } 53 54 - C51 COMPILER V9.01 FLASH 12/22/2023 12:15:06 PAGE 2 + C51 COMPILER V9.01 FLASH 02/11/2025 11:30:12 PAGE 2 55 /************************************************************************************************* 56 * º¯ÊýÃû: McuFlashBlankCheck @@ -126,7 +126,7 @@ line level source 114 3 } 115 2 } 116 1 - C51 COMPILER V9.01 FLASH 12/22/2023 12:15:06 PAGE 3 + C51 COMPILER V9.01 FLASH 02/11/2025 11:30:12 PAGE 3 117 1 FLASHCON = MCU_TYPE_CODE; 118 1 } @@ -190,7 +190,7 @@ line level source 174 5 return (BOOT_PGR_WR_ERR); 175 5 } 176 4 } - C51 COMPILER V9.01 FLASH 12/22/2023 12:15:06 PAGE 4 + C51 COMPILER V9.01 FLASH 02/11/2025 11:30:12 PAGE 4 177 3 } 178 2 else diff --git a/output/Flash.obj b/output/Flash.obj index d160454255682088041479d4eff4ba240d66bf32..923e266a3ca7551c011fb9d27e51f03f4105534d 100644 GIT binary patch delta 197 zcmcbUcQBW$U?b!I4rfzC1*M7m#Tk_*n&h&$99fk5vB!xek_g#>x}1?zddPgI2}#BXZ#=A~lW6#!YGJXin# delta 353 zcmX?@dnb>pAb{!rEN4?g1*M5=#f6m=`~yNfeLbUGH7s<316*BQG$$(MvUu^frcRu^ zto~q3Xs~Nga7?(XpGT;pUbv&5dyI=~uy=@m0Fd_e-@bRl4mFSx1@}--7uU;2cdw5L z_As_|GcYh#0}>|jAXU!(F0S!mMtX*(@kRzl#)d|Q#>A;oBTm_5Uq)qa8E2~)Z&y#B z_%PGSwTu$7(g=PG(7Q37e$FwDPQi}O&Uzlro3}8siTJ26TxewSVq!qj3Rmjs7ZT*@ W7p&*8BvBcv44;Vxo4LfcD*ymfB4s@Q diff --git a/output/GasGaugeInter_V4_13.lst b/output/GasGaugeInter_V4_13.lst index 4a99cf5..ebba02e 100644 --- a/output/GasGaugeInter_V4_13.lst +++ b/output/GasGaugeInter_V4_13.lst @@ -1,4 +1,4 @@ -C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/08/2025 15:18:21 PAGE 1 +C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/11/2025 15:43:04 PAGE 1 C51 COMPILER V9.01, COMPILATION OF MODULE GASGAUGEINTER_V4_13 @@ -62,7 +62,7 @@ line level source 48 //U32 xdata E2ulCycleThreshold; //Ñ­»·´ÎÊý¸üÐÂãÐÖµ£¬±äÁ¿ÀàÐÍ£ºU32 xdata£¨ÊäÈ룩 49 //U32 xdata E2ulCycleThresholdCount;//Ñ­»·µçÁ¿¼ÆÊý£¬±äÁ¿ÀàÐÍ£ºU32 xdata£¨ÊäÈë\Êä³ö´æÈëE2£© 50 //U16 xdata E2uiCycleCount; //Ñ­»·´ÎÊý£¬±äÁ¿ÀàÐÍ£ºU16 xdata£¨ÊäÈë\Êä³ö´æÈëE2£© - C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/08/2025 15:18:21 PAGE 2 + C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/11/2025 15:43:04 PAGE 2 51 //U16 xdata E2uiLastCCount; //ÉϴθüÐÂÈÝÁ¿Ê±µÄÑ­»·´ÎÊý £¬±äÁ¿ÀàÐÍ£ºU16 xdata£¨ÊäÈë\Êä³ö´æÈëE2£© 52 //S16 xdata E2siDfilterCur; //ÁãµçÁ÷´°¿Ú£¬±äÁ¿ÀàÐÍ£ºS16 xdata£¨ÊäÈ룩 @@ -126,7 +126,7 @@ line level source 101 U16 data uiCellVminG; //µ±Ç°µçѹ×îµÍµÄµçоµçѹ£¬±äÁ¿ÀàÐÍ£ºU16 data£¨ÊäÈ룩 102 //U8 data ucCellNum; //µçо´®Êý£¬±äÁ¿ÀàÐÍ£ºU8 data£¨ÊäÈ룩 103 //S32 xdata slCadcCurAverage; //ÓÃÓÚ¿âÂ×»ý·ÖµÄƽ¾ùµçÁ÷£¨Ö÷¿Ø³ä·Åµç»Ø·£©£¬±äÁ¿ÀàÐÍ£ºS32 xdata£¨ÊäÈ룩 - C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/08/2025 15:18:21 PAGE 3 + C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/11/2025 15:43:04 PAGE 3 104 S32 xdata slAdcCur2; //ÓÃÓÚ¿âÂ×»ý·ÖµÄƽ¾ùµçÁ÷£¨¸¨¿Ø·Åµç»Ø·£¬ÈçûÓпÉÒÔºãΪ0£©£¬±äÁ¿ÀàÐÍ£ºS32 xdata£¨ÊäÈ -룩 @@ -190,7 +190,7 @@ line level source 162 1 163 1 E2ucFccUpdatePercent = 30; 164 1 E2uiChgEndTemp = (15*10 + 2731); - C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/08/2025 15:18:21 PAGE 4 + C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/11/2025 15:43:04 PAGE 4 165 1 E2uiDsgEndTemp = (15*10 + 2731); 166 1 @@ -254,7 +254,7 @@ line level source 224 1 EA = eabak; 225 1 226 1 // if( bOV ) - C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/08/2025 15:18:21 PAGE 5 + C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/11/2025 15:43:04 PAGE 5 227 1 // { 228 1 // E2ucSOC = 100; diff --git a/output/GasGaugeInter_V4_13.obj b/output/GasGaugeInter_V4_13.obj index 49968feb8cfad6cd29f2b0e9e1c6c2472fd000d7..acb2a2be8bb3bc01866846b7313ee576483345a4 100644 GIT binary patch delta 93 zcmX@Ki{;QRmJQ{M%pLz%ZLVVc#Kdy@=&JO|1uUOgeu5bFvf`8LSkoE(H$P*o5n}^M oGBE(9CAsz`sxsWJDM|%$`&r~Buavm}(NQZa$*8$`y6o!z0DjjeTL1t6 delta 93 zcmX@Ki{;QRmJQ{M%(kq{H&-!!Vq%fMDx5mGfaNobb>{iF$@Q}0lj~U18E>8); 54 1 - C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 2 + C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 2 55 1 bUartSndOverFlg = 0; 56 1 UartTxEn(ucUartBuf[ucUartBufPT]); @@ -126,7 +126,7 @@ line level source 114 2 ucUartBuf[INDEXES] = IAPERROR_SIZE; //Èç¹ûÊý¾Ý³¤¶È²»µÈÓÚIAPºÍISP³¤¶È£¬Ôò -ĬÈÏΪ³¤¶ÈÒì³£ 115 2 } - C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 3 + C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 3 116 1 else if((ulIapRecDataLen > ISP_CODE_SIZE) && (bIapIspFlg == ISP_MODE)) 117 1 { @@ -190,7 +190,7 @@ line level source 173 4 if(!McuFlashBlankCheck(McuFlashAddr, McuFlashType)) //²Á³ý½áÊøºó£¬ÐèÒª²é¿Õ 174 4 { 175 5 ucUartBuf[INDEXES] = IAPERROR_ERASE; //Eraseʧ°Ü - C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 4 + C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 4 176 5 } 177 4 ucMcuFlashWrValid = 0; @@ -254,7 +254,7 @@ line level source 235 *************************************************************************************************/ 236 void IapReceiveData(void) 237 { - C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 5 + C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 5 238 1 U16 i; 239 1 U8 j; @@ -318,7 +318,7 @@ line level source 292 5 ucMcuFlashWrValid = 0x55; 293 5 McuFlashEraseSector(McuFlashAddr, McuFlashType); 294 5 if(McuFlashBlankCheck(McuFlashAddr, McuFlashType)) //²Á³ý½áÊøºó£¬ÐèÒª²é¿Õ - C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 6 + C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 6 295 5 { 296 6 if(!IapWrSector()) //Èç¹ûÁ¬ÐøдÁ½´Î´íÎó£¬Ôò·µ»Ø¸øÉÏλ»úÒì³£ @@ -382,7 +382,7 @@ line level source 354 355 /************************************************************************************************* 356 * º¯ÊýÃû: IapCmdReset - C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 7 + C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 7 357 * ²Î Êý: ÎÞ 358 * ·µ»ØÖµ: ÎÞ @@ -446,7 +446,7 @@ line level source 414 3 } 415 2 else if(ucUartBuf[COMMAND] == IAP_CMD_BEGIN) //¿ªÊ¼IAP»òISP£¬²¢½«CODEÇø/EEPÇøÈ«²¿ -²Á³ý - C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 8 + C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 8 416 2 { 417 3 IapBeginAck(); @@ -510,7 +510,7 @@ line level source 474 5 { 475 6 ucUartBufPT = 0; 476 6 } - C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 9 + C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 9 477 5 else 478 5 { @@ -574,7 +574,7 @@ line level source 535 4 else 536 4 { 537 5 ucUartBufPT++; - C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 10 + C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 10 538 5 UartTxEn(ucUartBuf[ucUartBufPT]); 539 5 } @@ -638,7 +638,7 @@ line level source uiUartRcvChkSum += ucUartBuf[ucUartBufPT-1]; } - C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 11 + C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 11 if(ucUartBufPT == (TARGET+1)) //¼ì²éID { @@ -702,7 +702,7 @@ line level source { BootMcuWdtClear(); if(bUartSndOverFlg) //ResetÖ¡»Ø¸´½áÊø - C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 12 + C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 12 { bUartSndOverFlg = 0; @@ -766,7 +766,7 @@ line level source } else if(ucUartBufPT == (COMMAND+1)) //¼ì²âCOMMAND { - C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 13 + C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 13 if((ucUartBuf[COMMAND] != IAP_CMD_HANDSHAKE) && (ucUartBuf[COMMAND] != IAP_CMD_BEGIN) @@ -830,7 +830,7 @@ line level source #endif 780 2 } 781 1 } - C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 14 + C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 14 782 783 diff --git a/output/IapIsp.obj b/output/IapIsp.obj index aed0c79441bc37dc3eb9390691f6b6cb60971681..889eca0f0fc12a826aea3c8f6831f07cfd090b66 100644 GIT binary patch delta 66 zcmX@{jB)8xM%ID}jQ_hQvdT|1%VTjlvMPPziWMRTF_AIeuAV+IQ7%rt!4PtCpuX^A TIYyqzB20>m?>3t;2^9hWTb&m0 delta 236 zcmZ4bl<~wfMy>*5rvG!DO$`;4CT^4vR#NZ}2=VmwjB?em&94sGQH@#oL-X zaoURdgE67Ou0g>u;jVrjp^kdtj(+YjF0R4eA^rhC+Sh;k-VHm{KuQ$cLp@zwFCX2# zJ|@`1*wW3wz*r4Pn8brrIs3b~#)lc{8Jfl$85kKG8W|cBr%H`DWfLz7Pv&9dnOw-I M$hc$kWJaMv0G&KW8~^|S diff --git a/output/Initial.lst b/output/Initial.lst index d9852da..80ac09f 100644 --- a/output/Initial.lst +++ b/output/Initial.lst @@ -1,4 +1,4 @@ -C51 COMPILER V9.01 INITIAL 02/08/2025 15:18:20 PAGE 1 +C51 COMPILER V9.01 INITIAL 02/11/2025 15:43:03 PAGE 1 C51 COMPILER V9.01, COMPILATION OF MODULE INITIAL @@ -62,7 +62,7 @@ line level source 50 2 } 51 1 else if(McuFlashCheckFlg(MCUFLASH_BK2_FLG_ADDR)) 52 1 { - C51 COMPILER V9.01 INITIAL 02/08/2025 15:18:20 PAGE 2 + C51 COMPILER V9.01 INITIAL 02/11/2025 15:43:03 PAGE 2 53 2 McuFlashRead(MCUFLASH_BK2_ADDR, XRAM_MAP_ADDR, 512); 54 2 McuFlashWrite(MCUFLASH_BK1_ADDR, XRAM_MAP_ADDR); //¸üб¸·ÝÇø1 @@ -126,7 +126,7 @@ line level source 111 1 } 112 113 - C51 COMPILER V9.01 INITIAL 02/08/2025 15:18:20 PAGE 3 + C51 COMPILER V9.01 INITIAL 02/11/2025 15:43:03 PAGE 3 114 /************************************************************************************************* 115 * º¯ÊýÃû: InitGPIO @@ -190,7 +190,7 @@ line level source - IO״̬:P2.[7,6,5,4,3,2,1,0]ÓÐЧ 156 P2.7CR[1], P2.6CR[0], P2.5CR[1], P2.4CR[1], P2.3CR[1], P2.2CR[0], P2.1CR[1], P2.0CR[1], P2CR = 0xB -B; IO·½Ïò:P2.[7,6,5,4,3,2,1,0]ÓÐЧ,1Êä³ö£¬0ÊäÈë - C51 COMPILER V9.01 INITIAL 02/08/2025 15:18:20 PAGE 4 + C51 COMPILER V9.01 INITIAL 02/11/2025 15:43:03 PAGE 4 157 P2.7PC[0], P2.6PC[1], P2.5PC[0], P2.4PC[0], P2.3PC[0], P2.2PC[1], P2.1PC[1], P2.0PC[1], P2PCR = 0x -46; ÄÚ²¿ÉÏÀ­:1¿ªÆô£¬0¹Ø±Õ @@ -254,7 +254,7 @@ line level source 211 1 #if (UART0_DEFINE == 6) P0 |= 0xC0; P0PCR |= 0x40; - C51 COMPILER V9.01 INITIAL 02/08/2025 15:18:20 PAGE 5 + C51 COMPILER V9.01 INITIAL 02/11/2025 15:43:03 PAGE 5 #endif 215 1 @@ -318,7 +318,7 @@ line level source 273 1 #if (UART0_DEFINE == 17) P0 |= 0x80; P2 |= 0x20; - C51 COMPILER V9.01 INITIAL 02/08/2025 15:18:20 PAGE 6 + C51 COMPILER V9.01 INITIAL 02/11/2025 15:43:03 PAGE 6 P0PCR |= 0x80; #endif @@ -382,7 +382,7 @@ line level source P0 |= 0x02; P2 |= 0x20; P2PCR |= 0x20; - C51 COMPILER V9.01 INITIAL 02/08/2025 15:18:20 PAGE 7 + C51 COMPILER V9.01 INITIAL 02/11/2025 15:43:03 PAGE 7 #endif 339 1 @@ -446,7 +446,7 @@ line level source 397 1 #if (UART1_DEFINE == 9) P1 |= 0x02; P2 |= 0x40; - C51 COMPILER V9.01 INITIAL 02/08/2025 15:18:20 PAGE 8 + C51 COMPILER V9.01 INITIAL 02/11/2025 15:43:03 PAGE 8 P2PCR |= 0x40; #endif @@ -510,7 +510,7 @@ line level source #endif 460 1 461 1 #if (UART1_DEFINE == 20) - C51 COMPILER V9.01 INITIAL 02/08/2025 15:18:20 PAGE 9 + C51 COMPILER V9.01 INITIAL 02/11/2025 15:43:03 PAGE 9 P3 |= 0x10; P2 |= 0x80; @@ -574,7 +574,7 @@ line level source P2 |= 0xC0; P2PCR |= 0x40; #endif - C51 COMPILER V9.01 INITIAL 02/08/2025 15:18:20 PAGE 10 + C51 COMPILER V9.01 INITIAL 02/11/2025 15:43:03 PAGE 10 524 1 525 1 //UART2Ïà¹ØIOÅäÖ㬵±Ç°demo°å´Ë´®¿Ú×öLEDµÆÏÔʾ¹¦ÄÜ£¬²»Ö§³Ö´®¿ÚͨѶ£¬¹Êdemo°åÅäÖÃΪ²»Ê¹ÄÜuart2´®¿Ú¹¦ÄÜ @@ -638,7 +638,7 @@ line level source 583 2 { 584 3 bRTCErr = 1; //ÍâÖÃRTCÄ£¿é³ö´í 585 3 } - C51 COMPILER V9.01 INITIAL 02/08/2025 15:18:20 PAGE 11 + C51 COMPILER V9.01 INITIAL 02/11/2025 15:43:03 PAGE 11 586 2 } 587 1 diff --git a/output/Initial.obj b/output/Initial.obj index edf2a7b9a701fd9b4bc4ce4c51728b88b3bda71d..7ce854bbced9d26cece44a191a5e0b8415b1d5ec 100644 GIT binary patch delta 100 zcmX?qh~@ktmJNQ4%H!osU6i@(3FfmBz y#dx?ny0`|#y99;BxJHDy8U+OT`|5e@oBUYxCq&Z&F-bmcHwQ9aWnz)PDx5l5i{&eeb>{iF$;zyCi~*Y$u__8EfFzh0 zB=llDTpe9pgW_F+!eU$_LR^gkg8Y5;JeVgx7X1m)^gv9KQN8(>*!EvyjG diff --git a/output/Interrupt.lst b/output/Interrupt.lst index 8dd1975..547db81 100644 --- a/output/Interrupt.lst +++ b/output/Interrupt.lst @@ -1,4 +1,4 @@ -C51 COMPILER V9.01 INTERRUPT 02/08/2025 15:18:20 PAGE 1 +C51 COMPILER V9.01 INTERRUPT 02/11/2025 15:43:04 PAGE 1 C51 COMPILER V9.01, COMPILATION OF MODULE INTERRUPT @@ -62,7 +62,7 @@ line level source 50 2 IF45 = 0; 51 2 InterruptINT4App(0x20); 52 2 } - C51 COMPILER V9.01 INTERRUPT 02/08/2025 15:18:20 PAGE 2 + C51 COMPILER V9.01 INTERRUPT 02/11/2025 15:43:04 PAGE 2 53 1 if(IF46) 54 1 { diff --git a/output/Interrupt.obj b/output/Interrupt.obj index 76be9391cca33997441964f01c1ec3adc5170b81..81c9a7d360bab7b106ae7478c27264e30fd7300c 100644 GIT binary patch delta 75 zcmbO*iDkkhmJK0{%pLz%Z4PI=$;5K|=&JO|CM;iBeu5aftaXf9o7b=gaDXKy@kul8 Yn=HfklMN)x!~m2RXVlzm%zyVM0II7VYXATM delta 75 zcmbO*iDkkhmJK0{%r>mcH-|IcWMYxODx5mmgyk!Xb>{iF$-1m{jN3M^VGZB_OHAUE aW@Mf$!}pU7B+JAAlow}I-)zi(_a^|bu^4Lr diff --git a/output/InterruptApp.lst b/output/InterruptApp.lst index 9130570..a2cc9b8 100644 --- a/output/InterruptApp.lst +++ b/output/InterruptApp.lst @@ -1,4 +1,4 @@ -C51 COMPILER V9.01 INTERRUPTAPP 02/08/2025 15:18:20 PAGE 1 +C51 COMPILER V9.01 INTERRUPTAPP 02/11/2025 15:43:03 PAGE 1 C51 COMPILER V9.01, COMPILATION OF MODULE INTERRUPTAPP @@ -62,7 +62,7 @@ line level source 50 *************************************************************************************************/ 51 void InterruptTimer3App(void) 52 { - C51 COMPILER V9.01 INTERRUPTAPP 02/08/2025 15:18:20 PAGE 2 + C51 COMPILER V9.01 INTERRUPTAPP 02/11/2025 15:43:03 PAGE 2 53 1 54 1 bTimer5msFlg = 1; //5ms±ê־ΪԤÁô±êÖ¾ diff --git a/output/InterruptApp.obj b/output/InterruptApp.obj index 6102fb130ef5a67192389084c204626aed7fa9b8..52fcff639e0222291048b07808c0720b6b039cf7 100644 GIT binary patch delta 98 zcmX@!#d5rhWkW0@bNl~Qn-duCGqK!0x+;CL0-xmM7?wLMKS3ND);h+In|HIub3i2J v_@o*4O}66uDF>2fVi41d@o;r?aSe)h2?~n|2=Whcbq>+<(A*rz|LrRPrh% xl5%{~jLeg*_eJC-{vKS3Nh);h*jo9D7-b3!C} c_@x>5P1fN5$p(^UVgM=-XVlzmFTnL306x_pH~;_u delta 80 zcmX@v$8xfdWrH^(vkmL=&3=rRnONkn3a3uyPdSh@6N8vujEAeEi)&E4OHf!$K#+fkt8<8+hvw#Y{LSA1Df=i! delta 98 zcmey^$MUg{WrH6hvkmL=&4G+pnONkn3a3uq%O^S6ndJ_Pb>{iF$;zyCj0T$*v5Im+ xBzN;kGcr%U&i7LeB+bMirWfPk>geJc6z>ug784NUAL8m9qUWK$`5k}rcL02uAw~cI diff --git a/output/Led.lst b/output/Led.lst index 777e271..08f0221 100644 --- a/output/Led.lst +++ b/output/Led.lst @@ -1,4 +1,4 @@ -C51 COMPILER V9.01 LED 02/08/2025 15:18:20 PAGE 1 +C51 COMPILER V9.01 LED 02/11/2025 15:43:03 PAGE 1 C51 COMPILER V9.01, COMPILATION OF MODULE LED @@ -62,7 +62,7 @@ line level source 51 52 53 /************************************************************************************************* - C51 COMPILER V9.01 LED 02/08/2025 15:18:20 PAGE 2 + C51 COMPILER V9.01 LED 02/11/2025 15:43:03 PAGE 2 54 * º¯ÊýÃû: LedAutoOff 55 * ²Î Êý: ÎÞ @@ -126,7 +126,7 @@ line level source 113 2 if(LedDisNum == 0) 114 2 { 115 3 // LEDAllOff(); - C51 COMPILER V9.01 LED 02/08/2025 15:18:20 PAGE 3 + C51 COMPILER V9.01 LED 02/11/2025 15:43:03 PAGE 3 116 3 } 117 2 if(LedDisNum == 1) diff --git a/output/Led.obj b/output/Led.obj index cf275f1f389948599a1261d1c96c312868ebee70..6013babb0dcbb2e240c7afce825df24b47d56324 100644 GIT binary patch delta 80 zcmX>#iRIKJmJLpf%#iRIKJmJLpf%r>mcH@h;PWnz)PDx5mGmtS(SKFb{z>&)|UllfWe7=Lf>WBthq ek?iJ|W@Mhcoc|{qNScWOs6d=iee*tno*w{f{u{vn diff --git a/output/LowPower.lst b/output/LowPower.lst index 210af84..1eae3c2 100644 --- a/output/LowPower.lst +++ b/output/LowPower.lst @@ -1,4 +1,4 @@ -C51 COMPILER V9.01 LOWPOWER 02/08/2025 15:18:20 PAGE 1 +C51 COMPILER V9.01 LOWPOWER 02/11/2025 15:43:03 PAGE 1 C51 COMPILER V9.01, COMPILATION OF MODULE LOWPOWER @@ -62,7 +62,7 @@ line level source 50 2 ucSleepTimerCnt = 0; 51 2 ucPDTimerCnt = 0; 52 2 ucUart0TimeoutCnt = 0; - C51 COMPILER V9.01 LOWPOWER 02/08/2025 15:18:20 PAGE 2 + C51 COMPILER V9.01 LOWPOWER 02/11/2025 15:43:03 PAGE 2 53 2 ucUart1TimeoutCnt = 0; 54 2 ucUart2TimeoutCnt = 0; @@ -126,7 +126,7 @@ line level source 112 1 #if (UART1_DEFINE != 0) IrqUart1Dis(); #endif - C51 COMPILER V9.01 LOWPOWER 02/08/2025 15:18:20 PAGE 3 + C51 COMPILER V9.01 LOWPOWER 02/11/2025 15:43:03 PAGE 3 115 1 #if (UART2_DEFINE != 0) IrqUart2Dis(); @@ -190,7 +190,7 @@ line level source 170 6 bSleepFlg = 1; 171 6 } 172 5 } - C51 COMPILER V9.01 LOWPOWER 02/08/2025 15:18:20 PAGE 4 + C51 COMPILER V9.01 LOWPOWER 02/11/2025 15:43:03 PAGE 4 173 4 else 174 4 { @@ -254,7 +254,7 @@ MODULE INFORMATION: STATIC OVERLAYABLE XDATA SIZE = 3 ---- PDATA SIZE = ---- ---- DATA SIZE = ---- ---- - C51 COMPILER V9.01 LOWPOWER 02/08/2025 15:18:20 PAGE 5 + C51 COMPILER V9.01 LOWPOWER 02/11/2025 15:43:03 PAGE 5 IDATA SIZE = ---- ---- BIT SIZE = 4 ---- diff --git a/output/LowPower.obj b/output/LowPower.obj index dd919d446d19810b5f359c8560bdf80d612e8cd5..0e92e11c3d3316bcd5b6c2b7a55f442ef129b801 100644 GIT binary patch delta 100 zcmeyeo8`-HmJNZ7%_BoP_5i9_J6ejWj delta 100 zcmeyeo8`-HmJNZ7%r>mcH-|7@XJV1RDx5l5pXDoyb>{iF$r`M6jQX3Gv+fgO14%G3 z0Hq`unJ2eO{FDPJU}6x{i}7%Eba4%ecL@rM2?+8Jadi&S^H6V|Be{K!Bx3{%0JeJ{ A@&Et; diff --git a/output/MCUCore_Load b/output/MCUCore_Load index d520c36ce9ace75bd88e046f70c2aee6988dce9a..40a0c4aa4bfffc1e8efef1ae637a2dc4f94f6a5a 100644 GIT binary patch delta 2625 zcma)+YfM{Z7{~kewA2ygVeDxz_R zEM%rVlH-;wb_UkaHKXI*c!fD-j&1S62AO8Ee$Z)HqA^ZLnx({m=d=w*^Jb^t-VeX$ zdH(yBN3k1f$gU||)P!zcwY^7&E zh>Bv|qxb1|XrH(Uc;J}$IY6-0P$KyOLxIb1clt{}#Pz3JhIH^o#uN@)fQszxiAK9~ zrg4M^o>1>f5O*~Clx5B?lKEsU|f)8#;nrSm(%{)Q-T`G8WQ+dJ=@fcRfu&*K)wr_a~ zh&df<`onTHyi|S>H}aR!iiYHtYfoyRyAn&CfuSl35cP4N(SA~!1_TF=ur}74FW`E9 z`0B;=~YLJ!C7UT-J|Vs5sQUT9Q8Y`A|2CG0z_DI)qQ~-k*Kt!8VKwzaQq!40F8sXjD;#ErOZ__%jm(EuOH=3{aEj0h&B7JebLgqQ+}^R)R705fUa;oTX#-T18pt+>Ed(#$WsAx5T<-eoSjs zngA-C7MWJ~;g-^z5g`?s5u?aVTCjk(fC+h}k22w2Afx#ddX>#03aRF5I zyc|`}ueq7SH#KV-cWRW4Df|z6*NoPxD&%jfv8#~AuD+M9F5kgAs`sYX#!b6CYUc7Uoqq(QZZaxF?eG(b`QTtxY`Q8_@n7lVd-|BJx@r3x94DwJnWVef3X Yu>qGqpT;-W`zy176iSeEqTosWKdn^A-~a#s delta 2625 zcma)+drVtZ9LIZlTPp8IU-ZFi$c8a1Ft=rFJj@8j4l9s=4yf2tI$#!ySD&oku6gZ2wNs2@eu=wCUcI2EMNlO+gmZ3limLRIltfc z`#ax!CjxyFfxb{BFqFvIwp5eV-P7IG(`~ibJ6<)pTMh!r5eW-z07+$8x0OzM=IF9) zPsda<-Cz1P?UUz%58#OWc|dTlp+a#RLxCE&KmH{k&l{3K%>M-{+@oQUL|xmd|(=(8F%JhNpd$mC@! z|2>Pd(@nl99Hvit)CvF0{{pw-9(;Uj#7u_?YvwBLcdFryZN-8iVmnsIc3)XKbnPku za$bjqey>;quN7axt?V2wtBYK@`hpg^%du1m3|2HoFxLfL43H!>cpdPG%CB%U7ky=F z=rNZI8b|ld;h=aP%B_w-&KfK<61F>4S1dSD(GTiXFz1D@aRUpXwK4LGp(dSd@yF3t zIN3CYL#rTRi$tQlA%BM(rN@#*QB?nZhK*oM#|Z@!%uCTT2W_$x^!c>3X+`|)AKwz2*TgZMO=SWods1dv z7l)e*(uSne{Ind+PsaqZL?19gZ|qY{s2{{p{-qe?UsBBP)$u(BB&iN}tMg@hSC`cy zbey9-x>K|C&Crw7!0yM;!0y=J>%=s?LFIX4QJyz$C`Sxsso_g;X!ugRIYk_uyB?3` zt|u&O#n3^fa6T~(o%=aqY(0}NKOoVBy|Bv|g!!FH0a%ZWyvSdY*CFUvD=# z%+b2xLWP65{uP{cLX zsu4Z?8xbdEGFSBpC^Vyg>yFryAO4$;hJf+m|7wt>)IlRs2QyltxI0&FT)|~7#E9+n Q{>p46r3w@~mbJ(5H;4lR-~a#s diff --git a/output/MCUCore_Load.m51 b/output/MCUCore_Load.m51 index d388f0f..3c03b02 100644 --- a/output/MCUCore_Load.m51 +++ b/output/MCUCore_Load.m51 @@ -1,4 +1,4 @@ -BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 1 +BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 1 BL51 BANKED LINKER/LOCATER V6.22, INVOKED BY: @@ -59,7 +59,7 @@ INPUT MODULES INCLUDED: D:\TOOL\KEIL\C51\LIB\C51L.LIB (?C?LSUB) D:\TOOL\KEIL\C51\LIB\C51L.LIB (?C?LMUL) D:\TOOL\KEIL\C51\LIB\C51L.LIB (?C?ULDIV) - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 2 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 2 D:\TOOL\KEIL\C51\LIB\C51L.LIB (?C?SLDIV) @@ -119,7 +119,7 @@ LINK MAP OF MODULE: .\output\MCUCore_Load (MAIN) IDATA 0030H 000CH UNIT ?ID?GASGAUGEV4_12 003CH 0064H *** GAP *** IDATA 00A0H 0060H ABSOLUTE - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 3 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 3 @@ -179,7 +179,7 @@ LINK MAP OF MODULE: .\output\MCUCore_Load (MAIN) XDATA 0090H 0002H ABSOLUTE XDATA 0092H 0002H ABSOLUTE XDATA 0094H 0002H ABSOLUTE - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 4 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 4 XDATA 0096H 0001H ABSOLUTE @@ -239,7 +239,7 @@ LINK MAP OF MODULE: .\output\MCUCore_Load (MAIN) XDATA 05F5H 0002H UNIT ?XD?MCUFLASH XDATA 05F7H 0002H UNIT ?XD?GASGAUGEWKUP?GASGAUGEV4_12 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 5 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 5 * * * * * * * C O D E M E M O R Y * * * * * * * @@ -299,7 +299,7 @@ LINK MAP OF MODULE: .\output\MCUCore_Load (MAIN) CODE 53E5H 008DH UNIT ?PR?_RTCINITTIME?RTC CODE 5472H 008CH UNIT ?PR?_MCUFLASHWRSECTOR?MCUFLASH CODE 54FEH 0087H UNIT ?PR?AFEINIT?AFE - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 6 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 6 CODE 5585H 0086H UNIT ?PR?AFEINITREG?AFE @@ -359,7 +359,7 @@ LINK MAP OF MODULE: .\output\MCUCore_Load (MAIN) CODE 6936H 0048H UNIT ?PR?_DELAY1MS?MCULIB CODE 697EH 0048H UNIT ?PR?PORPROTECTOV?PORSELFTEST CODE 69C6H 0048H UNIT ?PR?PORPROTECTUV?PORSELFTEST - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 7 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 7 CODE 6A0EH 0045H UNIT ?PR?CALITS1?CALIBRATE @@ -419,7 +419,7 @@ LINK MAP OF MODULE: .\output\MCUCore_Load (MAIN) CODE 7328H 0013H UNIT ?PR?AFELOADCHECKEN?AFE CODE 733BH 0013H UNIT ?PR?AFELOADCHECKDIS?AFE CODE 734EH 0013H UNIT ?PR?AFEWDTEN?AFE - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 8 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 8 CODE 7361H 0013H UNIT ?PR?AFEWDTDIS?AFE @@ -479,7 +479,7 @@ SEGMENT BIT_GROUP DATA_GROUP ?PR?_UART0READINFO?UARTAPP ----- ----- ----- ----- ----- ----- +--> ?PR?_CRC8CAL?TWI - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 9 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 9 @@ -539,7 +539,7 @@ SEGMENT BIT_GROUP DATA_GROUP +--> ?PR?PROTECTPROCESS?PROTECT +--> ?PR?PORSELFTEST?PORSELFTEST +--> ?PR?LOADCHECK?CHARGERLOAD - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 10 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 10 +--> ?PR?CHGERCHECK?CHARGERLOAD @@ -599,7 +599,7 @@ SEGMENT BIT_GROUP DATA_GROUP ?PR?INITVAR?INITIAL ----- ----- ----- ----- ----- ----- +--> ?PR?_MEMORYSET?MCULIB - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 11 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 11 @@ -659,7 +659,7 @@ SEGMENT BIT_GROUP DATA_GROUP +--> ?PR?_RTCMODIFYTIME?RTC ?PR?_RTCREAD?RTC 002AH.5 0000H.1 ----- ----- 02E7H 0005H - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 12 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 12 +--> ?PR?_TWIREAD?TWI @@ -719,7 +719,7 @@ SEGMENT BIT_GROUP DATA_GROUP +--> ?PR?_AFEWRITEREG?AFE ?PR?CTOCHECKVOL?BALANCE 002AH.3 0000H.1 ----- ----- ----- ----- - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 13 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 13 @@ -779,7 +779,7 @@ SEGMENT BIT_GROUP DATA_GROUP ?PR?CHGERCHECK?CHARGERLOAD ----- ----- ----- ----- ----- ----- +--> ?PR?AFECHGERCHECKEN?AFE - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 14 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 14 +--> ?PR?AFERDSTATUS?AFE @@ -839,7 +839,7 @@ SEGMENT BIT_GROUP DATA_GROUP +--> ?PR?CALITS1?CALIBRATE +--> ?PR?CALITS2?CALIBRATE +--> ?PR?CALIRTCTIME?CALIBRATE - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 15 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 15 @@ -899,7 +899,7 @@ SEGMENT BIT_GROUP DATA_GROUP +--> ?PR?_MEMORYCOPY?MCULIB +--> ?PR?_CRC8CAL?TWI - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 16 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 16 ?PR?E2PROMBKRTC?EXTE2PROM ----- ----- ----- ----- 02BBH 000AH @@ -959,7 +959,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:5A45H LINE# 38 C:5A45H LINE# 39 C:5A45H LINE# 42 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 17 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 17 C:5A48H LINE# 43 @@ -1019,7 +1019,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) D:00E2H PUBLIC P1CR D:00E3H PUBLIC P2CR D:00E4H PUBLIC P3CR - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 18 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 18 D:00BAH PUBLIC IENC @@ -1079,7 +1079,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:5176H LINE# 70 C:5176H LINE# 71 C:5179H LINE# 72 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 19 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 19 C:517AH LINE# 73 @@ -1139,7 +1139,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:6631H LINE# 569 C:6636H LINE# 570 C:6636H LINE# 571 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 20 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 20 C:6638H LINE# 572 @@ -1199,7 +1199,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) ------- ENDPROC _INTERRUPTINT4APP ------- PROC INTERRUPTTIMER3APP C:710FH LINE# 51 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 21 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 21 C:710FH LINE# 52 @@ -1259,7 +1259,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:6C50H LINE# 39 C:6C50H LINE# 40 C:6C53H LINE# 41 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 22 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 22 C:6C53H LINE# 42 @@ -1319,7 +1319,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:6003H LINE# 117 C:6008H LINE# 118 C:6008H LINE# 120 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 23 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 23 C:6008H LINE# 121 @@ -1379,7 +1379,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:5C86H LINE# 34 C:5C8DH LINE# 35 C:5C8DH LINE# 36 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 24 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 24 C:5C90H LINE# 37 @@ -1439,7 +1439,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) ------- MODULE LOWPOWER C:0000H SYMBOL _ICE_DUMMY_ D:0080H PUBLIC P0 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 25 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 25 D:0090H PUBLIC P1 @@ -1499,7 +1499,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) ------- PROC SYSTEMINTOPD C:73E6H LINE# 65 C:73E6H LINE# 66 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 26 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 26 C:73E6H LINE# 67 @@ -1559,7 +1559,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:5382H LINE# 152 C:5388H LINE# 153 C:5388H LINE# 154 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 27 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 27 C:538BH LINE# 155 @@ -1619,7 +1619,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:6C1CH LINE# 219 C:6C1FH LINE# 220 C:6C1FH LINE# 222 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 28 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 28 C:6C22H LINE# 223 @@ -1679,7 +1679,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) B:0029H.4 PUBLIC bISPFlg C:5881H PUBLIC _Uart0WriteInfo X:03FAH PUBLIC ucUart0BufPT - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 29 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 29 X:03FBH PUBLIC ucUart1BufPT @@ -1739,7 +1739,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:5D45H LINE# 274 C:5D57H LINE# 275 C:5D5CH LINE# 276 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 30 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 30 C:5D5FH LINE# 277 @@ -1799,7 +1799,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:3BDCH LINE# 519 C:3BDCH LINE# 520 C:3BDCH LINE# 521 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 31 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 31 C:3BDCH LINE# 522 @@ -1859,7 +1859,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:3C85H LINE# 591 C:3C86H LINE# 592 C:3C8DH LINE# 593 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 32 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 32 C:3C8DH LINE# 594 @@ -1919,7 +1919,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) ------- PROC UART0CALICUROFFSET C:6DCBH LINE# 950 C:6DCBH LINE# 951 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 33 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 33 C:6DCBH LINE# 952 @@ -1979,7 +1979,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:62DCH LINE# 1207 C:62E3H LINE# 1208 C:62EAH LINE# 1209 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 34 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 34 C:62EBH LINE# 1211 @@ -2039,7 +2039,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:4F9EH LINE# 1329 C:4F9EH LINE# 1330 C:4F9EH LINE# 1331 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 35 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 35 C:4F9EH LINE# 1332 @@ -2099,7 +2099,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:39A2H LINE# 1519 C:39A2H LINE# 1520 C:39A4H LINE# 1521 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 36 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 36 C:39A9H LINE# 1522 @@ -2159,7 +2159,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:5288H LINE# 1766 C:5288H LINE# 1767 C:52A1H LINE# 1768 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 37 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 37 C:52A1H LINE# 1769 @@ -2219,7 +2219,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) ------- ENDPROC INTERRUPTUART0APPTX ------- PROC UART0CHECK C:729BH LINE# 1842 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 38 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 38 C:729BH LINE# 1843 @@ -2279,7 +2279,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) B:0022H.5 PUBLIC bAFE_SC B:0025H.0 PUBLIC bCHGMOS B:0020H.3 PUBLIC bBAL_EN - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 39 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 39 X:001AH PUBLIC E2ulFCC @@ -2339,7 +2339,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) B:0024H.2 PUBLIC bVDQ B:0026H.5 PUBLIC bAfeDSG B:0022H.2 PUBLIC bUTC - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 40 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 40 X:0062H PUBLIC E2uiOVvol @@ -2399,7 +2399,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) D:00C0H PUBLIC P4 D:0080H PUBLIC P5 X:0204H PUBLIC uiTempeMax - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 41 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 41 B:002BH.1 PUBLIC bCADCFlg @@ -2459,7 +2459,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:7239H LINE# 54 C:7239H LINE# 55 C:723EH LINE# 56 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 42 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 42 C:723EH LINE# 57 @@ -2519,7 +2519,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) X:02C6H SYMBOL RdBuf ------- DO B:002AH.4 SYMBOL Result - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 43 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 43 X:02C8H SYMBOL Times @@ -2579,7 +2579,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:559AH LINE# 196 C:559EH LINE# 197 C:55A2H LINE# 198 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 44 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 44 C:55A6H LINE# 199 @@ -2639,7 +2639,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:5584H LINE# 261 ------- ENDPROC AFEINIT ------- PROC AFERDFLG - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 45 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 45 C:6CA1H LINE# 272 @@ -2699,7 +2699,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:5DDFH LINE# 339 C:5DE4H LINE# 340 C:5DE4H LINE# 341 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 46 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 46 C:5DE6H LINE# 342 @@ -2759,7 +2759,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) ------- ENDPROC AFELOADCHECKDIS ------- PROC _AFEBALCTL X:02BCH SYMBOL BalChTemp - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 47 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 47 C:6C62H LINE# 422 @@ -2819,7 +2819,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:73C0H LINE# 486 C:73C0H LINE# 487 C:73C7H LINE# 488 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 48 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 48 C:73D2H LINE# 489 @@ -2879,7 +2879,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:3E1FH LINE# 32 C:3E1FH LINE# 33 C:3E1FH LINE# 36 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 49 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 49 C:3E2BH LINE# 37 @@ -2939,7 +2939,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:6E62H LINE# 101 C:6E62H LINE# 102 C:6E64H LINE# 103 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 50 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 50 C:6E64H LINE# 104 @@ -2999,7 +2999,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:4CCCH LINE# 193 C:4CCCH LINE# 194 C:4CD2H LINE# 195 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 51 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 51 C:4CD4H LINE# 196 @@ -3059,7 +3059,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:72DBH PUBLIC AFEInfoProcess X:05F2H PUBLIC ucDsgingCheckCnt B:00A8H.4 PUBLIC ES0 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 52 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 52 C:6738H PUBLIC AfeGetVol @@ -3119,7 +3119,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) X:02C3H SYMBOL i B:002AH.3 SYMBOL Result ------- ENDDO - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 53 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 53 C:6738H LINE# 87 @@ -3179,7 +3179,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:43D4H LINE# 157 C:43D6H LINE# 165 C:43F5H LINE# 167 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 54 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 54 C:43F7H LINE# 175 @@ -3239,7 +3239,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:4035H LINE# 281 C:4037H LINE# 289 C:4051H LINE# 291 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 55 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 55 C:4053H LINE# 299 @@ -3299,7 +3299,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:3676H LINE# 392 C:3694H LINE# 393 C:369CH LINE# 394 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 56 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 56 C:36B1H LINE# 396 @@ -3359,7 +3359,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) D:00C0H PUBLIC P4 D:0080H PUBLIC P5 X:05D6H PUBLIC slExtCur - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 57 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 57 C:740AH PUBLIC CaliCurZero @@ -3419,7 +3419,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:6A26H LINE# 81 C:6A4AH LINE# 82 C:6A4AH LINE# 83 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 58 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 58 C:6A52H LINE# 84 @@ -3479,7 +3479,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:63C9H LINE# 158 C:63C9H LINE# 159 C:63CCH LINE# 160 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 59 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 59 C:63CCH LINE# 162 @@ -3539,7 +3539,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:6565H LINE# 51 C:6568H LINE# 52 C:6568H LINE# 53 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 60 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 60 C:656AH LINE# 54 @@ -3599,7 +3599,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:578EH PUBLIC E2PRomInit C:71B2H PUBLIC E2PRomTwiCheck B:00A0H.0 PUBLIC P2_0 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 61 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 61 X:03DDH PUBLIC ucRTCBKTime1 @@ -3659,7 +3659,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:71C9H LINE# 56 C:71C9H LINE# 57 C:71CEH LINE# 58 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 62 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 62 C:71CEH LINE# 59 @@ -3719,7 +3719,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:5F0DH LINE# 133 C:5F0FH LINE# 134 ------- ENDPROC _E2PROMREAD - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 63 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 63 ------- PROC E2PROMERASE @@ -3779,7 +3779,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:666FH LINE# 210 C:666FH LINE# 211 C:6681H LINE# 212 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 64 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 64 C:6686H LINE# 213 @@ -3839,7 +3839,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:3533H LINE# 281 C:3543H LINE# 282 C:3553H LINE# 283 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 65 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 65 C:355EH LINE# 284 @@ -3899,7 +3899,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:68EEH LINE# 363 C:68F5H LINE# 364 C:6902H LINE# 366 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 66 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 66 C:6921H LINE# 367 @@ -3959,7 +3959,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:4E9DH LINE# 444 C:4E9DH LINE# 445 C:4EA0H LINE# 446 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 67 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 67 C:4EA0H LINE# 447 @@ -4019,7 +4019,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:459DH LINE# 515 C:459FH LINE# 516 C:459FH LINE# 518 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 68 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 68 C:45A2H LINE# 519 @@ -4079,7 +4079,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) B:00D8H.0 PUBLIC IF40 C:59D3H PUBLIC InterruptINT4 B:00D8H.1 PUBLIC IF41 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 69 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 69 B:00D8H.2 PUBLIC IF42 @@ -4139,7 +4139,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:1003H LINE# 74 C:100BH LINE# 76 C:100DH LINE# 78 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 70 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 70 C:1010H LINE# 79 @@ -4199,7 +4199,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:5096H LINE# 82 C:5099H LINE# 83 C:5099H LINE# 84 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 71 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 71 C:509BH LINE# 85 @@ -4259,7 +4259,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:6E70H PUBLIC _McuFlashWrOneByte B:002DH.6 PUBLIC bMcuFlashErr C:52C0H PUBLIC _McuFlashWrite - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 72 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 72 X:05F6H PUBLIC ucMcuFlashWrValid @@ -4319,7 +4319,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:70FDH LINE# 68 C:70FFH LINE# 69 C:70FFH LINE# 70 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 73 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 73 C:710CH LINE# 72 @@ -4379,7 +4379,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:54D2H LINE# 129 C:54D2H LINE# 130 C:54D5H LINE# 131 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 74 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 74 C:54D6H LINE# 132 @@ -4439,7 +4439,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:5305H LINE# 198 C:5308H LINE# 199 C:5309H LINE# 200 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 75 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 75 C:530AH LINE# 201 @@ -4499,7 +4499,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:4820H LINE# 269 C:4822H LINE# 270 C:482AH LINE# 271 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 76 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 76 C:4832H LINE# 272 @@ -4559,7 +4559,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:72C6H LINE# 336 C:72C6H LINE# 337 C:72C9H LINE# 338 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 77 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 77 C:72C9H LINE# 339 @@ -4619,7 +4619,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) D:0098H PUBLIC SCON D:0088H PUBLIC TCON D:00CEH PUBLIC PWM0DL - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 78 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 78 D:00A4H PUBLIC PWM1DL @@ -4679,7 +4679,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:7147H LINE# 98 C:7148H LINE# 99 C:7149H LINE# 100 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 79 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 79 C:714AH LINE# 102 @@ -4739,7 +4739,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:6942H LINE# 163 C:694AH LINE# 164 C:694AH LINE# 165 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 80 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 80 C:694EH LINE# 166 @@ -4799,7 +4799,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:6F1DH LINE# 275 C:6F1DH LINE# 276 C:6F2EH LINE# 277 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 81 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 81 C:6F33H LINE# 278 @@ -4859,7 +4859,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) D:0080H PUBLIC P5 C:6782H PUBLIC MosStatusCheck C:6FA1H PUBLIC MosCtrl - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 82 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 82 B:002EH.3 PUBLIC bCHGMOSBk @@ -4919,7 +4919,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:0000H SYMBOL _ICE_DUMMY_ D:0080H PUBLIC P0 C:63E4H PUBLIC PorProtectOTC - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 83 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 83 D:0090H PUBLIC P1 @@ -4979,7 +4979,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:63E4H LINE# 72 C:63E4H LINE# 73 C:63E4H LINE# 74 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 84 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 84 C:63E7H LINE# 75 @@ -5039,7 +5039,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:64D0H LINE# 141 ------- ENDPROC PORPROTECTOTD ------- PROC PORPROTECTUTD - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 85 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 85 C:64D1H LINE# 150 @@ -5099,7 +5099,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) X:03BDH PUBLIC uiOCD2DelayCnt D:00B0H PUBLIC P3 D:00C0H PUBLIC P4 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 86 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 86 D:0080H PUBLIC P5 @@ -5159,7 +5159,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:46C3H LINE# 63 C:46C3H LINE# 64 C:46C6H LINE# 65 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 87 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 87 C:46C6H LINE# 66 @@ -5219,7 +5219,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:491AH LINE# 127 C:4920H LINE# 128 C:4920H LINE# 129 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 88 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 88 C:4921H LINE# 130 @@ -5279,7 +5279,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:4A37H LINE# 196 C:4A3DH LINE# 197 C:4A3DH LINE# 198 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 89 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 89 C:4A3EH LINE# 199 @@ -5339,7 +5339,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:4B6BH LINE# 261 C:4B6BH LINE# 262 C:4B6BH LINE# 263 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 90 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 90 ------- ENDPROC PROTECTOTD @@ -5399,7 +5399,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:6189H LINE# 332 C:6189H LINE# 333 C:6190H LINE# 334 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 91 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 91 C:6190H LINE# 335 @@ -5459,7 +5459,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:7175H LINE# 407 C:7175H LINE# 408 C:7178H LINE# 409 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 92 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 92 C:7178H LINE# 410 @@ -5519,7 +5519,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) D:00A0H PUBLIC P2 D:00B0H PUBLIC P3 D:00C0H PUBLIC P4 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 93 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 93 D:0080H PUBLIC P5 @@ -5579,7 +5579,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:6082H LINE# 77 ------- ENDPROC _RTCWRITE ------- PROC _RTCREAD - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 94 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 94 X:02E7H SYMBOL RdAddr @@ -5639,7 +5639,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:320BH LINE# 155 C:3217H LINE# 156 C:3227H LINE# 157 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 95 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 95 C:3237H LINE# 158 @@ -5699,7 +5699,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:5436H LINE# 225 C:543BH LINE# 226 C:543DH LINE# 227 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 96 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 96 C:5441H LINE# 228 @@ -5759,7 +5759,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) B:002BH.0 SYMBOL Result D:0004H SYMBOL timeoutcount ------- ENDDO - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 97 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 97 C:7076H LINE# 59 @@ -5819,7 +5819,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:3D4DH LINE# 121 C:3D50H LINE# 122 C:3D57H LINE# 123 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 98 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 98 C:3D57H LINE# 124 @@ -5879,7 +5879,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:3E01H LINE# 183 C:3E04H LINE# 184 C:3E0EH LINE# 185 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 99 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 99 C:3E0EH LINE# 186 @@ -5939,7 +5939,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:32D1H LINE# 246 C:32D1H LINE# 247 C:32D3H LINE# 248 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 100 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 100 C:32D6H LINE# 249 @@ -5999,7 +5999,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:33DAH LINE# 321 C:33E4H LINE# 322 C:33ECH LINE# 323 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 101 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 101 C:33ECH LINE# 325 @@ -6059,7 +6059,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:62F3H PUBLIC InterruptUART0 D:0086H PUBLIC INSCON D:009BH PUBLIC SADEN - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 102 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 102 D:009AH PUBLIC SADDR @@ -6119,7 +6119,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) ------- ENDMOD THERMISTOR ------- MODULE TWIIO - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 103 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 103 C:0000H SYMBOL _ICE_DUMMY_ @@ -6179,7 +6179,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) X:0337H PUBLIC Info_ulTempDsgFcc X:033BH PUBLIC E2ui_CYCLECOUNTA_B X:033DH PUBLIC E2ui_CYCLECOUNTB_B - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 104 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 104 X:033FH PUBLIC E2uiTempFCC_K1 @@ -6239,7 +6239,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:2F10H LINE# 124 C:2F1CH LINE# 125 C:2F2BH LINE# 126 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 105 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 105 C:2F3CH LINE# 127 @@ -6299,7 +6299,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:6380H LINE# 221 C:6384H LINE# 222 C:6388H LINE# 223 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 106 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 106 C:6390H LINE# 224 @@ -6359,7 +6359,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) ------- MODULE ?C?CASTF C:247AH PUBLIC ?C?CASTF ------- ENDMOD ?C?CASTF - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 107 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 107 @@ -6419,7 +6419,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) C:270BH PUBLIC ?C?ULSHR ------- ENDMOD ?C?ULSHR - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 108 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 108 ------- MODULE ?C?SLSHR @@ -6479,7 +6479,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN) FUNCTION REGISTER MASKS - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 109 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 109 @@ -6539,7 +6539,7 @@ MCUINTOPD. . . . . . . . . @0xc000 MOSCTRL. . . . . . . . . . @0xf7ff MOSSTATUSCHECK . . . . . . @0xc000 PORPROTECTOTC. . . . . . . @0xf78f - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 110 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 110 PORPROTECTOTD. . . . . . . @0xf78f @@ -6599,7 +6599,7 @@ _MCUFLASHWRSECTOR. . . . . @0xf33f _MEMORYCOPY. . . . . . . . @0xf78d _MEMORYSET . . . . . . . . @0xf781 _PUTCHAR . . . . . . . . . @0xc000 - BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 111 + BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 111 _RTCMODIFYTIME . . . . . . @0xf7ff diff --git a/output/MCUCore_Load.plg b/output/MCUCore_Load.plg index 6698595..f526e9d 100644 --- a/output/MCUCore_Load.plg +++ b/output/MCUCore_Load.plg @@ -1,12 +1,3 @@ - - -
-
µVision Build Log

-
Project:

-E:\Y\keil\ZDBMS\ZDBMS\MCUCore.uvproj
-Project File Date:  01/23/2025
-
-
Output:

 Build target 'McuFlash_Load'
 compiling Main.c...
 compiling Initial.c...
@@ -49,113 +40,21 @@ Program Size: data=151.4 xdata=1529 code=29770
 creating hex file from ".\output\MCUCore_Load"...
 ".\output\MCUCore_Load" - 0 Error(s), 3 Warning(s).
 Load "E:\\Y\\keil\\ZDBMS\\ZDBMS\\output\\MCUCore_Load" 
-Flash Erase Done.
-ISP size=0, E2PROM size=1024;
-Main Size=64512Bytes; E2PROM Size=1024Bytes;
-The Code CheckSum is 32F7H
-Code Write Done: 29776 bytes programmed.
-Code Option Write Done.
-Code Verify Done: 29776 bytes verified.
-Code Option Verify Done
-Code Security Write Done.
-Code Security Verify Done
-Update EEprom Done
-elaspe time 3985 ms
-Build target 'McuFlash_Load'
-compiling Main.c...
-compiling Initial.c...
-compiling InterruptApp.c...
-compiling Led.c...
-compiling KeyApp.c...
-compiling LowPower.c...
-compiling UartApp.c...
-compiling Memory.c...
-compiling AFE.c...
-compiling Balance.c...
-compiling Calculate.c...
-compiling Calibrate.c...
-compiling ChargerLoad.c...
-compiling ExtE2PRom.c...
-compiling Interrupt.c...
-compiling KeyScan.c...
-compiling McuFlash.c...
-compiling McuLib.c...
-CODE_DRV\MCULIB.C(20): warning C280: 'ClkSource': unreferenced local variable
-CODE_DRV\MCULIB.C(84): warning C280: 'SysClock': unreferenced local variable
-compiling MosCtrl.c...
-compiling PorSelfTest.c...
-compiling Protect.c...
-compiling RTC.c...
-compiling TWI.c...
-compiling Uart.c...
-compiling Thermistor.c...
-compiling TwiIO.c...
-assembling STARTUP.A51...
-compiling GasGaugeInter_V4_13.c...
-compiling BootApp.c...
-compiling BootIAP.c...
-linking...
-*** WARNING L15: MULTIPLE CALL TO SEGMENT
-    SEGMENT: ?PR?_MCUCLOCKSET?MCULIB
-    CALLER1: ?PR?INTERRUPTINT4?INTERRUPT
-    CALLER2: ?C_C51STARTUP
-Program Size: data=151.4 xdata=1529 code=29607
-creating hex file from ".\output\MCUCore_Load"...
-".\output\MCUCore_Load" - 0 Error(s), 3 Warning(s).
+Refresh WriteMode error.
+error time at 2025-02-11 15:43:07.
+*** Error:Flash Erase failed.
 Load "E:\\Y\\keil\\ZDBMS\\ZDBMS\\output\\MCUCore_Load" 
-Flash Erase Done.
-ISP size=0, E2PROM size=1024;
-Main Size=64512Bytes; E2PROM Size=1024Bytes;
-The Code CheckSum is E552H
-Code Write Done: 29613 bytes programmed.
-Code Option Write Done.
-Code Verify Done: 29613 bytes verified.
-Code Option Verify Done
-Code Security Write Done.
-Code Security Verify Done
-Update EEprom Done
-elaspe time 3969 ms
-Build target 'McuFlash_Load'
-compiling Main.c...
-compiling Initial.c...
-compiling InterruptApp.c...
-compiling Led.c...
-compiling KeyApp.c...
-compiling LowPower.c...
-compiling UartApp.c...
-compiling Memory.c...
-compiling AFE.c...
-compiling Balance.c...
-compiling Calculate.c...
-compiling Calibrate.c...
-compiling ChargerLoad.c...
-compiling ExtE2PRom.c...
-compiling Interrupt.c...
-compiling KeyScan.c...
-compiling McuFlash.c...
-compiling McuLib.c...
-CODE_DRV\MCULIB.C(20): warning C280: 'ClkSource': unreferenced local variable
-CODE_DRV\MCULIB.C(84): warning C280: 'SysClock': unreferenced local variable
-compiling MosCtrl.c...
-compiling PorSelfTest.c...
-compiling Protect.c...
-compiling RTC.c...
-compiling TWI.c...
-compiling Uart.c...
-compiling Thermistor.c...
-compiling TwiIO.c...
-assembling STARTUP.A51...
-compiling GasGaugeInter_V4_13.c...
-compiling BootApp.c...
-compiling BootIAP.c...
-linking...
-*** WARNING L15: MULTIPLE CALL TO SEGMENT
-    SEGMENT: ?PR?_MCUCLOCKSET?MCULIB
-    CALLER1: ?PR?INTERRUPTINT4?INTERRUPT
-    CALLER2: ?C_C51STARTUP
-Program Size: data=151.4 xdata=1529 code=29770
-creating hex file from ".\output\MCUCore_Load"...
-".\output\MCUCore_Load" - 0 Error(s), 3 Warning(s).
+Refresh WriteMode error.
+error time at 2025-02-11 15:43:14.
+*** Error:Flash Erase failed.
+Load "E:\\Y\\keil\\ZDBMS\\ZDBMS\\output\\MCUCore_Load" 
+Refresh WriteMode error.
+error time at 2025-02-11 15:43:23.
+*** Error:Flash Erase failed.
+Load "E:\\Y\\keil\\ZDBMS\\ZDBMS\\output\\MCUCore_Load" 
+Refresh WriteMode error.
+error time at 2025-02-11 15:43:29.
+*** Error:Flash Erase failed.
 Load "E:\\Y\\keil\\ZDBMS\\ZDBMS\\output\\MCUCore_Load" 
 Flash Erase Done.
 ISP size=0, E2PROM size=1024;
@@ -168,4 +67,4 @@ Code Option Verify Done
 Code Security Write Done.
 Code Security Verify Done
 Update EEprom Done
-elaspe time 4000 ms
+elaspe time 4016 ms
diff --git a/output/Main.lst b/output/Main.lst
index 480d743..579ed0e 100644
--- a/output/Main.lst
+++ b/output/Main.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01   MAIN                                                                  02/08/2025 15:18:20 PAGE 1   
+C51 COMPILER V9.01   MAIN                                                                  02/11/2025 15:43:03 PAGE 1   
 
 
 C51 COMPILER V9.01, COMPILATION OF MODULE MAIN
@@ -62,7 +62,7 @@ line level    source
   51   3                              ProtectProcess();                               //µçѹ¡¢µçÁ÷¡¢Î¶ȱ£»¤
   52   3                              
   53   3                              PorSelfTest();                                  //µÚÒ»´ÎÉϵ籣»¤¼ì²â£¨ÑÓʱ½Ï¶Ì£¬Ôݶ¨50mSÒ»´Î¼ì²â£©
-C51 COMPILER V9.01   MAIN                                                                  02/08/2025 15:18:20 PAGE 2   
+C51 COMPILER V9.01   MAIN                                                                  02/11/2025 15:43:03 PAGE 2   
 
   54   3                              
   55   3                              LoadCheck();                                    //¼ì²â¸ºÔØÊÇ·ñÊÍ·Å
@@ -126,7 +126,7 @@ line level    source
  112   4                              }
  113   3                              
  114   3                              McuFlashWrWaitCheck();                  //¼ì²âÊÇ·ñÐèÒª¸üвÎÊýµ½MCU Flash
-C51 COMPILER V9.01   MAIN                                                                  02/08/2025 15:18:20 PAGE 3   
+C51 COMPILER V9.01   MAIN                                                                  02/11/2025 15:43:03 PAGE 3   
 
  115   3                              
  116   3                      E2PRomBKCheck();                                //±¸·ÝEEPROM
diff --git a/output/Main.obj b/output/Main.obj
index 4c6897c314ca5ef4447946e5b528d8fba1ea659e..6bc95f1384386dee2c597dfb2a5632e6074301b7 100644
GIT binary patch
delta 154
zcmdn6jAa85xiU((|6i3Zs27u8T2fG2662egnWvYZl*P!P_-EDT1jg-5EVqxYN}nt*
zC^^}LXa3fX52T~
sQt+o7NG}tEm|l#BtD}o+P`pb}SWG~We~7Ddh@OXLbAZtF03pT)02(bhBLDyZ

delta 154
zcmdn6jAa85xiU)Iur5y*)Qib4Eh#81iSbR$%+t$H%3@?_U|7C6fpI$%i~LpL)XDOK
zl9NqX?yy*Ao{yU>!n%-g_U3J@u^i$+Rq2cj{K@$#squ*g1rYtowwty1-a~cD3Q99F
uPqq~NDF@Qa#2}^@8_5ab`?>Kvlyq23%IG(A9w@c{s7|1l!~

diff --git a/output/McuFlash.lst b/output/McuFlash.lst
index 1613ad1..01f43af 100644
--- a/output/McuFlash.lst
+++ b/output/McuFlash.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01   MCUFLASH                                                              02/08/2025 15:18:20 PAGE 1   
+C51 COMPILER V9.01   MCUFLASH                                                              02/11/2025 15:43:04 PAGE 1   
 
 
 C51 COMPILER V9.01, COMPILATION OF MODULE MCUFLASH
@@ -62,7 +62,7 @@ line level    source
   50          
   51          
   52          /*************************************************************************************************
-C51 COMPILER V9.01   MCUFLASH                                                              02/08/2025 15:18:20 PAGE 2   
+C51 COMPILER V9.01   MCUFLASH                                                              02/11/2025 15:43:04 PAGE 2   
 
   53          * º¯ÊýÃû: McuFlashBlankCheck
   54          * ²Î  Êý: McuFlashAddr£ºÆðʼµØÖ·
@@ -126,7 +126,7 @@ line level    source
  112   1          
  113   1          for(i=0; i>8;
@@ -190,7 +190,7 @@ line level    source
  174                    3.½«XRAMÊý¾ÝдÈë
  175                    4.УÑéXRAMºÍMCU FlashÇøÊý¾ÝÊÇ·ñÒ»ÖÂ
  176          *************************************************************************************************/
-C51 COMPILER V9.01   MCUFLASH                                                              02/08/2025 15:18:20 PAGE 4   
+C51 COMPILER V9.01   MCUFLASH                                                              02/11/2025 15:43:04 PAGE 4   
 
  177          BOOL McuFlashWrite(U16 McuFlashAddr, U16 XramAddr)
  178          {
@@ -254,7 +254,7 @@ line level    source
  236          
  237          
  238          /*************************************************************************************************
-C51 COMPILER V9.01   MCUFLASH                                                              02/08/2025 15:18:20 PAGE 5   
+C51 COMPILER V9.01   MCUFLASH                                                              02/11/2025 15:43:04 PAGE 5   
 
  239          * º¯ÊýÃû: McuFlashProcess
  240          * ²Î  Êý: ÎÞ
@@ -318,7 +318,7 @@ line level    source
  298   2              }
  299   1      }
  300          
-C51 COMPILER V9.01   MCUFLASH                                                              02/08/2025 15:18:20 PAGE 6   
+C51 COMPILER V9.01   MCUFLASH                                                              02/11/2025 15:43:04 PAGE 6   
 
  301          
  302          /*************************************************************************************************
@@ -382,7 +382,7 @@ line level    source
  359   1              McuFlashEn();
  360   1              if(CWORD[McuFlashAddr/2] == 0x5AA5)
  361   1              {
-C51 COMPILER V9.01   MCUFLASH                                                              02/08/2025 15:18:20 PAGE 7   
+C51 COMPILER V9.01   MCUFLASH                                                              02/11/2025 15:43:04 PAGE 7   
 
  362   2                      Result = 1;
  363   2              }
diff --git a/output/McuFlash.obj b/output/McuFlash.obj
index 8100738b7ca7c90a9fef23176efd18ebd497b68d..9f387d983dcdd782c9dcc5f1eb4f52d8cafd5d7b 100644
GIT binary patch
delta 145
zcmbRLkY)ZumJNZ73LXDfrHkstEdl$ON!CYQS9Bo=4r%
p1||kEy%-NyM;F(ic$c8Cn1CSv5Lf3AJrB+1FUs4$C^N3+0RU4JI-dXl

delta 145
zcmbRLkY)ZumJNZ73O20E(?#`S@=Hq!N=ssVlS|!l5{onR@{_U{8J^wSnXCmTqbi2mcH~TSOW@3@QDx5mGP+oGf9m^dS>&)|UljT_J7?*FJ%X&@{
iBAG8Q&B#2tTmB~-NScWOs6d=iy?K$s_C*Se;oJZl*Bpib

diff --git a/output/Memory.lst b/output/Memory.lst
index 2f0eab9..ec7fc4e 100644
--- a/output/Memory.lst
+++ b/output/Memory.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01   MEMORY                                                                02/08/2025 15:18:20 PAGE 1   
+C51 COMPILER V9.01   MEMORY                                                                02/11/2025 15:43:03 PAGE 1   
 
 
 C51 COMPILER V9.01, COMPILATION OF MODULE MEMORY
@@ -62,7 +62,7 @@ line level    source
   50          sbit bOV                        =       uiBatStatus^8;
   51          sbit bUV                        =       uiBatStatus^9;
   52          sbit bOCC                       =       uiBatStatus^10;
-C51 COMPILER V9.01   MEMORY                                                                02/08/2025 15:18:20 PAGE 2   
+C51 COMPILER V9.01   MEMORY                                                                02/11/2025 15:43:03 PAGE 2   
 
   53          sbit bOCD1                      =       uiBatStatus^11;
   54          sbit bOCD2                      =       uiBatStatus^12;
@@ -126,7 +126,7 @@ line level    source
  112          U8  xdata   E2ucOCCDelay                        _at_    CHG_PARA_MAP_ADDR+15;
  113          U8  xdata       E2ucOCCRDelay                   _at_    CHG_PARA_MAP_ADDR+16;
  114          U8  xdata       E2ucRamCheckFlg2        _at_    CHG_PARA_MAP_ADDR+17;
-C51 COMPILER V9.01   MEMORY                                                                02/08/2025 15:18:20 PAGE 3   
+C51 COMPILER V9.01   MEMORY                                                                02/11/2025 15:43:03 PAGE 3   
 
  115          
  116          //·Åµç²ÎÊýÇø¿ªÊ¼ SubClassID=0x03                langth=21
@@ -190,7 +190,7 @@ line level    source
  174          U16 xdata       E2uiAFEOVvol                    _at_    AFE_PARA_MAP_ADDR+1;
  175          U8  xdata       E2ucRamCheckFlgA        _at_    AFE_PARA_MAP_ADDR+3;
  176          
-C51 COMPILER V9.01   MEMORY                                                                02/08/2025 15:18:20 PAGE 4   
+C51 COMPILER V9.01   MEMORY                                                                02/11/2025 15:43:03 PAGE 4   
 
  177          //У׼²ÎÊýÇø¿ªÊ¼ SubClassID=0x0B                langth=12
  178          U16 xdata       E2uiVPackGain                   _at_    CALI_PARA_MAP_ADDR;
diff --git a/output/Memory.obj b/output/Memory.obj
index 81bdc92d495e126f60319747ad9866c44c37948d..5e5c3897c2b03821fe391610e5ffd142cb5e02dd 100644
GIT binary patch
delta 157
zcmX@VhxPm()(zf_%k*_1V%
zap~r{tg@0yAZ3gUg30+Qsqu*g1u?#j>U
CGCg?!

delta 157
zcmX@VhxPm()(zf_%r>mcC;Ksqv(z)Srf$w;+`+^me^oejvMS407VFIOag!e^iBC3V
zO=o<&c`mE0q!LIOBZFXaeoAV5VnIQSZ)$FSQKepTMxr#s$$%y4ObnA78AUdKkh{dB
z05XV)K|(La!`0EnH7MRCC@jV`BE;1wAjscW&x3jLBgLN(OYSR4GO9QKRNDSii80I?
E0CMy-c>n+a

diff --git a/output/MosCtrl.lst b/output/MosCtrl.lst
index 517a124..30895b2 100644
--- a/output/MosCtrl.lst
+++ b/output/MosCtrl.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01   MOSCTRL                                                               02/08/2025 15:18:21 PAGE 1   
+C51 COMPILER V9.01   MOSCTRL                                                               02/11/2025 15:43:04 PAGE 1   
 
 
 C51 COMPILER V9.01, COMPILATION OF MODULE MOSCTRL
@@ -62,7 +62,7 @@ line level    source
   49   2              }
   50   1              
   51   1              if(bOCD1 || bOCD2 || bAFE_SC)                       //·Åµç¹ýÁ÷ʱ£¬Èç¹ûOCPMÅäÖÃΪ1£¬Ôò¹Ø±Õ³äµçMOS
-C51 COMPILER V9.01   MOSCTRL                                                               02/08/2025 15:18:21 PAGE 2   
+C51 COMPILER V9.01   MOSCTRL                                                               02/11/2025 15:43:04 PAGE 2   
 
   52   1              {
   53   2              bCHGMOS = 0;
diff --git a/output/MosCtrl.obj b/output/MosCtrl.obj
index 3a83449d0f68a4d419953a2ae56b6a12dd6e1fed..a093569b803c4d2438c0a1c9b77db3643423c49c 100644
GIT binary patch
delta 96
zcmey_&GNIGWrH6hbI1Qxn*$lIGO^q~x+;CL7Ry(bpCE=ZYaQdc&5KwsaVUT!m>4AV
tVmw?OU0j3WU4p`5Tq8nUjRJ!Fef2!{O`gK{6QXG%za*pP=GFXu-vGO!Ct&~p

delta 96
zcmey_&GNIGWrH6hvn}iL&4G+pnONkn3a3uiV)@Eqoq0ZPvNCHOW8~&Vtd}?xKoU$0
v5_&Nnu8uCQLGdm@VKJ@|A+AONLH@pa9?X-c@co2nn#eE7sJ?kMzuz|iFpMB!

diff --git a/output/PorSelfTest.lst b/output/PorSelfTest.lst
index ad661df..99e1b7a 100644
--- a/output/PorSelfTest.lst
+++ b/output/PorSelfTest.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01   PORSELFTEST                                                           02/08/2025 15:18:21 PAGE 1   
+C51 COMPILER V9.01   PORSELFTEST                                                           02/11/2025 15:43:04 PAGE 1   
 
 
 C51 COMPILER V9.01, COMPILATION OF MODULE PORSELFTEST
@@ -62,7 +62,7 @@ line level    source
   50   2                      if(uiCellVmin < E2uiUVvol)
   51   2                      {               
   52   3                              if(++uiUVDelayCnt >= TIME_50mS_50mS)
-C51 COMPILER V9.01   PORSELFTEST                                                           02/08/2025 15:18:21 PAGE 2   
+C51 COMPILER V9.01   PORSELFTEST                                                           02/11/2025 15:43:04 PAGE 2   
 
   53   3                              {
   54   4                                      bUV = 1;
@@ -126,7 +126,7 @@ line level    source
  112   3                              uiUTCDelayCnt = 0;
  113   3                      }
  114   2              }
-C51 COMPILER V9.01   PORSELFTEST                                                           02/08/2025 15:18:21 PAGE 3   
+C51 COMPILER V9.01   PORSELFTEST                                                           02/11/2025 15:43:04 PAGE 3   
 
  115   1      }
  116          
@@ -190,7 +190,7 @@ line level    source
  174          * Ãè  Êö: µÚÒ»´ÎÉϵçʱµÄ×Լ죬³ÖÐø100mS£¬Éϵç×Ô¼ì×î¿ìÍê³Éʱ¼äΪ50mS
  175          *************************************************************************************************/
  176          void PorSelfTest(void)
-C51 COMPILER V9.01   PORSELFTEST                                                           02/08/2025 15:18:21 PAGE 4   
+C51 COMPILER V9.01   PORSELFTEST                                                           02/11/2025 15:43:04 PAGE 4   
 
  177          {
  178   1              if(bPorSelfTestFlg)
diff --git a/output/PorSelfTest.obj b/output/PorSelfTest.obj
index cec1ce74ae64e9a0be760403b81eaddf82c700ed..e0e923c367bb04bc0309e8727d3460b63b02fd91 100644
GIT binary patch
delta 98
zcmcb$lI7M)mJLyi%pLz%ZH{HU%fxc~=&JO|jS`ZR!&&aI`~-2#S?d_(H*aG-Dg=?N
vmyl-MH+i&)|Ulg(M{7*}oH#(Go;
xB3UmX&B#1?w!}|4kTes6m|l#BtD}o+P`pb}SWG~We~7Ddh@OY~=1r0szX7@XA-@0s

diff --git a/output/Protect.lst b/output/Protect.lst
index a5bc98d..0a5f7a8 100644
--- a/output/Protect.lst
+++ b/output/Protect.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01   PROTECT                                                               02/08/2025 15:18:21 PAGE 1   
+C51 COMPILER V9.01   PROTECT                                                               02/11/2025 15:43:04 PAGE 1   
 
 
 C51 COMPILER V9.01, COMPILATION OF MODULE PROTECT
@@ -62,7 +62,7 @@ line level    source
   48   4                                      bOVLock = 0;
   49   4                                      uiOVDelayCnt = 0;
   50   4                                      uiOVRDelayCnt = 0;
-C51 COMPILER V9.01   PROTECT                                                               02/08/2025 15:18:21 PAGE 2   
+C51 COMPILER V9.01   PROTECT                                                               02/11/2025 15:43:04 PAGE 2   
 
   51   4                              }
   52   3                      }
@@ -126,7 +126,7 @@ line level    source
  110   2              }
  111   1              else if(!bUVLock)
  112   1              {
-C51 COMPILER V9.01   PROTECT                                                               02/08/2025 15:18:21 PAGE 3   
+C51 COMPILER V9.01   PROTECT                                                               02/11/2025 15:43:04 PAGE 3   
 
  113   2                      if(uiCellVmin > E2uiUVRvol)
  114   2                      {                       
@@ -190,7 +190,7 @@ line level    source
  172   2                      else if(uiTempeMax > E2uiTempOTC)
  173   2                      {
  174   3                              uiOTCRDelayCnt = 0;
-C51 COMPILER V9.01   PROTECT                                                               02/08/2025 15:18:21 PAGE 4   
+C51 COMPILER V9.01   PROTECT                                                               02/11/2025 15:43:04 PAGE 4   
 
  175   3                      }
  176   2              }
@@ -254,7 +254,7 @@ line level    source
  234   2                      {
  235   3                              if(++uiOTDDelayCnt >= TEMPE_DELAY_CNT)
  236   3                              {
-C51 COMPILER V9.01   PROTECT                                                               02/08/2025 15:18:21 PAGE 5   
+C51 COMPILER V9.01   PROTECT                                                               02/11/2025 15:43:04 PAGE 5   
 
  237   4                                      bOTD = 1;
  238   4                                      uiOTDDelayCnt = 0;
@@ -318,7 +318,7 @@ line level    source
  296   4                                      bUTD = 0;
  297   4                                      uiUTDDelayCnt = 0;
  298   4                                      uiUTDRDelayCnt = 0;
-C51 COMPILER V9.01   PROTECT                                                               02/08/2025 15:18:21 PAGE 6   
+C51 COMPILER V9.01   PROTECT                                                               02/11/2025 15:43:04 PAGE 6   
 
  299   4                              }
  300   3                      }
@@ -382,7 +382,7 @@ line level    source
  358   3                      }
  359   2                      else if(!bLoadChkingFlg)
  360   2                      {
-C51 COMPILER V9.01   PROTECT                                                               02/08/2025 15:18:21 PAGE 7   
+C51 COMPILER V9.01   PROTECT                                                               02/11/2025 15:43:04 PAGE 7   
 
  361   3                  if(uiOCD1DelayCnt > 0)
  362   3                  {
@@ -446,7 +446,7 @@ line level    source
  420   2                      ProtectOCD2();                  //·Åµç¹ýÁ÷2±£»¤
  421   2              }
  422   1      }
-C51 COMPILER V9.01   PROTECT                                                               02/08/2025 15:18:21 PAGE 8   
+C51 COMPILER V9.01   PROTECT                                                               02/11/2025 15:43:04 PAGE 8   
 
  423          
  424          
diff --git a/output/Protect.obj b/output/Protect.obj
index 6074be289867a0bc4f89c6bb96cdb80ec696ef54..1983c7360d5ebae599cca06e8f78098758b539ba 100644
GIT binary patch
delta 139
zcmbRBoMqN?mJNQ4%pLz%O%7y~U`f$mp1wJkaVHbY?W3#GCu^~MW%&tWD6`fvGH+hQ
z%A_m>Qo_g}l$@WE8lO^B786jEUy_mb4r5X24KCAsx4y2ulK};{k
i!`0EnH7MRCC@dx*$Unr@IYiGxv-ye6_9r@w+t>ga>oykv

delta 139
zcmbRBoMqN?mJNQ4%(kq{CkHZ0u<%7rOx~Q!xRZ%R{;F{5WG$AjEY_Ll<0dP!)-hh$
zyoi-aSqh|tkwGXqKP5FjrKl_>peVm2HMvADnR)X*jrUNE8?~hwnJ1ss{wW92&cq<5
k7vtgT=;9g_?-CRi6A*H~Eq5Pl(3*a*~Xi%|GR~|CD1q%?tqU
CcPfYg

delta 104
zcmX?dl;y}#mJLpf%(kq{H@h;PWnz)PDx5l5jO8nfb>{iF$q(hkC#$ihGnQ}eV>OXb
z07)`2Na)3QxH`JH2F1Gsg~hl=gt!_71o`{wc`#3YB>NMh@xGiSqk8jCx$QsY7*8_;
E068@yhyVZp

diff --git a/output/STARTUP.lst b/output/STARTUP.lst
index 6b065de..e569ee6 100644
--- a/output/STARTUP.lst
+++ b/output/STARTUP.lst
@@ -1,4 +1,4 @@
-A51 MACRO ASSEMBLER  STARTUP                                                              02/08/2025 15:18:21 PAGE     1
+A51 MACRO ASSEMBLER  STARTUP                                                              02/11/2025 15:43:04 PAGE     1
 
 
 MACRO ASSEMBLER A51 V8.02
@@ -48,7 +48,7 @@ LOC  OBJ            LINE     SOURCE
 001C 00               37                     NOP
 001D 020000   F       38                                     LJMP    ?C_START
                       39                     END
-A51 MACRO ASSEMBLER  STARTUP                                                              02/08/2025 15:18:21 PAGE     2
+A51 MACRO ASSEMBLER  STARTUP                                                              02/11/2025 15:43:04 PAGE     2
 
 SYMBOL TABLE LISTING
 ------ ----- -------
diff --git a/output/STARTUP.obj b/output/STARTUP.obj
index d16cc238036a3bc3022419dd5425685f4be6569c..5e7b9ba1f2fa03ea56fb7fa8b24b6909812a5405 100644
GIT binary patch
delta 25
hcmZ3&wuEiME!K|ztI|a#9uS%MS%#5yvjC$A69A3F2~_|9

delta 25
hcmZ3&wuEiMEmm9B<>?|54~R_sEW_x#S%6W52>^Lx2vq<8

diff --git a/output/TWI.lst b/output/TWI.lst
index ad11028..edf9cf2 100644
--- a/output/TWI.lst
+++ b/output/TWI.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01   TWI                                                                   02/08/2025 15:18:21 PAGE 1   
+C51 COMPILER V9.01   TWI                                                                   02/11/2025 15:43:04 PAGE 1   
 
 
 C51 COMPILER V9.01, COMPILATION OF MODULE TWI
@@ -62,7 +62,7 @@ line level    source
   51          
   52          
   53          /*************************************************************************************************
-C51 COMPILER V9.01   TWI                                                                   02/08/2025 15:18:21 PAGE 2   
+C51 COMPILER V9.01   TWI                                                                   02/11/2025 15:43:04 PAGE 2   
 
   54          * º¯ÊýÃû: TWICheckStatus
   55          * ²Î  Êý: Status£ºµ±Ç°TWIµÄ״̬
@@ -126,7 +126,7 @@ line level    source
  112   2                      HTimeoutChk();
  113   2                      TWICON = 0x60;                          //Start
  114   2                      if((!TWICheckStatus(0x08))&&(!TWICheckStatus(0x10)))
-C51 COMPILER V9.01   TWI                                                                   02/08/2025 15:18:21 PAGE 3   
+C51 COMPILER V9.01   TWI                                                                   02/11/2025 15:43:04 PAGE 3   
 
  115   2                      {
  116   3                              Result = 0;
@@ -190,7 +190,7 @@ line level    source
  174   5                                              goto WrErr;
  175   5                                      }
  176   4                                      WrBuf++;
-C51 COMPILER V9.01   TWI                                                                   02/08/2025 15:18:21 PAGE 4   
+C51 COMPILER V9.01   TWI                                                                   02/11/2025 15:43:04 PAGE 4   
 
  177   4                              }
  178   3                      }
@@ -254,7 +254,7 @@ line level    source
  236   2                      {
  237   3                              Result = 0;
  238   3                              goto RdErr;
-C51 COMPILER V9.01   TWI                                                                   02/08/2025 15:18:21 PAGE 5   
+C51 COMPILER V9.01   TWI                                                                   02/11/2025 15:43:04 PAGE 5   
 
  239   3                      }
  240   2      
@@ -318,7 +318,7 @@ line level    source
  298   5                                              TWICheckStatus(0x50);
  299   5                                      }
  300   4                                      *RdBuf = TWIDAT;
-C51 COMPILER V9.01   TWI                                                                   02/08/2025 15:18:21 PAGE 6   
+C51 COMPILER V9.01   TWI                                                                   02/11/2025 15:43:04 PAGE 6   
 
  301   4                                      RdBuf++;
  302   4                              }
@@ -382,7 +382,7 @@ line level    source
  360          //      TWIBR = (24000/TWI_FREQ_KHz-16)/2/1;            //ÅäÖ÷¢ËͲ¨ÌØÂÊ£¬½ûÖ¹×ÜÏß³¬Ê±Åжϣ¬f=fsys/(16+2*CR*TWI
              -BR)=24MHz/(16+2*16*TWIBR)=**KHz
  361          //      TWISTA = 0x06;                              //16·ÖƵ
-C51 COMPILER V9.01   TWI                                                                   02/08/2025 15:18:21 PAGE 7   
+C51 COMPILER V9.01   TWI                                                                   02/11/2025 15:43:04 PAGE 7   
 
  362          //      TWICON = 0x40;                              //ENTWI £¬½ûÖ¹¸ßµçƽ³¬Ê±
  363          //      TWTFREE = 0xff;                             //×î´ó³¬Ê±ÅäÖÃ
@@ -446,7 +446,7 @@ line level    source
  419          //                                      TWISTA = 0x00;
  420          //                              break;
  421          //                              
-C51 COMPILER V9.01   TWI                                                                   02/08/2025 15:18:21 PAGE 8   
+C51 COMPILER V9.01   TWI                                                                   02/11/2025 15:43:04 PAGE 8   
 
  422          //                              case 2:
  423          //                                      TWISTA = 0x02;
diff --git a/output/TWI.obj b/output/TWI.obj
index 85a6c7c41ed2f9a3a4903060645ccf832c53f7ed..4fc75336b6e00494a9c4f8ece5476ad293dc6858 100644
GIT binary patch
delta 102
zcmdmWj%C+5mJLpf%pLz%ZFXfm%fxc~=&JO|Vk}=-eu5bMtaXgHH}|m`N+^INm>4AV
zVmw?OU0j3WU4p`5Tq8nUjRJ!Fef2!{O};PtlMSSai2{iF$^5K!jA@(uSPdl2oX<}jkY7=KvZ~i8?{hJ)43kLwW
C460y4zOwuTG2U^DPxfR@XH43>
zkyVaW0VK)9AfXrI;p*t(8Wism6c*ze5#nkT5ajQx=do|{d#;}ljc>Rm88tVv@x1v2
E06&8(0ssI2

delta 106
zcmezLm-*9Q<_+PDthTJn)5Ry-GKz05W<12iB7aplb+RSPR~GBc^Kp~kaf?s(WKCy$
zyLlt49IFCIl8He=FUG^w(Zw|=-X$n3#x)|u)hHmy-&fCrdGdR%pAe02xFs3YH?#4)
G`2+yjf+Yd~

diff --git a/output/TwiIO.lst b/output/TwiIO.lst
index 3aad89b..1efb7b7 100644
--- a/output/TwiIO.lst
+++ b/output/TwiIO.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01   TWIIO                                                                 02/08/2025 15:18:21 PAGE 1   
+C51 COMPILER V9.01   TWIIO                                                                 02/11/2025 15:43:04 PAGE 1   
 
 
 C51 COMPILER V9.01, COMPILATION OF MODULE TWIIO
@@ -62,7 +62,7 @@ line level    source
               {
                       U8 i;
                       for(i=0; i<13; i++)
-C51 COMPILER V9.01   TWIIO                                                                 02/08/2025 15:18:21 PAGE 2   
+C51 COMPILER V9.01   TWIIO                                                                 02/11/2025 15:43:04 PAGE 2   
 
                       {
                       }
@@ -126,7 +126,7 @@ line level    source
                               if(TWI_RD_CLK)
                               {
                                       result = 1;
-C51 COMPILER V9.01   TWIIO                                                                 02/08/2025 15:18:21 PAGE 3   
+C51 COMPILER V9.01   TWIIO                                                                 02/11/2025 15:43:04 PAGE 3   
 
                                       break;
                               }
@@ -190,7 +190,7 @@ line level    source
                                       TWI_DAT_HIGH;
                               }
                               else
-C51 COMPILER V9.01   TWIIO                                                                 02/08/2025 15:18:21 PAGE 4   
+C51 COMPILER V9.01   TWIIO                                                                 02/11/2025 15:43:04 PAGE 4   
 
                               {
                                       TWI_DAT_LOW;
@@ -254,7 +254,7 @@ line level    source
                       {
                               TWI_DAT_LOW;
                       }
-C51 COMPILER V9.01   TWIIO                                                                 02/08/2025 15:18:21 PAGE 5   
+C51 COMPILER V9.01   TWIIO                                                                 02/11/2025 15:43:04 PAGE 5   
 
                       else
                       {
@@ -318,7 +318,7 @@ line level    source
                               if(!TwiSendData(SlaveID, 1))                    //Send Slave E2ucID
                               {
                                       goto WrErr;
-C51 COMPILER V9.01   TWIIO                                                                 02/08/2025 15:18:21 PAGE 6   
+C51 COMPILER V9.01   TWIIO                                                                 02/11/2025 15:43:04 PAGE 6   
 
                               }
                               
@@ -382,7 +382,7 @@ line level    source
                   TempBuf[0] = SlaveID;
                   TempBuf[1] = (U8)RdAddr;
               //    TempBuf[2] = Length;
-C51 COMPILER V9.01   TWIIO                                                                 02/08/2025 15:18:21 PAGE 7   
+C51 COMPILER V9.01   TWIIO                                                                 02/11/2025 15:43:04 PAGE 7   
 
                   TempBuf[2] = SlaveID | 0x01;
                       
@@ -446,7 +446,7 @@ line level    source
                                       *RdBuf = TempBuf[3+i];
                                       RdBuf++;   
                                   }
-C51 COMPILER V9.01   TWIIO                                                                 02/08/2025 15:18:21 PAGE 8   
+C51 COMPILER V9.01   TWIIO                                                                 02/11/2025 15:43:04 PAGE 8   
 
                               }
                           }
diff --git a/output/TwiIO.obj b/output/TwiIO.obj
index 3815cf60845c039f1dbcb485402d998fc2a62bcb..de77e62e524b52da58c853f7810eff2349874b43 100644
GIT binary patch
delta 94
zcmcchllj(9<_#W<%pLz%ZT4oo$i#B{=&JO|3M^k)eu5a1taXeYn`f{dVTMQ~a7r`o
rn_R>BQw}7}#2}^@8_5ab`?>Kvlyp}Bc7m-{CGt+6IE

delta 94
zcmcchllj(9<_#W<%(kq{H+wT)WMYxODx5l5f#oZUb>{iF$&##fjF&ghU_HVNkx1Z_
tW@MgR!}(JVB+bMirWfPk>geJc6z>ug784NUAL8m9qUWK$c`}##CjdjSATs~}

diff --git a/output/Uart.lst b/output/Uart.lst
index 8cf0354..fa88d6d 100644
--- a/output/Uart.lst
+++ b/output/Uart.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01   UART                                                                  02/08/2025 15:18:21 PAGE 1   
+C51 COMPILER V9.01   UART                                                                  02/11/2025 15:43:04 PAGE 1   
 
 
 C51 COMPILER V9.01, COMPILATION OF MODULE UART
@@ -62,7 +62,7 @@ line level    source
                       #elif UART0_DEFINE == 15
                       UART0CR = 0x14;
                       #elif UART0_DEFINE == 16
-C51 COMPILER V9.01   UART                                                                  02/08/2025 15:18:21 PAGE 2   
+C51 COMPILER V9.01   UART                                                                  02/11/2025 15:43:04 PAGE 2   
 
                       UART0CR = 0x25;
                       #elif UART0_DEFINE == 17
@@ -126,7 +126,7 @@ line level    source
  110          void InterruptUART0(void) interrupt 4
  111          {
  112   1              U8 xdata RxData;
-C51 COMPILER V9.01   UART                                                                  02/08/2025 15:18:21 PAGE 3   
+C51 COMPILER V9.01   UART                                                                  02/11/2025 15:43:04 PAGE 3   
 
  113   1              
  114   1              _push_(INSCON);
@@ -190,7 +190,7 @@ line level    source
                       UART1CR = 0x14;
                       #elif UART1_DEFINE == 13
                       UART1CR = 0x54;
-C51 COMPILER V9.01   UART                                                                  02/08/2025 15:18:21 PAGE 4   
+C51 COMPILER V9.01   UART                                                                  02/11/2025 15:43:04 PAGE 4   
 
                   #elif UART1_DEFINE == 14
                       UART1CR = 0x24;
@@ -254,7 +254,7 @@ line level    source
               * Ãè  Êö: UART1½ÓÊպͷ¢ËÍÖжϷþÎñ³ÌÐò
                         InterruptUart1AppRx(RxData)£¬µ÷ÓÃAPP²ãµÄ½ÓÊÕÖжϴ¦Àíº¯Êý
                         InterruptUart1AppTx()£¬µ÷ÓÃAPP²ãµÄ·¢ËÍÖжϴ¦Àíº¯Êý
-C51 COMPILER V9.01   UART                                                                  02/08/2025 15:18:21 PAGE 5   
+C51 COMPILER V9.01   UART                                                                  02/11/2025 15:43:04 PAGE 5   
 
               *************************************************************************************************/
               void InterruptUart1(void) interrupt 15
@@ -318,7 +318,7 @@ line level    source
               {
                       U8 xdata RxData;
                       
-C51 COMPILER V9.01   UART                                                                  02/08/2025 15:18:21 PAGE 6   
+C51 COMPILER V9.01   UART                                                                  02/11/2025 15:43:04 PAGE 6   
 
                       _push_(INSCON);
                   McuBank1Sel();
diff --git a/output/Uart.obj b/output/Uart.obj
index a4dc3da1cb342c58cc4d77beb9483b577e13f686..7aa8e1fa32262e324557b3ce91f09bc06ed510fb 100644
GIT binary patch
delta 98
zcmeC3!O}Z}WrHgtbI1Qxn>`rMGqK!0x+;D0J6_4jCM3Uo#Wg72B`7Q=Ajm(&)j34ZLvyn{|GPf`<<}<+

delta 98
zcmeC3!O}Z}WrHgtvn}iL%^r;BnONkn3a3tf$16G6gyjy4b>{iF$s(+EjJ2C5vxag&
xB;W8#Gcr%+;QJ{Dl4fEM(~I$Nb#!qJigyVLiwOww4{>!4(eqH>EYJV$4*)o$APfKi

diff --git a/output/UartApp.lst b/output/UartApp.lst
index a78cf66..4f47a49 100644
--- a/output/UartApp.lst
+++ b/output/UartApp.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 1   
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 1   
 
 
 C51 COMPILER V9.01, COMPILATION OF MODULE UARTAPP
@@ -62,7 +62,7 @@ line level    source
   50          Others: NULL
   51          *******************************************************************************/
   52          U16 code Page1WrRdFuncTable[18]=
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 2   
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 2   
 
   53          {
   54              SYS_PARA_MAP_ADDR,                  //SubClassID 0x00
@@ -126,7 +126,7 @@ line level    source
  112   1              if(ucUart0Buf[2] == 0x00)            //Testing equipment is properly
  113   1              {
  114   2                      Uart0SendAck();
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 3   
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 3   
 
  115   2              }
  116   1              else
@@ -190,7 +190,7 @@ line level    source
  174   1              if(ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] == CRC8cal(&ucUart0Buf, ucUart0Buf[UART_LENGTH]+3))
  175   1              {
  176   2                      for(i=0; i= 128)
@@ -894,7 +894,7 @@ line level    source
               * º¯ÊýÃû: Uart1CaliCurrent
               * ²Î  Êý: ÎÞ
               * ·µ»ØÖµ: ÎÞ
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 15  
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 15  
 
               * Ãè  Êö: UART1ͨѶ·¢ËÍУ׼×ܵçѹµÄÊý¾Ý
               *************************************************************************************************/
@@ -958,7 +958,7 @@ line level    source
  918          * º¯ÊýÃû: Uart0CaliCurrent¡¢Uart0CaliCurOffset
  919          * ²Î  Êý: ÎÞ
  920          * ·µ»ØÖµ: ÎÞ
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 16  
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 16  
 
  921          * Ãè  Êö: UART0ͨѶ·¢ËÍУ׼µçÁ÷²É¼¯ÔöÒæ&OffsetµÄÊý¾Ý
  922          *************************************************************************************************/
@@ -1022,7 +1022,7 @@ line level    source
                                                               | ((U32)ucUart1Buf[6]);
                       
                       if((!AFE.siCurr) || (!slExtCur))
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 17  
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 17  
 
                       {
                           Uart1SendNack();
@@ -1086,7 +1086,7 @@ line level    source
                       }
                       else
                       {
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 18  
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 18  
 
                               Uart2SendNack();
                       }
@@ -1150,7 +1150,7 @@ line level    source
 1104   1      }
 1105          #endif
 1106          
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 19  
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 19  
 
 1107          #if     (UART1_DEFINE != 0)
               /*************************************************************************************************
@@ -1214,7 +1214,7 @@ line level    source
                       {
                               Uart2SendNack();        
                       }
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 20  
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 20  
 
               }
               
@@ -1278,7 +1278,7 @@ line level    source
                       if(ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] == CRC8cal(&ucUart1Buf, ucUart1Buf[UART_LENGTH]+3))
                       {
                               for(i=0; i<7; i++)
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 21  
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 21  
 
                               {
                                       ucExtRTC[i] = ucUart1Buf[3+i];
@@ -1342,7 +1342,7 @@ line level    source
 1290   2              break;
 1291   2              case CALI_CUR_COMMAND:
 1292   2                  Uart0CaliCurrent();
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 22  
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 22  
 
 1293   2              break;
 1294   2              case CALI_VOL_COMMAND:
@@ -1406,7 +1406,7 @@ line level    source
                       break;
                       case CALI_CUR_COMMAND:
                           Uart1CaliCurrent();
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 23  
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 23  
 
                       break;
                       case CALI_VOL_COMMAND:
@@ -1470,7 +1470,7 @@ line level    source
                       break;
                       case CALI_CUR_COMMAND:
                           Uart2CaliCurrent();
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 24  
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 24  
 
                       break;
                       case CALI_VOL_COMMAND:
@@ -1534,7 +1534,7 @@ line level    source
 1476   3                      }
 1477   2                      else
 1478   2                      {
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 25  
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 25  
 
 1479   3                              uiReceCheckSum = 0;                                 //Ö¡Í·ÅжÏÕýÈ·
 1480   3                              ucUartErrCode = 0;
@@ -1598,7 +1598,7 @@ line level    source
 1538   3          
 1539   3                  Uart0SendAck();
 1540   3                      }
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 26  
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 26  
 
 1541   2              }
 1542   1      }
@@ -1662,7 +1662,7 @@ line level    source
                                       if(ucUartErrCode != 0)                              //Èç¹ûÓдíÎó´úÂëÔò²»Ö´ÐÐÃüÁî´¦Àí
                                       {
                                               ucUart1Buf[INDEXES] = ucUartErrCode;
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 27  
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 27  
 
                                       }
                                       else
@@ -1726,7 +1726,7 @@ line level    source
                           }
                                       if(ucUart2BufPT == (TARGET+1))                       //¼ì²éID
                                       {
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 28  
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 28  
 
                                               if(ucUart2Buf[TARGET] != IAP_BMSID)
                                               {
@@ -1790,7 +1790,7 @@ line level    source
 1724          ucUart0Buf[1]--CMD No.
 1725          ucUart0Buf[2]--Offset
 1726          ucUart0Buf[3]--Data Length
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 29  
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 29  
 
 1727          ucUart0Buf[4...]--Data
 1728          *************************************************************************************************/
@@ -1854,7 +1854,7 @@ line level    source
 1785          
 1786          /*************************************************************************************************
 1787          * º¯ÊýÃû: InterruptUart0AppTx
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 30  
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 30  
 
 1788          * ²Î  Êý: ÎÞ
 1789          * ·µ»ØÖµ: ÎÞ
@@ -1918,7 +1918,7 @@ line level    source
 1845   1              {
 1846   2                      ucUart0TimeoutCnt = 0;
 1847   2                      ucUart0BufPT = 0;
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 31  
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 31  
 
 1848   2                      Uart0RxEn();                                             //UARTÔÊÐí½ÓÊÕÊý¾Ý
 1849   2              }
@@ -1982,7 +1982,7 @@ line level    source
                               {
                                       Uart1WrCmdProcess();                                 //Write the command peocess
                                       bUart1WriteFlg = 0;                                  //PC write MCU communiaction over
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 32  
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 32  
 
                                       ucUart1BufPT = 0;
                               }
@@ -2046,7 +2046,7 @@ line level    source
                       
                       ucSleepTimerCnt = 0;                                        //UARTÕý³£Í¨Ñ¶»áÇåÁãµÍ¹¦ºÄ¼ÆÊý£¬UART¸´Î»¼ÆÊý
                       ucPDTimerCnt = 0;
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 33  
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 33  
 
                       ucUart1TimeoutCnt = 0;
               }
@@ -2110,7 +2110,7 @@ line level    source
                               else if(ucUart2Buf[HEARD1] != 0x5A)                      //ÅжÏÊÇ·ñΪIAP/ISPµÄÆðʼ֡
                               {               
                                       ucUart2BufPT = 0;                                    //Èç¹ûÖ¡Í·´íÎó£¬Ôò¸´Î»Ö¸Õë
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 34  
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 34  
 
                               }
                       }
@@ -2174,7 +2174,7 @@ line level    source
                   else if((ucUart2BufPT==0) || (ucUart2BufPT>=ucUart2Buf[UART_LENGTH]+3)) 
                       {
                               Uart2RxEn();                                             //UARTÔÊÐí½ÓÊÕÊý¾Ý
-C51 COMPILER V9.01   UARTAPP                                                               02/08/2025 15:18:20 PAGE 35  
+C51 COMPILER V9.01   UARTAPP                                                               02/11/2025 15:43:03 PAGE 35  
 
                               ucUart2BufPT = 0;
                               bUart2ReadFlg = 0;
diff --git a/output/UartApp.obj b/output/UartApp.obj
index a7f8972eb37b23d83870fdd59aad497f74ae62a1..b5debb9e6c5fdf743ac8da40076b69e2542090eb 100644
GIT binary patch
delta 100
zcmZp8&f4&tb%P%xbNl~Qn*$lIGO^q~x+;CL7Ry(bpCE=ZYaOHD=0&UrjTAr