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过流保护间隔一定时间自恢复，欠压过压保护还未验证

This commit is contained in:
95384 2025-02-11 16:17:56 +08:00
parent f40a5c92ff
commit 0ed08a8452
78 changed files with 605 additions and 657 deletions
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182
MCUCore.uvopt
View File

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216
MCUCore_uvopt.bak
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<Doc>
<Name>.\HEADER_DRV\BALANCE.H</Name>
<ColumnNumber>5266323</ColumnNumber>
<TopLine>1</TopLine>
<CurrentLine>30</CurrentLine>
</Doc> </Doc>
<Doc> <Doc>
<Name>\Y\KEIL\ZDBMS\ZDBMS\HEADER_APP\UARTAPP.H</Name> <Name>\Y\KEIL\ZDBMS\ZDBMS\HEADER_APP\UARTAPP.H</Name>
@ -3851,6 +3869,60 @@
<TopLine>128</TopLine> <TopLine>128</TopLine>
<CurrentLine>128</CurrentLine> <CurrentLine>128</CurrentLine>
</Doc> </Doc>
<Doc>
<Name>\Y\KEIL\ZDBMS\ZDBMS\HEADER_APP\MEMORY.H</Name>
<ColumnNumber>0</ColumnNumber>
<TopLine>1</TopLine>
<CurrentLine>18</CurrentLine>
</Doc>
<Doc>
<Name>.\header_app\Main.h</Name>
<ColumnNumber>28</ColumnNumber>
<TopLine>103</TopLine>
<CurrentLine>103</CurrentLine>
</Doc>
<Doc>
<Name>.\code_drv\ChargerLoad.c</Name>
<ColumnNumber>19</ColumnNumber>
<TopLine>45</TopLine>
<CurrentLine>45</CurrentLine>
</Doc>
<Doc>
<Name>.\HEADER_DRV\AFE.H</Name>
<ColumnNumber>8</ColumnNumber>
<TopLine>1</TopLine>
<CurrentLine>4</CurrentLine>
</Doc>
<Doc>
<Name>.\HEADER_DRV\CALCULATE.H</Name>
<ColumnNumber>14</ColumnNumber>
<TopLine>1</TopLine>
<CurrentLine>13</CurrentLine>
</Doc>
<Doc>
<Name>.\code_drv\Thermistor.c</Name>
<ColumnNumber>54</ColumnNumber>
<TopLine>330</TopLine>
<CurrentLine>362</CurrentLine>
</Doc>
<Doc>
<Name>.\code_drv\Calculate.c</Name>
<ColumnNumber>49</ColumnNumber>
<TopLine>46</TopLine>
<CurrentLine>76</CurrentLine>
</Doc>
<Doc>
<Name>.\code_drv\Calibrate.c</Name>
<ColumnNumber>31</ColumnNumber>
<TopLine>79</TopLine>
<CurrentLine>80</CurrentLine>
</Doc>
<Doc>
<Name>.\code_drv\ExtE2PRom.c</Name>
<ColumnNumber>13</ColumnNumber>
<TopLine>461</TopLine>
<CurrentLine>461</CurrentLine>
</Doc>
<Doc> <Doc>
<Name>.\code_drv\Uart.c</Name> <Name>.\code_drv\Uart.c</Name>
<ColumnNumber>21</ColumnNumber> <ColumnNumber>21</ColumnNumber>
@ -3869,42 +3941,12 @@
<TopLine>121</TopLine> <TopLine>121</TopLine>
<CurrentLine>121</CurrentLine> <CurrentLine>121</CurrentLine>
</Doc> </Doc>
<Doc>
<Name>.\HEADER_DRV\CALCULATE.H</Name>
<ColumnNumber>28</ColumnNumber>
<TopLine>1</TopLine>
<CurrentLine>31</CurrentLine>
</Doc>
<Doc>
<Name>.\code_drv\Thermistor.c</Name>
<ColumnNumber>58</ColumnNumber>
<TopLine>346</TopLine>
<CurrentLine>383</CurrentLine>
</Doc>
<Doc> <Doc>
<Name>.\code_drv\AFE.c</Name> <Name>.\code_drv\AFE.c</Name>
<ColumnNumber>9</ColumnNumber> <ColumnNumber>9</ColumnNumber>
<TopLine>304</TopLine> <TopLine>304</TopLine>
<CurrentLine>304</CurrentLine> <CurrentLine>304</CurrentLine>
</Doc> </Doc>
<Doc>
<Name>\Y\KEIL\ZDBMS\ZDBMS\HEADER_APP\MEMORY.H</Name>
<ColumnNumber>0</ColumnNumber>
<TopLine>1</TopLine>
<CurrentLine>1</CurrentLine>
</Doc>
<Doc>
<Name>.\code_drv\ChargerLoad.c</Name>
<ColumnNumber>13</ColumnNumber>
<TopLine>13</TopLine>
<CurrentLine>37</CurrentLine>
</Doc>
<Doc>
<Name>.\code_drv\Protect.c</Name>
<ColumnNumber>5</ColumnNumber>
<TopLine>413</TopLine>
<CurrentLine>431</CurrentLine>
</Doc>
<Doc> <Doc>
<Name>.\code_drv\Balance.c</Name> <Name>.\code_drv\Balance.c</Name>
<ColumnNumber>5</ColumnNumber> <ColumnNumber>5</ColumnNumber>
@ -3935,35 +3977,17 @@
<TopLine>1</TopLine> <TopLine>1</TopLine>
<CurrentLine>7</CurrentLine> <CurrentLine>7</CurrentLine>
</Doc> </Doc>
<Doc>
<Name>.\header_app\Main.h</Name>
<ColumnNumber>28</ColumnNumber>
<TopLine>1</TopLine>
<CurrentLine>4</CurrentLine>
</Doc>
<Doc>
<Name>.\HEADER_DRV\CALIBRATE.H</Name>
<ColumnNumber>33</ColumnNumber>
<TopLine>1</TopLine>
<CurrentLine>5</CurrentLine>
</Doc>
<Doc> <Doc>
<Name>.\HEADER_DRV\MCUFLASH.H</Name> <Name>.\HEADER_DRV\MCUFLASH.H</Name>
<ColumnNumber>79</ColumnNumber> <ColumnNumber>79</ColumnNumber>
<TopLine>55</TopLine> <TopLine>55</TopLine>
<CurrentLine>64</CurrentLine> <CurrentLine>64</CurrentLine>
</Doc> </Doc>
<Doc>
<Name>.\HEADER_DRV\AFE.H</Name>
<ColumnNumber>8</ColumnNumber>
<TopLine>16</TopLine>
<CurrentLine>52</CurrentLine>
</Doc>
<Doc> <Doc>
<Name>.\code_app\InterruptApp.c</Name> <Name>.\code_app\InterruptApp.c</Name>
<ColumnNumber>63</ColumnNumber> <ColumnNumber>63</ColumnNumber>
<TopLine>5</TopLine> <TopLine>5</TopLine>
<CurrentLine>41</CurrentLine> <CurrentLine>5</CurrentLine>
</Doc> </Doc>
<Doc> <Doc>
<Name>.\code_drv\McuLib.c</Name> <Name>.\code_drv\McuLib.c</Name>

9
code_dataflash/DataFlash.c
View File

@ -17,23 +17,24 @@ V0.0 2014/09/10 Preliminary
// <q> 充电器锁定 // <q> 充电器锁定
#define _EPCM_CHARGER_LOCK 0 //BIT14; 0：不支持充电器锁定; 1：支持充电器锁定 #define _EPCM_CHARGER_LOCK 0 //BIT14; 0：不支持充电器锁定; 1：支持充电器锁定
// <q> 温度检测点个数 // <q> 温度检测点个数
#define _EPCM_TEMP_NUM 1 //BIT13; 0：单个温度检测点 1：两个温度检测点 #define _EPCM_TEMP_NUM 0 //BIT13; 0：单个温度检测点 1：两个温度检测点
// <o> LED显示个数 // <o> LED显示个数
#define _EPCM_LED_NUM 0 //BIT11~12; 未调用 #define _EPCM_LED_NUM 0 //BIT11~12; 未调用
// <o> 电芯串数 // <o> 电芯串数
#define _EPCM_CELL_NUM 4 //BIT8~10; 电芯串数，6~10串 #define _EPCM_CELL_NUM 4 //BIT8~10; 电芯串数，6~10串
// <q> 外挂EEPROM备份 // <q> 外挂EEPROM备份
#define _EPCM_EEPROM_EN 0 //BIT7; 0：不使能外挂EE备份功能; 1：使能外挂EE备份功能 #define _EPCM_EEPROM_EN 0 //BIT7; 0：不使能外挂EE备份功能; 1：使能外挂EE备份功能
// <q> 放电过流MOS控制 // <q> 放电过流MOS控制
#define _EPCM_OCPM 0 //BIT6; 未调用（0：放电过流关闭放电mos 1：放电过流关闭充放电mos） #define _EPCM_OCPM 0 //BIT6; 未调用（0：放电过流关闭放电mos 1：放电过流关闭充放电mos）
// <q> 断线检测 // <q> 断线检测
#define _EPCM_CTO_EN 1 //BIT5; 0：不使能断线保护功能; 1：使能断线保护功能 #define _EPCM_CTO_EN 1 //BIT5; 0：不使能断线保护功能; 1：使能断线保护功能
// <q> 二级保护 // <q> 二级保护
#define _EPCM_PF_EN 1 //BIT4; 0：不使能二级保护功能; 1：使能二级保护功能 #define _EPCM_PF_EN 1 //BIT4; 0：不使能二级保护功能; 1：使能二级保护功能
// <q> 均衡 // <q> 均衡
#define _EPCM_BAL_EN 0 //BIT3; 0：不使能均衡功能； 1：使能均衡功能 #define _EPCM_BAL_EN 1 //BIT3; 0：不使能均衡功能； 1：使能均衡功能
// <q> 过流自恢复 // <q> 过流自恢复
#define _EPCM_OCRC_EN 0 //BIT2; 0:不使能过流自恢复功能； 1：使能过流自恢复功能 #define _EPCM_OCRC_EN 1 //BIT2; 0:不使能过流自恢复功能； 1：使能过流自恢复功能
// <q> 硬件过压保护 // <q> 硬件过压保护
#define _EPCM_OV_EN 1 //BIT1; 0:不使能硬件过压功能； 1：使能硬件过压功能 #define _EPCM_OV_EN 1 //BIT1; 0:不使能硬件过压功能； 1：使能硬件过压功能
// <q> 硬件短路保护 // <q> 硬件短路保护

18
output/AFE.lst
View File

@ -1,4 +1,4 @@
C51 COMPILER V9.01 AFE 02/08/2025 15:18:20 PAGE 1 C51 COMPILER V9.01 AFE 02/11/2025 15:43:03 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE AFE C51 COMPILER V9.01, COMPILATION OF MODULE AFE
@ -62,7 +62,7 @@ line level source
50 3 ucAfeI2CErrDelayCnt = TIME_1S_5S; 50 3 ucAfeI2CErrDelayCnt = TIME_1S_5S;
51 3 } 51 3 }
52 2 } 52 2 }
C51 COMPILER V9.01 AFE 02/08/2025 15:18:20 PAGE 2 C51 COMPILER V9.01 AFE 02/11/2025 15:43:03 PAGE 2
53 1 else 53 1 else
54 1 { 54 1 {
@ -126,7 +126,7 @@ line level source
112 2 } 112 2 }
113 1 bAfeI2CRWErrFlg = !Result; //标记通讯是否正常 113 1 bAfeI2CRWErrFlg = !Result; //标记通讯是否正常
114 1 114 1
C51 COMPILER V9.01 AFE 02/08/2025 15:18:20 PAGE 3 C51 COMPILER V9.01 AFE 02/11/2025 15:43:03 PAGE 3
115 1 return Result; 115 1 return Result;
116 1 } 116 1 }
@ -190,7 +190,7 @@ line level source
174 3 AFEWriteReg(AFE_SCONF1, 1, &REG.AFESCONF1); 174 3 AFEWriteReg(AFE_SCONF1, 1, &REG.AFESCONF1);
175 3 } 175 3 }
176 2 } 176 2 }
C51 COMPILER V9.01 AFE 02/08/2025 15:18:20 PAGE 4 C51 COMPILER V9.01 AFE 02/11/2025 15:43:03 PAGE 4
177 1 } 177 1 }
178 178
@ -254,7 +254,7 @@ line level source
233 1 { 233 1 {
234 2 if( AFEWriteReg(AFE_INT_EN, 11, &REG.AFEINTEN)) 234 2 if( AFEWriteReg(AFE_INT_EN, 11, &REG.AFEINTEN))
235 2 { 235 2 {
C51 COMPILER V9.01 AFE 02/08/2025 15:18:20 PAGE 5 C51 COMPILER V9.01 AFE 02/11/2025 15:43:03 PAGE 5
236 3 for(i=3; i<=11; i=i+2) 236 3 for(i=3; i<=11; i=i+2)
237 3 { 237 3 {
@ -318,7 +318,7 @@ line level source
295 2 295 2
296 2 if((REG.AFEFLAG2&0x04) != 0) //判断FLAG2的bit2是否为1，如为1则表示AFE发生过LVR，需<EFBC8C> 296 2 if((REG.AFEFLAG2&0x04) != 0) //判断FLAG2的bit2是否为1，如为1则表示AFE发生过LVR，需<EFBC8C>
-<2D>匦鲁跏蓟疉FE寄存器 -<2D>匦鲁跏蓟疉FE寄存器
C51 COMPILER V9.01 AFE 02/08/2025 15:18:20 PAGE 6 C51 COMPILER V9.01 AFE 02/11/2025 15:43:03 PAGE 6
297 2 { 297 2 {
298 3 AFEInit(); 298 3 AFEInit();
@ -382,7 +382,7 @@ line level source
356 void AFEEnterPD(void) 356 void AFEEnterPD(void)
357 { 357 {
358 1 REG.AFESCONF10 = 0x33; 358 1 REG.AFESCONF10 = 0x33;
C51 COMPILER V9.01 AFE 02/08/2025 15:18:20 PAGE 7 C51 COMPILER V9.01 AFE 02/11/2025 15:43:03 PAGE 7
359 1 if(AFEWriteReg(AFE_SCONF10, 1, &REG.AFESCONF10)) 359 1 if(AFEWriteReg(AFE_SCONF10, 1, &REG.AFESCONF10))
360 1 { 360 1 {
@ -446,7 +446,7 @@ line level source
418 * 参 数: BalChTemp：平衡对应的CELL，如果全部为0，则关闭平衡 418 * 参 数: BalChTemp：平衡对应的CELL，如果全部为0，则关闭平衡
419 * 返回值: 无 419 * 返回值: 无
420 * 描 述: 开启和关闭平衡 420 * 描 述: 开启和关闭平衡
C51 COMPILER V9.01 AFE 02/08/2025 15:18:20 PAGE 8 C51 COMPILER V9.01 AFE 02/11/2025 15:43:03 PAGE 8
421 *************************************************************************************************/ 421 *************************************************************************************************/
422 void AfeBalCtl(U16 BalChTemp) 422 void AfeBalCtl(U16 BalChTemp)
@ -510,7 +510,7 @@ line level source
480 { 480 {
481 1 REG.AFESCONF3 &= ~0xe0; 481 1 REG.AFESCONF3 &= ~0xe0;
482 1 AFEWriteReg(AFE_SCONF3, 1, &REG.AFESCONF3); 482 1 AFEWriteReg(AFE_SCONF3, 1, &REG.AFESCONF3);
C51 COMPILER V9.01 AFE 02/08/2025 15:18:20 PAGE 9 C51 COMPILER V9.01 AFE 02/11/2025 15:43:03 PAGE 9
483 1 } 483 1 }
484 484

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output/AFE.obj
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10
output/Balance.lst
View File

@ -1,4 +1,4 @@
C51 COMPILER V9.01 BALANCE 02/08/2025 15:18:20 PAGE 1 C51 COMPILER V9.01 BALANCE 02/11/2025 15:43:03 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE BALANCE C51 COMPILER V9.01, COMPILATION OF MODULE BALANCE
@ -62,7 +62,7 @@ line level source
47 4 } 47 4 }
48 3 else 48 3 else
49 3 { 49 3 {
C51 COMPILER V9.01 BALANCE 02/08/2025 15:18:20 PAGE 2 C51 COMPILER V9.01 BALANCE 02/11/2025 15:43:03 PAGE 2
50 4 if(((uiCellVmax>E2uiBalanceVol) && (uiCellVmax-uiCellVmin)>=E2uiBalanceVolDiff) && (Info.slCurr>=E2 50 4 if(((uiCellVmax>E2uiBalanceVol) && (uiCellVmax-uiCellVmin)>=E2uiBalanceVolDiff) && (Info.slCurr>=E2
-siBalCurrent)) -siBalCurrent))
@ -126,7 +126,7 @@ line level source
107 5 bCTOValidFlg = 0; 107 5 bCTOValidFlg = 0;
108 5 ucCtoCnt = 0; 108 5 ucCtoCnt = 0;
109 5 } 109 5 }
C51 COMPILER V9.01 BALANCE 02/08/2025 15:18:20 PAGE 3 C51 COMPILER V9.01 BALANCE 02/11/2025 15:43:03 PAGE 3
110 4 } 110 4 }
111 3 } 111 3 }
@ -190,7 +190,7 @@ line level source
168 3 AfeBalCtl(BalChTemp); //¿ªÆôƽºâ 168 3 AfeBalCtl(BalChTemp); //¿ªÆôƽºâ
169 3 ucBalanceStep = BALANCE_START; 169 3 ucBalanceStep = BALANCE_START;
170 3 bBalancingFlg = 1; 170 3 bBalancingFlg = 1;
C51 COMPILER V9.01 BALANCE 02/08/2025 15:18:20 PAGE 4 C51 COMPILER V9.01 BALANCE 02/11/2025 15:43:03 PAGE 4
171 3 } 171 3 }
172 2 break; 172 2 break;
@ -254,7 +254,7 @@ line level source
230 4 uiBalanceChannel = 0x03ff; 230 4 uiBalanceChannel = 0x03ff;
231 4 } 231 4 }
232 3 } 232 3 }
C51 COMPILER V9.01 BALANCE 02/08/2025 15:18:20 PAGE 5 C51 COMPILER V9.01 BALANCE 02/11/2025 15:43:03 PAGE 5
233 2 } 233 2 }
234 1 } 234 1 }

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output/Balance.obj
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2
output/BootApp.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 BOOTAPP 02/08/2025 15:18:21 PAGE 1 C51 COMPILER V9.01 BOOTAPP 02/11/2025 15:43:04 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE BOOTAPP C51 COMPILER V9.01, COMPILATION OF MODULE BOOTAPP

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output/BootApp.obj
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10
output/BootIAP.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 BOOTIAP 02/08/2025 15:18:21 PAGE 1 C51 COMPILER V9.01 BOOTIAP 02/11/2025 15:43:04 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE BOOTIAP C51 COMPILER V9.01, COMPILATION OF MODULE BOOTIAP
@ -62,7 +62,7 @@ line level source
50 0x25,0xF5,0x24,0xF5,0x23,0xE4,0xF5,0x0F,0x30,0x01,0x5E,0x25,0x26,0xF5,0x0E,0xE5, //02D0 50 0x25,0xF5,0x24,0xF5,0x23,0xE4,0xF5,0x0F,0x30,0x01,0x5E,0x25,0x26,0xF5,0x0E,0xE5, //02D0
51 0x25,0x34,0x10,0xF5,0x0D,0xE4,0x35,0x24,0xF5,0x0C,0xE4,0x35,0x23,0xF5,0x0B,0xE4, //02E0 51 0x25,0x34,0x10,0xF5,0x0D,0xE4,0x35,0x24,0xF5,0x0C,0xE4,0x35,0x23,0xF5,0x0B,0xE4, //02E0
52 0x25,0x2A,0xFF,0xE5,0x29,0x34,0x0C,0xFE,0xE4,0x35,0x28,0xFD,0xE4,0x35,0x27,0xFC, //02F0 52 0x25,0x2A,0xFF,0xE5,0x29,0x34,0x0C,0xFE,0xE4,0x35,0x28,0xFD,0xE4,0x35,0x27,0xFC, //02F0
C51 COMPILER V9.01 BOOTIAP 02/08/2025 15:18:21 PAGE 2 C51 COMPILER V9.01 BOOTIAP 02/11/2025 15:43:04 PAGE 2
53 0xAB,0x0E,0xAA,0x0D,0xA9,0x0C,0xA8,0x0B,0xC3,0x12,0x07,0x18,0x40,0x40,0xE4,0x25, //0300 53 0xAB,0x0E,0xAA,0x0D,0xA9,0x0C,0xA8,0x0B,0xC3,0x12,0x07,0x18,0x40,0x40,0xE4,0x25, //0300
54 0x2A,0xFB,0xE5,0x29,0x34,0x0C,0xFA,0xE4,0x35,0x28,0xF9,0xE4,0x35,0x27,0xF8,0xC3, //0310 54 0x2A,0xFB,0xE5,0x29,0x34,0x0C,0xFA,0xE4,0x35,0x28,0xF9,0xE4,0x35,0x27,0xF8,0xC3, //0310
@ -126,7 +126,7 @@ line level source
112 0x40,0x04,0xEB,0x99,0xFB,0x0F,0xD8,0xE5,0xE4,0xF9,0xFA,0x22,0x78,0x18,0xEF,0x2F, //06B0 112 0x40,0x04,0xEB,0x99,0xFB,0x0F,0xD8,0xE5,0xE4,0xF9,0xFA,0x22,0x78,0x18,0xEF,0x2F, //06B0
113 0xFF,0xEE,0x33,0xFE,0xED,0x33,0xFD,0xEC,0x33,0xFC,0xC9,0x33,0xC9,0x10,0xD7,0x05, //06C0 113 0xFF,0xEE,0x33,0xFE,0xED,0x33,0xFD,0xEC,0x33,0xFC,0xC9,0x33,0xC9,0x10,0xD7,0x05, //06C0
114 0x9B,0xE9,0x9A,0x40,0x07,0xEC,0x9B,0xFC,0xE9,0x9A,0xF9,0x0F,0xD8,0xE0,0xE4,0xC9, //06D0 114 0x9B,0xE9,0x9A,0x40,0x07,0xEC,0x9B,0xFC,0xE9,0x9A,0xF9,0x0F,0xD8,0xE0,0xE4,0xC9, //06D0
C51 COMPILER V9.01 BOOTIAP 02/08/2025 15:18:21 PAGE 3 C51 COMPILER V9.01 BOOTIAP 02/11/2025 15:43:04 PAGE 3
115 0xFA,0xE4,0xCC,0xFB,0x22,0x75,0xF0,0x10,0xEF,0x2F,0xFF,0xEE,0x33,0xFE,0xED,0x33, //06E0 115 0xFA,0xE4,0xCC,0xFB,0x22,0x75,0xF0,0x10,0xEF,0x2F,0xFF,0xEE,0x33,0xFE,0xED,0x33, //06E0
116 0xFD,0xCC,0x33,0xCC,0xC8,0x33,0xC8,0x10,0xD7,0x07,0x9B,0xEC,0x9A,0xE8,0x99,0x40, //06F0 116 0xFD,0xCC,0x33,0xCC,0xC8,0x33,0xC8,0x10,0xD7,0x07,0x9B,0xEC,0x9A,0xE8,0x99,0x40, //06F0
@ -190,7 +190,7 @@ line level source
174 0x25,0x2B,0xF5,0x82,0xE4,0x34,0x02,0xF5,0x83,0xE0,0xF5,0x99,0x22,0xE4,0xF5,0x2B, //0A90 174 0x25,0x2B,0xF5,0x82,0xE4,0x34,0x02,0xF5,0x83,0xE0,0xF5,0x99,0x22,0xE4,0xF5,0x2B, //0A90
175 0x90,0x02,0x02,0xE0,0xFD,0x24,0x08,0xF5,0x82,0xE4,0x34,0x02,0xF5,0x83,0xE0,0xFE, //0AA0 175 0x90,0x02,0x02,0xE0,0xFD,0x24,0x08,0xF5,0x82,0xE4,0x34,0x02,0xF5,0x83,0xE0,0xFE, //0AA0
176 0x74,0x07,0x2D,0xF5,0x82,0xE4,0x34,0x02,0xF5,0x83,0xE0,0x7C,0x00,0x24,0x00,0xFF, //0AB0 176 0x74,0x07,0x2D,0xF5,0x82,0xE4,0x34,0x02,0xF5,0x83,0xE0,0x7C,0x00,0x24,0x00,0xFF, //0AB0
C51 COMPILER V9.01 BOOTIAP 02/08/2025 15:18:21 PAGE 4 C51 COMPILER V9.01 BOOTIAP 02/11/2025 15:43:04 PAGE 4
177 0xEC,0x3E,0xFE,0xEF,0x65,0x32,0x70,0x03,0xEE,0x65,0x31,0x60,0x03,0x43,0x22,0x80, //0AC0 177 0xEC,0x3E,0xFE,0xEF,0x65,0x32,0x70,0x03,0xEE,0x65,0x31,0x60,0x03,0x43,0x22,0x80, //0AC0
178 0xE5,0x22,0x60,0x06,0x90,0x02,0x06,0xF0,0x80,0x38,0x90,0x02,0x05,0xE0,0xFE,0xB4, //0AD0 178 0xE5,0x22,0x60,0x06,0x90,0x02,0x06,0xF0,0x80,0x38,0x90,0x02,0x05,0xE0,0xFE,0xB4, //0AD0
@ -254,7 +254,7 @@ line level source
236 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, //0E70 236 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, //0E70
237 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, //0E80 237 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, //0E80
238 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, //0E90 238 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, //0E90
C51 COMPILER V9.01 BOOTIAP 02/08/2025 15:18:21 PAGE 5 C51 COMPILER V9.01 BOOTIAP 02/11/2025 15:43:04 PAGE 5
239 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, //0EA0 239 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, //0EA0
240 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, //0EB0 240 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, //0EB0

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output/BootIAP.obj
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output/BootLoad
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56
output/BootLoad.m51
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@ -1,10 +1,10 @@
BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 1 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 1
BL51 BANKED LINKER/LOCATER V6.22, INVOKED BY: BL51 BANKED LINKER/LOCATER V6.22, INVOKED BY:
C:\KEIL_V5\C51\BIN\BL51.EXE .\output\Main.obj, .\output\IapIsp.obj, .\output\Flash.obj, .\output\STARTUP.obj TO .\output D:\TOOL\KEIL\C51\BIN\BL51.EXE .\output\Main.obj, .\output\IapIsp.obj, .\output\Flash.obj, .\output\STARTUP.obj TO .\outp
>> \BootLoad PRINT (.\output\BootLoad.m51) RAMSIZE (256) DISABLEWARNING (16) CODE (0X0000-0X0FFF, ?PR?BOOTIAPISP?IAPISP >> ut\BootLoad PRINT (.\output\BootLoad.m51) RAMSIZE (256) DISABLEWARNING (16) CODE (0X0000-0X0FFF, ?PR?BOOTIAPISP?IAPIS
>> (0XA6)) >> P (0XA6))
MEMORY MODEL: SMALL MEMORY MODEL: SMALL
@ -15,12 +15,12 @@ INPUT MODULES INCLUDED:
.\output\IapIsp.obj (IAPISP) .\output\IapIsp.obj (IAPISP)
.\output\Flash.obj (FLASH) .\output\Flash.obj (FLASH)
.\output\STARTUP.obj (?C_STARTUP) .\output\STARTUP.obj (?C_STARTUP)
C:\KEIL_V5\C51\LIB\C51S.LIB (?C?IMUL) D:\TOOL\KEIL\C51\LIB\C51S.LIB (?C?IMUL)
C:\KEIL_V5\C51\LIB\C51S.LIB (?C?ULDIV) D:\TOOL\KEIL\C51\LIB\C51S.LIB (?C?ULDIV)
C:\KEIL_V5\C51\LIB\C51S.LIB (?C?ULCMP) D:\TOOL\KEIL\C51\LIB\C51S.LIB (?C?ULCMP)
C:\KEIL_V5\C51\LIB\C51S.LIB (?C?ULSHR) D:\TOOL\KEIL\C51\LIB\C51S.LIB (?C?ULSHR)
C:\KEIL_V5\C51\LIB\C51S.LIB (?C?LSHL) D:\TOOL\KEIL\C51\LIB\C51S.LIB (?C?LSHL)
C:\KEIL_V5\C51\LIB\C51S.LIB (?C?LIMUL) D:\TOOL\KEIL\C51\LIB\C51S.LIB (?C?LIMUL)
LINK MAP OF MODULE: .\output\BootLoad (MAIN) LINK MAP OF MODULE: .\output\BootLoad (MAIN)
@ -59,7 +59,7 @@ LINK MAP OF MODULE: .\output\BootLoad (MAIN)
CODE 002BH 0003H ABSOLUTE CODE 002BH 0003H ABSOLUTE
002EH 0005H *** GAP *** 002EH 0005H *** GAP ***
CODE 0033H 0003H ABSOLUTE CODE 0033H 0003H ABSOLUTE
BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 2 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 2
0036H 0005H *** GAP *** 0036H 0005H *** GAP ***
@ -119,7 +119,7 @@ LINK MAP OF MODULE: .\output\BootLoad (MAIN)
OVERLAY MAP OF MODULE: .\output\BootLoad (MAIN) OVERLAY MAP OF MODULE: .\output\BootLoad (MAIN)
BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 3 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 3
@ -179,7 +179,7 @@ SEGMENT BIT_GROUP DATA_GROUP
?PR?IAPRECEIVEDATA?IAPISP ----- ----- 0008H 0008H ?PR?IAPRECEIVEDATA?IAPISP ----- ----- 0008H 0008H
+--> ?PR?IAPWRSECTOR?IAPISP +--> ?PR?IAPWRSECTOR?IAPISP
+--> ?PR?_MCUFLASHERASESECTOR?FLASH +--> ?PR?_MCUFLASHERASESECTOR?FLASH
BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 4 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 4
+--> ?PR?_MCUFLASHBLANKCHECK?FLASH +--> ?PR?_MCUFLASHBLANKCHECK?FLASH
@ -239,7 +239,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN)
D:009EH PUBLIC SFINE D:009EH PUBLIC SFINE
------- PROC INITGPIO ------- PROC INITGPIO
C:0D0DH LINE# 23 C:0D0DH LINE# 23
BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 5 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 5
C:0D0DH LINE# 24 C:0D0DH LINE# 24
@ -299,7 +299,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN)
C:0C4EH LINE# 606 C:0C4EH LINE# 606
C:0C50H LINE# 607 C:0C50H LINE# 607
C:0C53H LINE# 608 C:0C53H LINE# 608
BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 6 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 6
C:0C58H LINE# 609 C:0C58H LINE# 609
@ -359,7 +359,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN)
C:0BDEH PUBLIC IapCmdReset C:0BDEH PUBLIC IapCmdReset
D:0027H PUBLIC ulIapRecDataLen D:0027H PUBLIC ulIapRecDataLen
D:00B1H PUBLIC RSTSTAT D:00B1H PUBLIC RSTSTAT
BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 7 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 7
C:0A1BH PUBLIC UartSendAck C:0A1BH PUBLIC UartSendAck
@ -419,7 +419,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN)
C:0D0AH LINE# 83 C:0D0AH LINE# 83
C:0D0CH LINE# 84 C:0D0CH LINE# 84
C:0D0CH LINE# 85 C:0D0CH LINE# 85
BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 8 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 8
------- ENDPROC IAPHANDSHAKE ------- ENDPROC IAPHANDSHAKE
@ -479,7 +479,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN)
C:059EH LINE# 154 C:059EH LINE# 154
C:05A3H LINE# 155 C:05A3H LINE# 155
C:05A5H LINE# 157 C:05A5H LINE# 157
BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 9 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 9
C:05A5H LINE# 158 C:05A5H LINE# 158
@ -539,7 +539,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN)
C:0965H LINE# 220 C:0965H LINE# 220
C:0967H LINE# 221 C:0967H LINE# 221
C:0969H LINE# 222 C:0969H LINE# 222
BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 10 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 10
C:0969H LINE# 223 C:0969H LINE# 223
@ -599,7 +599,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN)
C:0337H LINE# 287 C:0337H LINE# 287
C:0339H LINE# 289 C:0339H LINE# 289
C:0339H LINE# 290 C:0339H LINE# 290
BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 11 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 11
C:034EH LINE# 291 C:034EH LINE# 291
@ -659,7 +659,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN)
C:0BF3H LINE# 370 C:0BF3H LINE# 370
C:0C00H LINE# 371 C:0C00H LINE# 371
C:0C00H LINE# 372 C:0C00H LINE# 372
BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 12 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 12
C:0C03H LINE# 373 C:0C03H LINE# 373
@ -719,7 +719,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN)
C:00A6H LINE# 444 C:00A6H LINE# 444
C:00A6H LINE# 445 C:00A6H LINE# 445
C:00AFH LINE# 446 C:00AFH LINE# 446
BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 13 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 13
C:00B7H LINE# 447 C:00B7H LINE# 447
@ -779,7 +779,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN)
C:0186H LINE# 515 C:0186H LINE# 515
C:0189H LINE# 516 C:0189H LINE# 516
C:018CH LINE# 517 C:018CH LINE# 517
BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 14 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 14
C:018CH LINE# 518 C:018CH LINE# 518
@ -839,7 +839,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN)
D:00FBH PUBLIC IB_OFFSET D:00FBH PUBLIC IB_OFFSET
D:00B1H PUBLIC RSTSTAT D:00B1H PUBLIC RSTSTAT
D:00A7H PUBLIC FLASHCON D:00A7H PUBLIC FLASHCON
BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 15 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 15
C:0D38H PUBLIC BootUpgradeCode C:0D38H PUBLIC BootUpgradeCode
@ -899,7 +899,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN)
C:0CC5H LINE# 74 C:0CC5H LINE# 74
C:0CCFH LINE# 75 C:0CCFH LINE# 75
C:0CD2H LINE# 77 C:0CD2H LINE# 77
BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 16 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 16
C:0CD4H LINE# 78 C:0CD4H LINE# 78
@ -959,7 +959,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN)
D:0008H SYMBOL i D:0008H SYMBOL i
D:0009H SYMBOL McuCode D:0009H SYMBOL McuCode
D:000AH SYMBOL McuFlashType D:000AH SYMBOL McuFlashType
BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 17 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 17
D:000BH SYMBOL j D:000BH SYMBOL j
@ -1019,7 +1019,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN)
C:0D5DH LINE# 209 C:0D5DH LINE# 209
------- ENDPROC BOOTUPGRADECODE ------- ENDPROC BOOTUPGRADECODE
------- ENDMOD FLASH ------- ENDMOD FLASH
BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 18 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 18
@ -1079,7 +1079,7 @@ SYMBOL TABLE OF MODULE: .\output\BootLoad (MAIN)
------- ENDMOD ?C?IMUL ------- ENDMOD ?C?IMUL
------- MODULE ?C?ULDIV ------- MODULE ?C?ULDIV
BL51 BANKED LINKER/LOCATER V6.22 12/22/2023 12:15:06 PAGE 19 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 11:30:12 PAGE 19
C:0686H PUBLIC ?C?ULDIV C:0686H PUBLIC ?C?ULDIV

0
output/BootLoad.plg Normal file
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18
output/Calculate.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 CALCULATE 02/08/2025 15:18:20 PAGE 1 C51 COMPILER V9.01 CALCULATE 02/11/2025 15:43:03 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE CALCULATE C51 COMPILER V9.01, COMPILATION OF MODULE CALCULATE
@ -62,7 +62,7 @@ line level source
49 2 if(Tempcalcu > NTC103AT[i]) 49 2 if(Tempcalcu > NTC103AT[i])
50 2 { 50 2 {
51 3 for(i=ucTempeMiddle-1; i>=0; i--) 51 3 for(i=ucTempeMiddle-1; i>=0; i--)
C51 COMPILER V9.01 CALCULATE 02/08/2025 15:18:20 PAGE 2 C51 COMPILER V9.01 CALCULATE 02/11/2025 15:43:03 PAGE 2
52 3 { 52 3 {
53 4 if(Tempcalcu <= NTC103AT[i]) //NTC103AT[i+1]<resis<NTC103AT[i] 53 4 if(Tempcalcu <= NTC103AT[i]) //NTC103AT[i+1]<resis<NTC103AT[i]
@ -126,7 +126,7 @@ line level source
111 2 } 111 2 }
112 1 if(!AFEReadReg(AFE_TS2H, 2, (U8 xdata *)&AFE.uiTS[1])) 112 1 if(!AFEReadReg(AFE_TS2H, 2, (U8 xdata *)&AFE.uiTS[1]))
113 1 { 113 1 {
C51 COMPILER V9.01 CALCULATE 02/08/2025 15:18:20 PAGE 3 C51 COMPILER V9.01 CALCULATE 02/11/2025 15:43:03 PAGE 3
114 2 Result = 0; 114 2 Result = 0;
115 2 } 115 2 }
@ -190,7 +190,7 @@ line level source
IrqUart2Dis(); IrqUart2Dis();
#endif #endif
175 2 Info.uiICTempe[0] = TempeData; 175 2 Info.uiICTempe[0] = TempeData;
C51 COMPILER V9.01 CALCULATE 02/08/2025 15:18:20 PAGE 4 C51 COMPILER V9.01 CALCULATE 02/11/2025 15:43:03 PAGE 4
176 2 176 2
177 2 #if (UART0_DEFINE != 0) 177 2 #if (UART0_DEFINE != 0)
@ -254,7 +254,7 @@ line level source
235 3 235 3
236 3 if(TempeData < uiTempeMin) 236 3 if(TempeData < uiTempeMin)
237 3 { 237 3 {
C51 COMPILER V9.01 CALCULATE 02/08/2025 15:18:20 PAGE 5 C51 COMPILER V9.01 CALCULATE 02/11/2025 15:43:03 PAGE 5
238 4 uiTempeMin = TempeData; 238 4 uiTempeMin = TempeData;
239 4 } 239 4 }
@ -318,7 +318,7 @@ line level source
IrqUart2En(); //初始化UART2中断使能，根据具体使用UART模块来进行选择 IrqUart2En(); //初始化UART2中断使能，根据具体使用UART模块来进行选择
#endif #endif
299 4 TempPackVol += TempCellVol; 299 4 TempPackVol += TempCellVol;
C51 COMPILER V9.01 CALCULATE 02/08/2025 15:18:20 PAGE 6 C51 COMPILER V9.01 CALCULATE 02/11/2025 15:43:03 PAGE 6
300 4 } 300 4 }
301 3 } 301 3 }
@ -382,7 +382,7 @@ line level source
359 3 siCadcTempOffset = siCurTempOffset[1][i]; 359 3 siCadcTempOffset = siCurTempOffset[1][i];
360 3 break; 360 3 break;
361 3 } 361 3 }
C51 COMPILER V9.01 CALCULATE 02/08/2025 15:18:20 PAGE 7 C51 COMPILER V9.01 CALCULATE 02/11/2025 15:43:03 PAGE 7
362 2 } 362 2 }
363 1 return siCadcTempOffset; 363 1 return siCadcTempOffset;
@ -446,7 +446,7 @@ line level source
IrqUart2En(); //初始化UART2中断使能，根据具体使用UART模块来进行选择 IrqUart2En(); //初始化UART2中断使能，根据具体使用UART模块来进行选择
#endif #endif
423 3 } 423 3 }
C51 COMPILER V9.01 CALCULATE 02/08/2025 15:18:20 PAGE 8 C51 COMPILER V9.01 CALCULATE 02/11/2025 15:43:03 PAGE 8
424 2 } 424 2 }
425 1 else if(slCadcCurAverage > E2siDfilterCur) 425 1 else if(slCadcCurAverage > E2siDfilterCur)
@ -510,7 +510,7 @@ line level source
483 *************************************************************************************************/ 483 *************************************************************************************************/
484 void AFEInfoProcess(void) 484 void AFEInfoProcess(void)
485 { 485 {
C51 COMPILER V9.01 CALCULATE 02/08/2025 15:18:20 PAGE 9 C51 COMPILER V9.01 CALCULATE 02/11/2025 15:43:03 PAGE 9
486 1 AFERdFlg(); 486 1 AFERdFlg();
487 1 487 1

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output/Calibrate.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 CALIBRATE 02/08/2025 15:18:20 PAGE 1 C51 COMPILER V9.01 CALIBRATE 02/11/2025 15:43:03 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE CALIBRATE C51 COMPILER V9.01, COMPILATION OF MODULE CALIBRATE
@ -62,7 +62,7 @@ line level source
50 1 TempGain = (S32)CALICUR*(AFE.siCurr-E2siCadcOffset)/slExtCur; 50 1 TempGain = (S32)CALICUR*(AFE.siCurr-E2siCadcOffset)/slExtCur;
51 1 if(TempGain != 0) 51 1 if(TempGain != 0)
52 1 { 52 1 {
C51 COMPILER V9.01 CALIBRATE 02/08/2025 15:18:20 PAGE 2 C51 COMPILER V9.01 CALIBRATE 02/11/2025 15:43:03 PAGE 2
53 2 E2siCadcGain = TempGain; 53 2 E2siCadcGain = TempGain;
54 2 } 54 2 }
@ -126,7 +126,7 @@ line level source
112 1 RTC.Month = ucExtRTC[4]; 112 1 RTC.Month = ucExtRTC[4];
113 1 RTC.Year = ucExtRTC[5]; 113 1 RTC.Year = ucExtRTC[5];
114 1 RTC.Week = ucExtRTC[6]; 114 1 RTC.Week = ucExtRTC[6];
C51 COMPILER V9.01 CALIBRATE 02/08/2025 15:18:20 PAGE 3 C51 COMPILER V9.01 CALIBRATE 02/11/2025 15:43:03 PAGE 3
115 1 115 1
116 1 RTCModifyTime(&RTC); 116 1 RTCModifyTime(&RTC);
@ -190,7 +190,7 @@ line level source
174 174
175 175
C51 COMPILER V9.01 CALIBRATE 02/08/2025 15:18:20 PAGE 4 C51 COMPILER V9.01 CALIBRATE 02/11/2025 15:43:03 PAGE 4
MODULE INFORMATION: STATIC OVERLAYABLE MODULE INFORMATION: STATIC OVERLAYABLE

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output/ChargerLoad.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 CHARGERLOAD 02/08/2025 15:18:20 PAGE 1 C51 COMPILER V9.01 CHARGERLOAD 02/11/2025 15:43:04 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE CHARGERLOAD C51 COMPILER V9.01, COMPILATION OF MODULE CHARGERLOAD
@ -62,7 +62,7 @@ line level source
50 4 bOCD2 = 0; 50 4 bOCD2 = 0;
51 4 if(bAFE_SC) 51 4 if(bAFE_SC)
52 4 { 52 4 {
C51 COMPILER V9.01 CHARGERLOAD 02/08/2025 15:18:20 PAGE 2 C51 COMPILER V9.01 CHARGERLOAD 02/11/2025 15:43:04 PAGE 2
53 5 bAFE_SC = 0; 53 5 bAFE_SC = 0;
54 5 AFEClrFlg(); //헌뇜똬쨌괏빱깃羚 54 5 AFEClrFlg(); //헌뇜똬쨌괏빱깃羚

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output/DataFlash.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 1 C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE DATAFLASH C51 COMPILER V9.01, COMPILATION OF MODULE DATAFLASH
@ -27,7 +27,7 @@ line level source
17 // <q> 充电器锁定 17 // <q> 充电器锁定
18 #define _EPCM_CHARGER_LOCK 0 //BIT14; 0：不支持充电器锁定; 1：支持充电器锁定 18 #define _EPCM_CHARGER_LOCK 0 //BIT14; 0：不支持充电器锁定; 1：支持充电器锁定
19 // <q> 温度检测点个数 19 // <q> 温度检测点个数
20 #define _EPCM_TEMP_NUM 1 //BIT13; 0：单个温度检测点 1：两个温度检测点 20 #define _EPCM_TEMP_NUM 0 //BIT13; 0：单个温度检测点 1：两个温度检测点
21 // <o> LED显示个数 21 // <o> LED显示个数
22 #define _EPCM_LED_NUM 0 //BIT11~12; 未调用 22 #define _EPCM_LED_NUM 0 //BIT11~12; 未调用
23 // <o> 电芯串数 23 // <o> 电芯串数
@ -42,9 +42,9 @@ line level source
31 // <q> 二级保护 31 // <q> 二级保护
32 #define _EPCM_PF_EN 1 //BIT4; 0：不使能二级保护功能; 1：使能二级保护功能 32 #define _EPCM_PF_EN 1 //BIT4; 0：不使能二级保护功能; 1：使能二级保护功能
33 // <q> 均衡 33 // <q> 均衡
34 #define _EPCM_BAL_EN 0 //BIT3; 0：不使能均衡功能； 1：使能均衡功能 34 #define _EPCM_BAL_EN 1 //BIT3; 0：不使能均衡功能； 1：使能均衡功能
35 // <q> 过流自恢复 35 // <q> 过流自恢复
36 #define _EPCM_OCRC_EN 0 //BIT2; 0:不使能过流自恢复功能； 1：使能过流自恢复功能 36 #define _EPCM_OCRC_EN 1 //BIT2; 0:不使能过流自恢复功能； 1：使能过流自恢复功能
37 // <q> 硬件过压保护 37 // <q> 硬件过压保护
38 #define _EPCM_OV_EN 1 //BIT1; 0:不使能硬件过压功能； 1：使能硬件过压功能 38 #define _EPCM_OV_EN 1 //BIT1; 0:不使能硬件过压功能； 1：使能硬件过压功能
39 // <q> 硬件短路保护 39 // <q> 硬件短路保护
@ -62,7 +62,7 @@ line level source
50 // <o>10%容量对应电压 50 // <o>10%容量对应电压
51 #define _E2_VOC10 3200 //U16 xdata VOC10 51 #define _E2_VOC10 3200 //U16 xdata VOC10
52 // <o>20%容量对应电压 52 // <o>20%容量对应电压
C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 2 C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 2
53 #define _E2_VOC20 3400 //U16 xdata VOC10 53 #define _E2_VOC20 3400 //U16 xdata VOC10
54 // <o>30%容量对应电压 54 // <o>30%容量对应电压
@ -126,7 +126,7 @@ line level source
112 #define _E2_DeviceName "SH39F003" // U8 xdata DeviceName[12] 112 #define _E2_DeviceName "SH39F003" // U8 xdata DeviceName[12]
113 // <s.4>电芯材料 113 // <s.4>电芯材料
114 #define _E2_DeviceChem "LION" // U8 xdata DeviceChem[12] 114 #define _E2_DeviceChem "LION" // U8 xdata DeviceChem[12]
C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 3 C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 3
115 // <o>电芯化学ID<0x0000-0xffff> 115 // <o>电芯化学ID<0x0000-0xffff>
116 #define _E2_ChemID 0x0000 // U16 xdata ChemID 116 #define _E2_ChemID 0x0000 // U16 xdata ChemID
@ -190,7 +190,7 @@ line level source
174 #define _E2_DSG1PWMRatioL 30 // U8 xdata DSG1PWMRatioL 174 #define _E2_DSG1PWMRatioL 30 // U8 xdata DSG1PWMRatioL
175 // <o>PWM高档占空比(%) 175 // <o>PWM高档占空比(%)
176 #define _E2_DSG1PWMRatioH 70 // U8 xdata DSG1PWMRatioH 176 #define _E2_DSG1PWMRatioH 70 // U8 xdata DSG1PWMRatioH
C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 4 C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 4
177 #define _E2_ucRamCheckFlg5 _RAM_CHECK_DATA // U8 xdata E2ucRamCheckFlg5 177 #define _E2_ucRamCheckFlg5 _RAM_CHECK_DATA // U8 xdata E2ucRamCheckFlg5
178 // </h> 178 // </h>
@ -254,7 +254,7 @@ line level source
236 // <h>AFE参数(SubClassID=0x0A length=4) 236 // <h>AFE参数(SubClassID=0x0A length=4)
237 // <o>保护配置 237 // <o>保护配置
238 #define _E2_AFEProtectConfig 0x74 // U8 xdata AFEProtectConfig 238 #define _E2_AFEProtectConfig 0x74 // U8 xdata AFEProtectConfig
C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 5 C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 5
239 // <o>硬件过压保护阈值 239 // <o>硬件过压保护阈值
240 #define _E2_AFEOVvol 4400 // U16 xdata AFEOVvol 240 #define _E2_AFEOVvol 4400 // U16 xdata AFEOVvol
@ -318,7 +318,7 @@ line level source
286 unsigned char E2ucChgBKDelay; 286 unsigned char E2ucChgBKDelay;
287 unsigned int E2siChgBKCur; 287 unsigned int E2siChgBKCur;
288 unsigned char E2ucRTCBKDelay; 288 unsigned char E2ucRTCBKDelay;
C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 6 C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 6
289 unsigned char E2ucRamCheckFlg0; 289 unsigned char E2ucRamCheckFlg0;
290 290
@ -382,7 +382,7 @@ line level source
348 unsigned int TempOTDR; 348 unsigned int TempOTDR;
349 unsigned int TempUTD; 349 unsigned int TempUTD;
350 unsigned int TempUTDR; 350 unsigned int TempUTDR;
C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 7 C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 7
351 unsigned char E2ucRamCheckFlg7; 351 unsigned char E2ucRamCheckFlg7;
352 352
@ -446,7 +446,7 @@ line level source
408 _E2_VOC30, //U16 xdata VOC30 408 _E2_VOC30, //U16 xdata VOC30
409 _E2_VOC40, //U16 xdata VOC40 409 _E2_VOC40, //U16 xdata VOC40
410 _E2_VOC50, //U16 xdata VOC50 410 _E2_VOC50, //U16 xdata VOC50
C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 8 C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 8
411 _E2_VOC60, //U16 xdata VOC60 411 _E2_VOC60, //U16 xdata VOC60
412 _E2_VOC70, //U16 xdata VOC70 412 _E2_VOC70, //U16 xdata VOC70
@ -510,7 +510,7 @@ line level source
470 //放电PWM参数区开始 SubClassID=0x05 langth=5 470 //放电PWM参数区开始 SubClassID=0x05 langth=5
471 _E2_DSG1PWMFreq, //U16 xdata DSG1PWMFreq 471 _E2_DSG1PWMFreq, //U16 xdata DSG1PWMFreq
472 _E2_DSG1PWMRatioL, //U8 xdata DSG1PWMRatioL 472 _E2_DSG1PWMRatioL, //U8 xdata DSG1PWMRatioL
C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 9 C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 9
473 _E2_DSG1PWMRatioH, //U8 xdata DSG1PWMRatioH 473 _E2_DSG1PWMRatioH, //U8 xdata DSG1PWMRatioH
474 _E2_ucRamCheckFlg5, //U8 xdata E2ucRamCheckFlg5 474 _E2_ucRamCheckFlg5, //U8 xdata E2ucRamCheckFlg5
@ -574,7 +574,7 @@ line level source
530 /********************************************************************************************************* 530 /*********************************************************************************************************
-********/ -********/
531 //系统信息区开始 SubClassID=0x00 langth=48 531 //系统信息区开始 SubClassID=0x00 langth=48
C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 10 C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 10
532 { 532 {
533 _E2_PACKCONFIGMAP, //U16 xdata E2uiPackConfigMap 533 _E2_PACKCONFIGMAP, //U16 xdata E2uiPackConfigMap
@ -638,7 +638,7 @@ line level source
591 _E2_ucDelayOCD, //U8 xdata E2ucDelayOCD 591 _E2_ucDelayOCD, //U8 xdata E2ucDelayOCD
592 _E2_slOCD2vol, //S32 xdata E2slOCD2vol 592 _E2_slOCD2vol, //S32 xdata E2slOCD2vol
593 _E2_ucDelayOCD2, //U8 xdata E2ucDelayOCD2 593 _E2_ucDelayOCD2, //U8 xdata E2ucDelayOCD2
C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 11 C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 11
594 _E2_ucDelayLoadR, //U8 xdata E2ucDelayLoadR 594 _E2_ucDelayLoadR, //U8 xdata E2ucDelayLoadR
595 _E2_ucRamCheckFlg3, //U8 xdata E2ucRamCheckFlg3 595 _E2_ucRamCheckFlg3, //U8 xdata E2ucRamCheckFlg3
@ -702,7 +702,7 @@ line level source
653 }; 653 };
654 654
655 //*** <<< end of configuration section >>> *** 655 //*** <<< end of configuration section >>> ***
C51 COMPILER V9.01 DATAFLASH 02/08/2025 14:58:02 PAGE 12 C51 COMPILER V9.01 DATAFLASH 02/11/2025 15:43:00 PAGE 12

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output/DataFlash.obj
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output/Eeprom
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4
output/Eeprom.hex
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@ -1,4 +1,4 @@
:1000000033210C800D480DDE0E740ED80F3C0FA06E :100000003F010C800D480DDE0E740ED80F3C0FA082
:1000100010041036106800000FA000000FA00000B0 :1000100010041036106800000FA000000FA00000B0
:100020000BB800000B410000006414010064055A85 :100020000BB800000B410000006414010064055A85
:10003000021501300073696E6F7765616C7468003A :10003000021501300073696E6F7765616C7468003A
@ -30,7 +30,7 @@
:1001D000000000000000000000000000000000001F :1001D000000000000000000000000000000000001F
:1001E000000000000000000000000000000000000F :1001E000000000000000000000000000000000000F
:1001F00000000000000000000000000000005AA500 :1001F00000000000000000000000000000005AA500
:1002000033210C800D480DDE0E740ED80F3C0FA06C :100200003F010C800D480DDE0E740ED80F3C0FA080
:1002100010041036106800000FA000000FA00000AE :1002100010041036106800000FA000000FA00000AE
:100220000BB800000B410000006414010064055A83 :100220000BB800000B410000006414010064055A83
:10023000021501300073696E6F7765616C74680038 :10023000021501300073696E6F7765616C74680038

2
output/Eeprom.m51
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@ -1,4 +1,4 @@
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 14:58:03 PAGE 1 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:01 PAGE 1
BL51 BANKED LINKER/LOCATER V6.22, INVOKED BY: BL51 BANKED LINKER/LOCATER V6.22, INVOKED BY:

20
output/ExtE2PRom.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 EXTE2PROM 02/08/2025 15:18:20 PAGE 1 C51 COMPILER V9.01 EXTE2PROM 02/11/2025 15:43:04 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE EXTE2PROM C51 COMPILER V9.01, COMPILATION OF MODULE EXTE2PROM
@ -62,7 +62,7 @@ line level source
49 3 if(++ucE2PTwiRWErrDelayCnt >= TIME_1S_5S) 49 3 if(++ucE2PTwiRWErrDelayCnt >= TIME_1S_5S)
50 3 { 50 3 {
51 4 bE2PRErr = 1; 51 4 bE2PRErr = 1;
C51 COMPILER V9.01 EXTE2PROM 02/08/2025 15:18:20 PAGE 2 C51 COMPILER V9.01 EXTE2PROM 02/11/2025 15:43:04 PAGE 2
52 4 ucE2PTwiRWErrDelayCnt = TIME_1S_5S; 52 4 ucE2PTwiRWErrDelayCnt = TIME_1S_5S;
53 4 } 53 4 }
@ -126,7 +126,7 @@ line level source
111 1 if(!bE2PRErr) 111 1 if(!bE2PRErr)
112 1 { 112 1 {
113 2 for(i=0; i<5; i++) 113 2 for(i=0; i<5; i++)
C51 COMPILER V9.01 EXTE2PROM 02/08/2025 15:18:20 PAGE 3 C51 COMPILER V9.01 EXTE2PROM 02/11/2025 15:43:04 PAGE 3
114 2 { 114 2 {
115 3 #ifdef TWI_Hardware_Module 115 3 #ifdef TWI_Hardware_Module
@ -190,7 +190,7 @@ line level source
173 1 173 1
174 1 Result = E2PRomRead(E2PROM_BOOT_ADDR, 8, RdBuf); 174 1 Result = E2PRomRead(E2PROM_BOOT_ADDR, 8, RdBuf);
175 1 175 1
C51 COMPILER V9.01 EXTE2PROM 02/08/2025 15:18:20 PAGE 4 C51 COMPILER V9.01 EXTE2PROM 02/11/2025 15:43:04 PAGE 4
176 1 RdBuf[2] = RdBuf[0]+RdBuf[1]; 176 1 RdBuf[2] = RdBuf[0]+RdBuf[1];
177 1 RdBuf[6] = RdBuf[4]+RdBuf[5]; 177 1 RdBuf[6] = RdBuf[4]+RdBuf[5];
@ -254,7 +254,7 @@ line level source
235 1 WrBuf[5] = WrBuf[1]; 235 1 WrBuf[5] = WrBuf[1];
236 1 WrBuf[7] = WrBuf[3]; 236 1 WrBuf[7] = WrBuf[3];
237 1 237 1
C51 COMPILER V9.01 EXTE2PROM 02/08/2025 15:18:20 PAGE 5 C51 COMPILER V9.01 EXTE2PROM 02/11/2025 15:43:04 PAGE 5
238 1 E2PRomWrite(E2PROM_BOOT_ADDR, 8, WrBuf); 238 1 E2PRomWrite(E2PROM_BOOT_ADDR, 8, WrBuf);
239 1 } 239 1 }
@ -318,7 +318,7 @@ line level source
297 2 } 297 2 }
298 1 298 1
299 1 E2PRomBKBoot(); 299 1 E2PRomBKBoot();
C51 COMPILER V9.01 EXTE2PROM 02/08/2025 15:18:20 PAGE 6 C51 COMPILER V9.01 EXTE2PROM 02/11/2025 15:43:04 PAGE 6
300 1 } 300 1 }
301 301
@ -382,7 +382,7 @@ line level source
356 * 函数名: UartRdRTC 356 * 函数名: UartRdRTC
357 * 参 数: 无 357 * 参 数: 无
358 * 返回值: 无 358 * 返回值: 无
C51 COMPILER V9.01 EXTE2PROM 02/08/2025 15:18:20 PAGE 7 C51 COMPILER V9.01 EXTE2PROM 02/11/2025 15:43:04 PAGE 7
359 * 描 述: 读取RTC时间：秒、分、时、日、月、年，并返回给UART 359 * 描 述: 读取RTC时间：秒、分、时、日、月、年，并返回给UART
360 *************************************************************************************************/ 360 *************************************************************************************************/
@ -446,7 +446,7 @@ line level source
418 2 { 418 2 {
419 3 bE2PErase = 0; 419 3 bE2PErase = 0;
420 3 E2PRomErase(); 420 3 E2PRomErase();
C51 COMPILER V9.01 EXTE2PROM 02/08/2025 15:18:20 PAGE 8 C51 COMPILER V9.01 EXTE2PROM 02/11/2025 15:43:04 PAGE 8
421 3 } 421 3 }
422 2 422 2
@ -510,7 +510,7 @@ line level source
480 3 } 480 3 }
481 2 481 2
482 2 if(bE2PBKDsgEnd) 482 2 if(bE2PBKDsgEnd)
C51 COMPILER V9.01 EXTE2PROM 02/08/2025 15:18:20 PAGE 9 C51 COMPILER V9.01 EXTE2PROM 02/11/2025 15:43:04 PAGE 9
483 2 { 483 2 {
484 3 bE2PBKDsgEnd = 0; 484 3 bE2PBKDsgEnd = 0;
@ -574,7 +574,7 @@ line level source
542 3 { 542 3 {
543 4 RTCReadTime(&RTC); 543 4 RTCReadTime(&RTC);
544 4 MemoryCopy((U8 xdata *)&RTC, ucRTCBuf, 7); 544 4 MemoryCopy((U8 xdata *)&RTC, ucRTCBuf, 7);
C51 COMPILER V9.01 EXTE2PROM 02/08/2025 15:18:20 PAGE 10 C51 COMPILER V9.01 EXTE2PROM 02/11/2025 15:43:04 PAGE 10
545 4 } 545 4 }
546 3 546 3

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output/Flash.lst
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@ -1,10 +1,10 @@
C51 COMPILER V9.01 FLASH 12/22/2023 12:15:06 PAGE 1 C51 COMPILER V9.01 FLASH 02/11/2025 11:30:12 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE FLASH C51 COMPILER V9.01, COMPILATION OF MODULE FLASH
OBJECT MODULE PLACED IN .\output\Flash.obj OBJECT MODULE PLACED IN .\output\Flash.obj
COMPILER INVOKED BY: C:\Keil_v5\C51\BIN\C51.EXE code_bootloader\Flash.c OPTIMIZE(8,SPEED) BROWSE INCDIR(.\header_bootloa COMPILER INVOKED BY: D:\Tool\Keil\C51\BIN\C51.EXE code_bootloader\Flash.c BROWSE INCDIR(.\header_bootloader) DEBUG OBJEC
-der) DEBUG OBJECTEXTEND PRINT(.\output\Flash.lst) OBJECT(.\output\Flash.obj) -TEXTEND PRINT(.\output\Flash.lst) OBJECT(.\output\Flash.obj)
line level source line level source
@ -62,7 +62,7 @@ line level source
52 1 } 52 1 }
53 53
54 54
C51 COMPILER V9.01 FLASH 12/22/2023 12:15:06 PAGE 2 C51 COMPILER V9.01 FLASH 02/11/2025 11:30:12 PAGE 2
55 /************************************************************************************************* 55 /*************************************************************************************************
56 * º¯ÊýÃû: McuFlashBlankCheck 56 * º¯ÊýÃû: McuFlashBlankCheck
@ -126,7 +126,7 @@ line level source
114 3 } 114 3 }
115 2 } 115 2 }
116 1 116 1
C51 COMPILER V9.01 FLASH 12/22/2023 12:15:06 PAGE 3 C51 COMPILER V9.01 FLASH 02/11/2025 11:30:12 PAGE 3
117 1 FLASHCON = MCU_TYPE_CODE; 117 1 FLASHCON = MCU_TYPE_CODE;
118 1 } 118 1 }
@ -190,7 +190,7 @@ line level source
174 5 return (BOOT_PGR_WR_ERR); 174 5 return (BOOT_PGR_WR_ERR);
175 5 } 175 5 }
176 4 } 176 4 }
C51 COMPILER V9.01 FLASH 12/22/2023 12:15:06 PAGE 4 C51 COMPILER V9.01 FLASH 02/11/2025 11:30:12 PAGE 4
177 3 } 177 3 }
178 2 else 178 2 else

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output/GasGaugeInter_V4_13.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/08/2025 15:18:21 PAGE 1 C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/11/2025 15:43:04 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE GASGAUGEINTER_V4_13 C51 COMPILER V9.01, COMPILATION OF MODULE GASGAUGEINTER_V4_13
@ -62,7 +62,7 @@ line level source
48 //U32 xdata E2ulCycleThreshold; //循环次数更新阈值，变量类型：U32 xdata（输入） 48 //U32 xdata E2ulCycleThreshold; //循环次数更新阈值，变量类型：U32 xdata（输入）
49 //U32 xdata E2ulCycleThresholdCount;//循环电量计数，变量类型：U32 xdata（输入\输出存入E2） 49 //U32 xdata E2ulCycleThresholdCount;//循环电量计数，变量类型：U32 xdata（输入\输出存入E2）
50 //U16 xdata E2uiCycleCount; //循环次数，变量类型：U16 xdata（输入\输出存入E2） 50 //U16 xdata E2uiCycleCount; //循环次数，变量类型：U16 xdata（输入\输出存入E2）
C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/08/2025 15:18:21 PAGE 2 C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/11/2025 15:43:04 PAGE 2
51 //U16 xdata E2uiLastCCount; //上次更新容量时的循环次数 ，变量类型：U16 xdata（输入\输出存入E2） 51 //U16 xdata E2uiLastCCount; //上次更新容量时的循环次数 ，变量类型：U16 xdata（输入\输出存入E2）
52 //S16 xdata E2siDfilterCur; //零电流窗口，变量类型：S16 xdata（输入） 52 //S16 xdata E2siDfilterCur; //零电流窗口，变量类型：S16 xdata（输入）
@ -126,7 +126,7 @@ line level source
101 U16 data uiCellVminG; //当前电压最低的电芯电压，变量类型：U16 data（输入） 101 U16 data uiCellVminG; //当前电压最低的电芯电压，变量类型：U16 data（输入）
102 //U8 data ucCellNum; //电芯串数，变量类型：U8 data（输入） 102 //U8 data ucCellNum; //电芯串数，变量类型：U8 data（输入）
103 //S32 xdata slCadcCurAverage; //用于库伦积分的平均电流（主控充放电回路），变量类型：S32 xdata（输入） 103 //S32 xdata slCadcCurAverage; //用于库伦积分的平均电流（主控充放电回路），变量类型：S32 xdata（输入）
C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/08/2025 15:18:21 PAGE 3 C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/11/2025 15:43:04 PAGE 3
104 S32 xdata slAdcCur2; //用于库伦积分的平均电流（辅控放电回路，如没有可以恒为0），变量类型：S32 xdata（输<EFBC88> 104 S32 xdata slAdcCur2; //用于库伦积分的平均电流（辅控放电回路，如没有可以恒为0），变量类型：S32 xdata（输<EFBC88>
-耄<> -耄<>
@ -190,7 +190,7 @@ line level source
162 1 162 1
163 1 E2ucFccUpdatePercent = 30; 163 1 E2ucFccUpdatePercent = 30;
164 1 E2uiChgEndTemp = (15*10 + 2731); 164 1 E2uiChgEndTemp = (15*10 + 2731);
C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/08/2025 15:18:21 PAGE 4 C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/11/2025 15:43:04 PAGE 4
165 1 E2uiDsgEndTemp = (15*10 + 2731); 165 1 E2uiDsgEndTemp = (15*10 + 2731);
166 1 166 1
@ -254,7 +254,7 @@ line level source
224 1 EA = eabak; 224 1 EA = eabak;
225 1 225 1
226 1 // if( bOV ) 226 1 // if( bOV )
C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/08/2025 15:18:21 PAGE 5 C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/11/2025 15:43:04 PAGE 5
227 1 // { 227 1 // {
228 1 // E2ucSOC = 100; 228 1 // E2ucSOC = 100;

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output/IapIsp.lst
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@ -1,10 +1,10 @@
C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 1 C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE IAPISP C51 COMPILER V9.01, COMPILATION OF MODULE IAPISP
OBJECT MODULE PLACED IN .\output\IapIsp.obj OBJECT MODULE PLACED IN .\output\IapIsp.obj
COMPILER INVOKED BY: C:\Keil_v5\C51\BIN\C51.EXE code_bootloader\IapIsp.c OPTIMIZE(8,SPEED) BROWSE INCDIR(.\header_bootlo COMPILER INVOKED BY: D:\Tool\Keil\C51\BIN\C51.EXE code_bootloader\IapIsp.c BROWSE INCDIR(.\header_bootloader) DEBUG OBJE
-ader) DEBUG OBJECTEXTEND PRINT(.\output\IapIsp.lst) OBJECT(.\output\IapIsp.obj) -CTEXTEND PRINT(.\output\IapIsp.lst) OBJECT(.\output\IapIsp.obj)
line level source line level source
@ -62,7 +62,7 @@ line level source
52 1 ucUartBuf[7+ucUartBuf[LENGTH]] = (U8)CheckSum; 52 1 ucUartBuf[7+ucUartBuf[LENGTH]] = (U8)CheckSum;
53 1 ucUartBuf[8+ucUartBuf[LENGTH]] = (U8)(CheckSum>>8); 53 1 ucUartBuf[8+ucUartBuf[LENGTH]] = (U8)(CheckSum>>8);
54 1 54 1
C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 2 C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 2
55 1 bUartSndOverFlg = 0; 55 1 bUartSndOverFlg = 0;
56 1 UartTxEn(ucUartBuf[ucUartBufPT]); 56 1 UartTxEn(ucUartBuf[ucUartBufPT]);
@ -126,7 +126,7 @@ line level source
114 2 ucUartBuf[INDEXES] = IAPERROR_SIZE; //如果数据长度不等于IAP和ISP长度，则 114 2 ucUartBuf[INDEXES] = IAPERROR_SIZE; //如果数据长度不等于IAP和ISP长度，则
-默认为长度异常 -默认为长度异常
115 2 } 115 2 }
C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 3 C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 3
116 1 else if((ulIapRecDataLen > ISP_CODE_SIZE) && (bIapIspFlg == ISP_MODE)) 116 1 else if((ulIapRecDataLen > ISP_CODE_SIZE) && (bIapIspFlg == ISP_MODE))
117 1 { 117 1 {
@ -190,7 +190,7 @@ line level source
173 4 if(!McuFlashBlankCheck(McuFlashAddr, McuFlashType)) //擦除结束后，需要查空 173 4 if(!McuFlashBlankCheck(McuFlashAddr, McuFlashType)) //擦除结束后，需要查空
174 4 { 174 4 {
175 5 ucUartBuf[INDEXES] = IAPERROR_ERASE; //Erase失败 175 5 ucUartBuf[INDEXES] = IAPERROR_ERASE; //Erase失败
C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 4 C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 4
176 5 } 176 5 }
177 4 ucMcuFlashWrValid = 0; 177 4 ucMcuFlashWrValid = 0;
@ -254,7 +254,7 @@ line level source
235 *************************************************************************************************/ 235 *************************************************************************************************/
236 void IapReceiveData(void) 236 void IapReceiveData(void)
237 { 237 {
C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 5 C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 5
238 1 U16 i; 238 1 U16 i;
239 1 U8 j; 239 1 U8 j;
@ -318,7 +318,7 @@ line level source
292 5 ucMcuFlashWrValid = 0x55; 292 5 ucMcuFlashWrValid = 0x55;
293 5 McuFlashEraseSector(McuFlashAddr, McuFlashType); 293 5 McuFlashEraseSector(McuFlashAddr, McuFlashType);
294 5 if(McuFlashBlankCheck(McuFlashAddr, McuFlashType)) //擦除结束后，需要查空 294 5 if(McuFlashBlankCheck(McuFlashAddr, McuFlashType)) //擦除结束后，需要查空
C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 6 C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 6
295 5 { 295 5 {
296 6 if(!IapWrSector()) //如果连续写两次错误，则返回给上位机异常 296 6 if(!IapWrSector()) //如果连续写两次错误，则返回给上位机异常
@ -382,7 +382,7 @@ line level source
354 354
355 /************************************************************************************************* 355 /*************************************************************************************************
356 * 函数名: IapCmdReset 356 * 函数名: IapCmdReset
C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 7 C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 7
357 * 参 数: 无 357 * 参 数: 无
358 * 返回值: 无 358 * 返回值: 无
@ -446,7 +446,7 @@ line level source
414 3 } 414 3 }
415 2 else if(ucUartBuf[COMMAND] == IAP_CMD_BEGIN) //开始IAP或ISP，并将CODE区/EEP区全部 415 2 else if(ucUartBuf[COMMAND] == IAP_CMD_BEGIN) //开始IAP或ISP，并将CODE区/EEP区全部
-擦除 -擦除
C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 8 C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 8
416 2 { 416 2 {
417 3 IapBeginAck(); 417 3 IapBeginAck();
@ -510,7 +510,7 @@ line level source
474 5 { 474 5 {
475 6 ucUartBufPT = 0; 475 6 ucUartBufPT = 0;
476 6 } 476 6 }
C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 9 C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 9
477 5 else 477 5 else
478 5 { 478 5 {
@ -574,7 +574,7 @@ line level source
535 4 else 535 4 else
536 4 { 536 4 {
537 5 ucUartBufPT++; 537 5 ucUartBufPT++;
C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 10 C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 10
538 5 UartTxEn(ucUartBuf[ucUartBufPT]); 538 5 UartTxEn(ucUartBuf[ucUartBufPT]);
539 5 } 539 5 }
@ -638,7 +638,7 @@ line level source
uiUartRcvChkSum += ucUartBuf[ucUartBufPT-1]; uiUartRcvChkSum += ucUartBuf[ucUartBufPT-1];
} }
C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 11 C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 11
if(ucUartBufPT == (TARGET+1)) //检查ID if(ucUartBufPT == (TARGET+1)) //检查ID
{ {
@ -702,7 +702,7 @@ line level source
{ {
BootMcuWdtClear(); BootMcuWdtClear();
if(bUartSndOverFlg) //Reset帧回复结束 if(bUartSndOverFlg) //Reset帧回复结束
C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 12 C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 12
{ {
bUartSndOverFlg = 0; bUartSndOverFlg = 0;
@ -766,7 +766,7 @@ line level source
} }
else if(ucUartBufPT == (COMMAND+1)) //检测COMMAND else if(ucUartBufPT == (COMMAND+1)) //检测COMMAND
{ {
C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 13 C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 13
if((ucUartBuf[COMMAND] != IAP_CMD_HANDSHAKE) if((ucUartBuf[COMMAND] != IAP_CMD_HANDSHAKE)
&& (ucUartBuf[COMMAND] != IAP_CMD_BEGIN) && (ucUartBuf[COMMAND] != IAP_CMD_BEGIN)
@ -830,7 +830,7 @@ line level source
#endif #endif
780 2 } 780 2 }
781 1 } 781 1 }
C51 COMPILER V9.01 IAPISP 12/22/2023 12:15:06 PAGE 14 C51 COMPILER V9.01 IAPISP 02/11/2025 11:30:12 PAGE 14
782 782
783 783

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22
output/Initial.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 INITIAL 02/08/2025 15:18:20 PAGE 1 C51 COMPILER V9.01 INITIAL 02/11/2025 15:43:03 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE INITIAL C51 COMPILER V9.01, COMPILATION OF MODULE INITIAL
@ -62,7 +62,7 @@ line level source
50 2 } 50 2 }
51 1 else if(McuFlashCheckFlg(MCUFLASH_BK2_FLG_ADDR)) 51 1 else if(McuFlashCheckFlg(MCUFLASH_BK2_FLG_ADDR))
52 1 { 52 1 {
C51 COMPILER V9.01 INITIAL 02/08/2025 15:18:20 PAGE 2 C51 COMPILER V9.01 INITIAL 02/11/2025 15:43:03 PAGE 2
53 2 McuFlashRead(MCUFLASH_BK2_ADDR, XRAM_MAP_ADDR, 512); 53 2 McuFlashRead(MCUFLASH_BK2_ADDR, XRAM_MAP_ADDR, 512);
54 2 McuFlashWrite(MCUFLASH_BK1_ADDR, XRAM_MAP_ADDR); //更新备份区1 54 2 McuFlashWrite(MCUFLASH_BK1_ADDR, XRAM_MAP_ADDR); //更新备份区1
@ -126,7 +126,7 @@ line level source
111 1 } 111 1 }
112 112
113 113
C51 COMPILER V9.01 INITIAL 02/08/2025 15:18:20 PAGE 3 C51 COMPILER V9.01 INITIAL 02/11/2025 15:43:03 PAGE 3
114 /************************************************************************************************* 114 /*************************************************************************************************
115 * 函数名: InitGPIO 115 * 函数名: InitGPIO
@ -190,7 +190,7 @@ line level source
- IO状态:P2.[7,6,5,4,3,2,1,0]有效 - IO状态:P2.[7,6,5,4,3,2,1,0]有效
156 P2.7CR[1], P2.6CR[0], P2.5CR[1], P2.4CR[1], P2.3CR[1], P2.2CR[0], P2.1CR[1], P2.0CR[1], P2CR = 0xB 156 P2.7CR[1], P2.6CR[0], P2.5CR[1], P2.4CR[1], P2.3CR[1], P2.2CR[0], P2.1CR[1], P2.0CR[1], P2CR = 0xB
-B; IO方向:P2.[7,6,5,4,3,2,1,0]有效,1输出，0输入 -B; IO方向:P2.[7,6,5,4,3,2,1,0]有效,1输出，0输入
C51 COMPILER V9.01 INITIAL 02/08/2025 15:18:20 PAGE 4 C51 COMPILER V9.01 INITIAL 02/11/2025 15:43:03 PAGE 4
157 P2.7PC[0], P2.6PC[1], P2.5PC[0], P2.4PC[0], P2.3PC[0], P2.2PC[1], P2.1PC[1], P2.0PC[1], P2PCR = 0x 157 P2.7PC[0], P2.6PC[1], P2.5PC[0], P2.4PC[0], P2.3PC[0], P2.2PC[1], P2.1PC[1], P2.0PC[1], P2PCR = 0x
-46; 内部上拉:1开启，0关闭 -46; 内部上拉:1开启，0关闭
@ -254,7 +254,7 @@ line level source
211 1 #if (UART0_DEFINE == 6) 211 1 #if (UART0_DEFINE == 6)
P0 |= 0xC0; P0 |= 0xC0;
P0PCR |= 0x40; P0PCR |= 0x40;
C51 COMPILER V9.01 INITIAL 02/08/2025 15:18:20 PAGE 5 C51 COMPILER V9.01 INITIAL 02/11/2025 15:43:03 PAGE 5
#endif #endif
215 1 215 1
@ -318,7 +318,7 @@ line level source
273 1 #if (UART0_DEFINE == 17) 273 1 #if (UART0_DEFINE == 17)
P0 |= 0x80; P0 |= 0x80;
P2 |= 0x20; P2 |= 0x20;
C51 COMPILER V9.01 INITIAL 02/08/2025 15:18:20 PAGE 6 C51 COMPILER V9.01 INITIAL 02/11/2025 15:43:03 PAGE 6
P0PCR |= 0x80; P0PCR |= 0x80;
#endif #endif
@ -382,7 +382,7 @@ line level source
P0 |= 0x02; P0 |= 0x02;
P2 |= 0x20; P2 |= 0x20;
P2PCR |= 0x20; P2PCR |= 0x20;
C51 COMPILER V9.01 INITIAL 02/08/2025 15:18:20 PAGE 7 C51 COMPILER V9.01 INITIAL 02/11/2025 15:43:03 PAGE 7
#endif #endif
339 1 339 1
@ -446,7 +446,7 @@ line level source
397 1 #if (UART1_DEFINE == 9) 397 1 #if (UART1_DEFINE == 9)
P1 |= 0x02; P1 |= 0x02;
P2 |= 0x40; P2 |= 0x40;
C51 COMPILER V9.01 INITIAL 02/08/2025 15:18:20 PAGE 8 C51 COMPILER V9.01 INITIAL 02/11/2025 15:43:03 PAGE 8
P2PCR |= 0x40; P2PCR |= 0x40;
#endif #endif
@ -510,7 +510,7 @@ line level source
#endif #endif
460 1 460 1
461 1 #if (UART1_DEFINE == 20) 461 1 #if (UART1_DEFINE == 20)
C51 COMPILER V9.01 INITIAL 02/08/2025 15:18:20 PAGE 9 C51 COMPILER V9.01 INITIAL 02/11/2025 15:43:03 PAGE 9
P3 |= 0x10; P3 |= 0x10;
P2 |= 0x80; P2 |= 0x80;
@ -574,7 +574,7 @@ line level source
P2 |= 0xC0; P2 |= 0xC0;
P2PCR |= 0x40; P2PCR |= 0x40;
#endif #endif
C51 COMPILER V9.01 INITIAL 02/08/2025 15:18:20 PAGE 10 C51 COMPILER V9.01 INITIAL 02/11/2025 15:43:03 PAGE 10
524 1 524 1
525 1 //UART2相关IO配置，当前demo板此串口做LED灯显示功能，不支持串口通讯，故demo板配置为不使能uart2串口功能 525 1 //UART2相关IO配置，当前demo板此串口做LED灯显示功能，不支持串口通讯，故demo板配置为不使能uart2串口功能
@ -638,7 +638,7 @@ line level source
583 2 { 583 2 {
584 3 bRTCErr = 1; //外置RTC模块出错 584 3 bRTCErr = 1; //外置RTC模块出错
585 3 } 585 3 }
C51 COMPILER V9.01 INITIAL 02/08/2025 15:18:20 PAGE 11 C51 COMPILER V9.01 INITIAL 02/11/2025 15:43:03 PAGE 11
586 2 } 586 2 }
587 1 587 1

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output/Interrupt.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 INTERRUPT 02/08/2025 15:18:20 PAGE 1 C51 COMPILER V9.01 INTERRUPT 02/11/2025 15:43:04 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE INTERRUPT C51 COMPILER V9.01, COMPILATION OF MODULE INTERRUPT
@ -62,7 +62,7 @@ line level source
50 2 IF45 = 0; 50 2 IF45 = 0;
51 2 InterruptINT4App(0x20); 51 2 InterruptINT4App(0x20);
52 2 } 52 2 }
C51 COMPILER V9.01 INTERRUPT 02/08/2025 15:18:20 PAGE 2 C51 COMPILER V9.01 INTERRUPT 02/11/2025 15:43:04 PAGE 2
53 1 if(IF46) 53 1 if(IF46)
54 1 { 54 1 {

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4
output/InterruptApp.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 INTERRUPTAPP 02/08/2025 15:18:20 PAGE 1 C51 COMPILER V9.01 INTERRUPTAPP 02/11/2025 15:43:03 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE INTERRUPTAPP C51 COMPILER V9.01, COMPILATION OF MODULE INTERRUPTAPP
@ -62,7 +62,7 @@ line level source
50 *************************************************************************************************/ 50 *************************************************************************************************/
51 void InterruptTimer3App(void) 51 void InterruptTimer3App(void)
52 { 52 {
C51 COMPILER V9.01 INTERRUPTAPP 02/08/2025 15:18:20 PAGE 2 C51 COMPILER V9.01 INTERRUPTAPP 02/11/2025 15:43:03 PAGE 2
53 1 53 1
54 1 bTimer5msFlg = 1; //5ms标志为预留标志 54 1 bTimer5msFlg = 1; //5ms标志为预留标志

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4
output/KeyApp.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 KEYAPP 02/08/2025 15:18:20 PAGE 1 C51 COMPILER V9.01 KEYAPP 02/11/2025 15:43:03 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE KEYAPP C51 COMPILER V9.01, COMPILATION OF MODULE KEYAPP
@ -62,7 +62,7 @@ line level source
50 1 { 50 1 {
51 2 bSlowDischarge = 0; 51 2 bSlowDischarge = 0;
52 2 bMidDischarge = 0; 52 2 bMidDischarge = 0;
C51 COMPILER V9.01 KEYAPP 02/08/2025 15:18:20 PAGE 2 C51 COMPILER V9.01 KEYAPP 02/11/2025 15:43:03 PAGE 2
53 2 bFastDischarge = 0; 53 2 bFastDischarge = 0;
54 2 } 54 2 }

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output/KeyScan.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 KEYSCAN 02/08/2025 15:18:20 PAGE 1 C51 COMPILER V9.01 KEYSCAN 02/11/2025 15:43:04 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE KEYSCAN C51 COMPILER V9.01, COMPILATION OF MODULE KEYSCAN
@ -62,7 +62,7 @@ line level source
50 2 else if(!KEY_2_IO_RD) 50 2 else if(!KEY_2_IO_RD)
51 2 { 51 2 {
52 3 ucKeyValueBK = KEYVAL_2; //按键按下后，获取新键值 52 3 ucKeyValueBK = KEYVAL_2; //按键按下后，获取新键值
C51 COMPILER V9.01 KEYSCAN 02/08/2025 15:18:20 PAGE 2 C51 COMPILER V9.01 KEYSCAN 02/11/2025 15:43:04 PAGE 2
53 3 } 53 3 }
54 2 #endif 54 2 #endif
@ -126,7 +126,7 @@ line level source
103 4 if(uiKeyValidCnt == KEY_L_TIME) //当按下时间达到长按滤波时间时，认为此按键为长按键 103 4 if(uiKeyValidCnt == KEY_L_TIME) //当按下时间达到长按滤波时间时，认为此按键为长按键
104 4 { 104 4 {
105 5 ucKeyValue = ucKeyOldValue | KEY_STATE_L; 105 5 ucKeyValue = ucKeyOldValue | KEY_STATE_L;
C51 COMPILER V9.01 KEYSCAN 02/08/2025 15:18:20 PAGE 3 C51 COMPILER V9.01 KEYSCAN 02/11/2025 15:43:04 PAGE 3
106 5 bKeyFlg = 1; 106 5 bKeyFlg = 1;
107 5 } 107 5 }

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6
output/Led.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 LED 02/08/2025 15:18:20 PAGE 1 C51 COMPILER V9.01 LED 02/11/2025 15:43:03 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE LED C51 COMPILER V9.01, COMPILATION OF MODULE LED
@ -62,7 +62,7 @@ line level source
51 51
52 52
53 /************************************************************************************************* 53 /*************************************************************************************************
C51 COMPILER V9.01 LED 02/08/2025 15:18:20 PAGE 2 C51 COMPILER V9.01 LED 02/11/2025 15:43:03 PAGE 2
54 * 函数名: LedAutoOff 54 * 函数名: LedAutoOff
55 * 参 数: 无 55 * 参 数: 无
@ -126,7 +126,7 @@ line level source
113 2 if(LedDisNum == 0) 113 2 if(LedDisNum == 0)
114 2 { 114 2 {
115 3 // LEDAllOff(); 115 3 // LEDAllOff();
C51 COMPILER V9.01 LED 02/08/2025 15:18:20 PAGE 3 C51 COMPILER V9.01 LED 02/11/2025 15:43:03 PAGE 3
116 3 } 116 3 }
117 2 if(LedDisNum == 1) 117 2 if(LedDisNum == 1)

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10
output/LowPower.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 LOWPOWER 02/08/2025 15:18:20 PAGE 1 C51 COMPILER V9.01 LOWPOWER 02/11/2025 15:43:03 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE LOWPOWER C51 COMPILER V9.01, COMPILATION OF MODULE LOWPOWER
@ -62,7 +62,7 @@ line level source
50 2 ucSleepTimerCnt = 0; 50 2 ucSleepTimerCnt = 0;
51 2 ucPDTimerCnt = 0; 51 2 ucPDTimerCnt = 0;
52 2 ucUart0TimeoutCnt = 0; 52 2 ucUart0TimeoutCnt = 0;
C51 COMPILER V9.01 LOWPOWER 02/08/2025 15:18:20 PAGE 2 C51 COMPILER V9.01 LOWPOWER 02/11/2025 15:43:03 PAGE 2
53 2 ucUart1TimeoutCnt = 0; 53 2 ucUart1TimeoutCnt = 0;
54 2 ucUart2TimeoutCnt = 0; 54 2 ucUart2TimeoutCnt = 0;
@ -126,7 +126,7 @@ line level source
112 1 #if (UART1_DEFINE != 0) 112 1 #if (UART1_DEFINE != 0)
IrqUart1Dis(); IrqUart1Dis();
#endif #endif
C51 COMPILER V9.01 LOWPOWER 02/08/2025 15:18:20 PAGE 3 C51 COMPILER V9.01 LOWPOWER 02/11/2025 15:43:03 PAGE 3
115 1 #if (UART2_DEFINE != 0) 115 1 #if (UART2_DEFINE != 0)
IrqUart2Dis(); IrqUart2Dis();
@ -190,7 +190,7 @@ line level source
170 6 bSleepFlg = 1; 170 6 bSleepFlg = 1;
171 6 } 171 6 }
172 5 } 172 5 }
C51 COMPILER V9.01 LOWPOWER 02/08/2025 15:18:20 PAGE 4 C51 COMPILER V9.01 LOWPOWER 02/11/2025 15:43:03 PAGE 4
173 4 else 173 4 else
174 4 { 174 4 {
@ -254,7 +254,7 @@ MODULE INFORMATION: STATIC OVERLAYABLE
XDATA SIZE = 3 ---- XDATA SIZE = 3 ----
PDATA SIZE = ---- ---- PDATA SIZE = ---- ----
DATA SIZE = ---- ---- DATA SIZE = ---- ----
C51 COMPILER V9.01 LOWPOWER 02/08/2025 15:18:20 PAGE 5 C51 COMPILER V9.01 LOWPOWER 02/11/2025 15:43:03 PAGE 5
IDATA SIZE = ---- ---- IDATA SIZE = ---- ----
BIT SIZE = 4 ---- BIT SIZE = 4 ----

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@ -1,4 +1,4 @@
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 1 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 1
BL51 BANKED LINKER/LOCATER V6.22, INVOKED BY: BL51 BANKED LINKER/LOCATER V6.22, INVOKED BY:
@ -59,7 +59,7 @@ INPUT MODULES INCLUDED:
D:\TOOL\KEIL\C51\LIB\C51L.LIB (?C?LSUB) D:\TOOL\KEIL\C51\LIB\C51L.LIB (?C?LSUB)
D:\TOOL\KEIL\C51\LIB\C51L.LIB (?C?LMUL) D:\TOOL\KEIL\C51\LIB\C51L.LIB (?C?LMUL)
D:\TOOL\KEIL\C51\LIB\C51L.LIB (?C?ULDIV) D:\TOOL\KEIL\C51\LIB\C51L.LIB (?C?ULDIV)
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 2 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 2
D:\TOOL\KEIL\C51\LIB\C51L.LIB (?C?SLDIV) D:\TOOL\KEIL\C51\LIB\C51L.LIB (?C?SLDIV)
@ -119,7 +119,7 @@ LINK MAP OF MODULE: .\output\MCUCore_Load (MAIN)
IDATA 0030H 000CH UNIT ?ID?GASGAUGEV4_12 IDATA 0030H 000CH UNIT ?ID?GASGAUGEV4_12
003CH 0064H *** GAP *** 003CH 0064H *** GAP ***
IDATA 00A0H 0060H ABSOLUTE IDATA 00A0H 0060H ABSOLUTE
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 3 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 3
@ -179,7 +179,7 @@ LINK MAP OF MODULE: .\output\MCUCore_Load (MAIN)
XDATA 0090H 0002H ABSOLUTE XDATA 0090H 0002H ABSOLUTE
XDATA 0092H 0002H ABSOLUTE XDATA 0092H 0002H ABSOLUTE
XDATA 0094H 0002H ABSOLUTE XDATA 0094H 0002H ABSOLUTE
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 4 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 4
XDATA 0096H 0001H ABSOLUTE XDATA 0096H 0001H ABSOLUTE
@ -239,7 +239,7 @@ LINK MAP OF MODULE: .\output\MCUCore_Load (MAIN)
XDATA 05F5H 0002H UNIT ?XD?MCUFLASH XDATA 05F5H 0002H UNIT ?XD?MCUFLASH
XDATA 05F7H 0002H UNIT ?XD?GASGAUGEWKUP?GASGAUGEV4_12 XDATA 05F7H 0002H UNIT ?XD?GASGAUGEWKUP?GASGAUGEV4_12
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 5 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 5
* * * * * * * C O D E M E M O R Y * * * * * * * * * * * * * * C O D E M E M O R Y * * * * * * *
@ -299,7 +299,7 @@ LINK MAP OF MODULE: .\output\MCUCore_Load (MAIN)
CODE 53E5H 008DH UNIT ?PR?_RTCINITTIME?RTC CODE 53E5H 008DH UNIT ?PR?_RTCINITTIME?RTC
CODE 5472H 008CH UNIT ?PR?_MCUFLASHWRSECTOR?MCUFLASH CODE 5472H 008CH UNIT ?PR?_MCUFLASHWRSECTOR?MCUFLASH
CODE 54FEH 0087H UNIT ?PR?AFEINIT?AFE CODE 54FEH 0087H UNIT ?PR?AFEINIT?AFE
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 6 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 6
CODE 5585H 0086H UNIT ?PR?AFEINITREG?AFE CODE 5585H 0086H UNIT ?PR?AFEINITREG?AFE
@ -359,7 +359,7 @@ LINK MAP OF MODULE: .\output\MCUCore_Load (MAIN)
CODE 6936H 0048H UNIT ?PR?_DELAY1MS?MCULIB CODE 6936H 0048H UNIT ?PR?_DELAY1MS?MCULIB
CODE 697EH 0048H UNIT ?PR?PORPROTECTOV?PORSELFTEST CODE 697EH 0048H UNIT ?PR?PORPROTECTOV?PORSELFTEST
CODE 69C6H 0048H UNIT ?PR?PORPROTECTUV?PORSELFTEST CODE 69C6H 0048H UNIT ?PR?PORPROTECTUV?PORSELFTEST
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 7 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 7
CODE 6A0EH 0045H UNIT ?PR?CALITS1?CALIBRATE CODE 6A0EH 0045H UNIT ?PR?CALITS1?CALIBRATE
@ -419,7 +419,7 @@ LINK MAP OF MODULE: .\output\MCUCore_Load (MAIN)
CODE 7328H 0013H UNIT ?PR?AFELOADCHECKEN?AFE CODE 7328H 0013H UNIT ?PR?AFELOADCHECKEN?AFE
CODE 733BH 0013H UNIT ?PR?AFELOADCHECKDIS?AFE CODE 733BH 0013H UNIT ?PR?AFELOADCHECKDIS?AFE
CODE 734EH 0013H UNIT ?PR?AFEWDTEN?AFE CODE 734EH 0013H UNIT ?PR?AFEWDTEN?AFE
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 8 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 8
CODE 7361H 0013H UNIT ?PR?AFEWDTDIS?AFE CODE 7361H 0013H UNIT ?PR?AFEWDTDIS?AFE
@ -479,7 +479,7 @@ SEGMENT BIT_GROUP DATA_GROUP
?PR?_UART0READINFO?UARTAPP ----- ----- ----- ----- ----- ----- ?PR?_UART0READINFO?UARTAPP ----- ----- ----- ----- ----- -----
+--> ?PR?_CRC8CAL?TWI +--> ?PR?_CRC8CAL?TWI
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 9 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 9
@ -539,7 +539,7 @@ SEGMENT BIT_GROUP DATA_GROUP
+--> ?PR?PROTECTPROCESS?PROTECT +--> ?PR?PROTECTPROCESS?PROTECT
+--> ?PR?PORSELFTEST?PORSELFTEST +--> ?PR?PORSELFTEST?PORSELFTEST
+--> ?PR?LOADCHECK?CHARGERLOAD +--> ?PR?LOADCHECK?CHARGERLOAD
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 10 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 10
+--> ?PR?CHGERCHECK?CHARGERLOAD +--> ?PR?CHGERCHECK?CHARGERLOAD
@ -599,7 +599,7 @@ SEGMENT BIT_GROUP DATA_GROUP
?PR?INITVAR?INITIAL ----- ----- ----- ----- ----- ----- ?PR?INITVAR?INITIAL ----- ----- ----- ----- ----- -----
+--> ?PR?_MEMORYSET?MCULIB +--> ?PR?_MEMORYSET?MCULIB
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 11 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 11
@ -659,7 +659,7 @@ SEGMENT BIT_GROUP DATA_GROUP
+--> ?PR?_RTCMODIFYTIME?RTC +--> ?PR?_RTCMODIFYTIME?RTC
?PR?_RTCREAD?RTC 002AH.5 0000H.1 ----- ----- 02E7H 0005H ?PR?_RTCREAD?RTC 002AH.5 0000H.1 ----- ----- 02E7H 0005H
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 12 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 12
+--> ?PR?_TWIREAD?TWI +--> ?PR?_TWIREAD?TWI
@ -719,7 +719,7 @@ SEGMENT BIT_GROUP DATA_GROUP
+--> ?PR?_AFEWRITEREG?AFE +--> ?PR?_AFEWRITEREG?AFE
?PR?CTOCHECKVOL?BALANCE 002AH.3 0000H.1 ----- ----- ----- ----- ?PR?CTOCHECKVOL?BALANCE 002AH.3 0000H.1 ----- ----- ----- -----
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 13 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 13
@ -779,7 +779,7 @@ SEGMENT BIT_GROUP DATA_GROUP
?PR?CHGERCHECK?CHARGERLOAD ----- ----- ----- ----- ----- ----- ?PR?CHGERCHECK?CHARGERLOAD ----- ----- ----- ----- ----- -----
+--> ?PR?AFECHGERCHECKEN?AFE +--> ?PR?AFECHGERCHECKEN?AFE
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 14 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 14
+--> ?PR?AFERDSTATUS?AFE +--> ?PR?AFERDSTATUS?AFE
@ -839,7 +839,7 @@ SEGMENT BIT_GROUP DATA_GROUP
+--> ?PR?CALITS1?CALIBRATE +--> ?PR?CALITS1?CALIBRATE
+--> ?PR?CALITS2?CALIBRATE +--> ?PR?CALITS2?CALIBRATE
+--> ?PR?CALIRTCTIME?CALIBRATE +--> ?PR?CALIRTCTIME?CALIBRATE
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 15 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 15
@ -899,7 +899,7 @@ SEGMENT BIT_GROUP DATA_GROUP
+--> ?PR?_MEMORYCOPY?MCULIB +--> ?PR?_MEMORYCOPY?MCULIB
+--> ?PR?_CRC8CAL?TWI +--> ?PR?_CRC8CAL?TWI
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 16 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 16
?PR?E2PROMBKRTC?EXTE2PROM ----- ----- ----- ----- 02BBH 000AH ?PR?E2PROMBKRTC?EXTE2PROM ----- ----- ----- ----- 02BBH 000AH
@ -959,7 +959,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:5A45H LINE# 38 C:5A45H LINE# 38
C:5A45H LINE# 39 C:5A45H LINE# 39
C:5A45H LINE# 42 C:5A45H LINE# 42
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 17 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 17
C:5A48H LINE# 43 C:5A48H LINE# 43
@ -1019,7 +1019,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
D:00E2H PUBLIC P1CR D:00E2H PUBLIC P1CR
D:00E3H PUBLIC P2CR D:00E3H PUBLIC P2CR
D:00E4H PUBLIC P3CR D:00E4H PUBLIC P3CR
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 18 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 18
D:00BAH PUBLIC IENC D:00BAH PUBLIC IENC
@ -1079,7 +1079,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:5176H LINE# 70 C:5176H LINE# 70
C:5176H LINE# 71 C:5176H LINE# 71
C:5179H LINE# 72 C:5179H LINE# 72
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 19 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 19
C:517AH LINE# 73 C:517AH LINE# 73
@ -1139,7 +1139,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:6631H LINE# 569 C:6631H LINE# 569
C:6636H LINE# 570 C:6636H LINE# 570
C:6636H LINE# 571 C:6636H LINE# 571
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 20 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 20
C:6638H LINE# 572 C:6638H LINE# 572
@ -1199,7 +1199,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
------- ENDPROC _INTERRUPTINT4APP ------- ENDPROC _INTERRUPTINT4APP
------- PROC INTERRUPTTIMER3APP ------- PROC INTERRUPTTIMER3APP
C:710FH LINE# 51 C:710FH LINE# 51
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 21 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 21
C:710FH LINE# 52 C:710FH LINE# 52
@ -1259,7 +1259,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:6C50H LINE# 39 C:6C50H LINE# 39
C:6C50H LINE# 40 C:6C50H LINE# 40
C:6C53H LINE# 41 C:6C53H LINE# 41
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 22 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 22
C:6C53H LINE# 42 C:6C53H LINE# 42
@ -1319,7 +1319,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:6003H LINE# 117 C:6003H LINE# 117
C:6008H LINE# 118 C:6008H LINE# 118
C:6008H LINE# 120 C:6008H LINE# 120
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 23 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 23
C:6008H LINE# 121 C:6008H LINE# 121
@ -1379,7 +1379,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:5C86H LINE# 34 C:5C86H LINE# 34
C:5C8DH LINE# 35 C:5C8DH LINE# 35
C:5C8DH LINE# 36 C:5C8DH LINE# 36
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 24 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 24
C:5C90H LINE# 37 C:5C90H LINE# 37
@ -1439,7 +1439,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
------- MODULE LOWPOWER ------- MODULE LOWPOWER
C:0000H SYMBOL _ICE_DUMMY_ C:0000H SYMBOL _ICE_DUMMY_
D:0080H PUBLIC P0 D:0080H PUBLIC P0
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 25 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 25
D:0090H PUBLIC P1 D:0090H PUBLIC P1
@ -1499,7 +1499,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
------- PROC SYSTEMINTOPD ------- PROC SYSTEMINTOPD
C:73E6H LINE# 65 C:73E6H LINE# 65
C:73E6H LINE# 66 C:73E6H LINE# 66
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 26 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 26
C:73E6H LINE# 67 C:73E6H LINE# 67
@ -1559,7 +1559,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:5382H LINE# 152 C:5382H LINE# 152
C:5388H LINE# 153 C:5388H LINE# 153
C:5388H LINE# 154 C:5388H LINE# 154
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 27 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 27
C:538BH LINE# 155 C:538BH LINE# 155
@ -1619,7 +1619,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:6C1CH LINE# 219 C:6C1CH LINE# 219
C:6C1FH LINE# 220 C:6C1FH LINE# 220
C:6C1FH LINE# 222 C:6C1FH LINE# 222
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 28 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 28
C:6C22H LINE# 223 C:6C22H LINE# 223
@ -1679,7 +1679,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
B:0029H.4 PUBLIC bISPFlg B:0029H.4 PUBLIC bISPFlg
C:5881H PUBLIC _Uart0WriteInfo C:5881H PUBLIC _Uart0WriteInfo
X:03FAH PUBLIC ucUart0BufPT X:03FAH PUBLIC ucUart0BufPT
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 29 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 29
X:03FBH PUBLIC ucUart1BufPT X:03FBH PUBLIC ucUart1BufPT
@ -1739,7 +1739,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:5D45H LINE# 274 C:5D45H LINE# 274
C:5D57H LINE# 275 C:5D57H LINE# 275
C:5D5CH LINE# 276 C:5D5CH LINE# 276
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 30 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 30
C:5D5FH LINE# 277 C:5D5FH LINE# 277
@ -1799,7 +1799,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:3BDCH LINE# 519 C:3BDCH LINE# 519
C:3BDCH LINE# 520 C:3BDCH LINE# 520
C:3BDCH LINE# 521 C:3BDCH LINE# 521
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 31 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 31
C:3BDCH LINE# 522 C:3BDCH LINE# 522
@ -1859,7 +1859,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:3C85H LINE# 591 C:3C85H LINE# 591
C:3C86H LINE# 592 C:3C86H LINE# 592
C:3C8DH LINE# 593 C:3C8DH LINE# 593
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 32 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 32
C:3C8DH LINE# 594 C:3C8DH LINE# 594
@ -1919,7 +1919,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
------- PROC UART0CALICUROFFSET ------- PROC UART0CALICUROFFSET
C:6DCBH LINE# 950 C:6DCBH LINE# 950
C:6DCBH LINE# 951 C:6DCBH LINE# 951
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 33 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 33
C:6DCBH LINE# 952 C:6DCBH LINE# 952
@ -1979,7 +1979,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:62DCH LINE# 1207 C:62DCH LINE# 1207
C:62E3H LINE# 1208 C:62E3H LINE# 1208
C:62EAH LINE# 1209 C:62EAH LINE# 1209
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 34 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 34
C:62EBH LINE# 1211 C:62EBH LINE# 1211
@ -2039,7 +2039,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:4F9EH LINE# 1329 C:4F9EH LINE# 1329
C:4F9EH LINE# 1330 C:4F9EH LINE# 1330
C:4F9EH LINE# 1331 C:4F9EH LINE# 1331
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 35 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 35
C:4F9EH LINE# 1332 C:4F9EH LINE# 1332
@ -2099,7 +2099,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:39A2H LINE# 1519 C:39A2H LINE# 1519
C:39A2H LINE# 1520 C:39A2H LINE# 1520
C:39A4H LINE# 1521 C:39A4H LINE# 1521
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 36 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 36
C:39A9H LINE# 1522 C:39A9H LINE# 1522
@ -2159,7 +2159,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:5288H LINE# 1766 C:5288H LINE# 1766
C:5288H LINE# 1767 C:5288H LINE# 1767
C:52A1H LINE# 1768 C:52A1H LINE# 1768
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 37 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 37
C:52A1H LINE# 1769 C:52A1H LINE# 1769
@ -2219,7 +2219,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
------- ENDPROC INTERRUPTUART0APPTX ------- ENDPROC INTERRUPTUART0APPTX
------- PROC UART0CHECK ------- PROC UART0CHECK
C:729BH LINE# 1842 C:729BH LINE# 1842
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C:729BH LINE# 1843 C:729BH LINE# 1843
@ -2279,7 +2279,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
B:0022H.5 PUBLIC bAFE_SC B:0022H.5 PUBLIC bAFE_SC
B:0025H.0 PUBLIC bCHGMOS B:0025H.0 PUBLIC bCHGMOS
B:0020H.3 PUBLIC bBAL_EN B:0020H.3 PUBLIC bBAL_EN
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X:001AH PUBLIC E2ulFCC X:001AH PUBLIC E2ulFCC
@ -2339,7 +2339,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
B:0024H.2 PUBLIC bVDQ B:0024H.2 PUBLIC bVDQ
B:0026H.5 PUBLIC bAfeDSG B:0026H.5 PUBLIC bAfeDSG
B:0022H.2 PUBLIC bUTC B:0022H.2 PUBLIC bUTC
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X:0062H PUBLIC E2uiOVvol X:0062H PUBLIC E2uiOVvol
@ -2399,7 +2399,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
D:00C0H PUBLIC P4 D:00C0H PUBLIC P4
D:0080H PUBLIC P5 D:0080H PUBLIC P5
X:0204H PUBLIC uiTempeMax X:0204H PUBLIC uiTempeMax
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B:002BH.1 PUBLIC bCADCFlg B:002BH.1 PUBLIC bCADCFlg
@ -2459,7 +2459,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:7239H LINE# 54 C:7239H LINE# 54
C:7239H LINE# 55 C:7239H LINE# 55
C:723EH LINE# 56 C:723EH LINE# 56
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C:723EH LINE# 57 C:723EH LINE# 57
@ -2519,7 +2519,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
X:02C6H SYMBOL RdBuf X:02C6H SYMBOL RdBuf
------- DO ------- DO
B:002AH.4 SYMBOL Result B:002AH.4 SYMBOL Result
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X:02C8H SYMBOL Times X:02C8H SYMBOL Times
@ -2579,7 +2579,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:559AH LINE# 196 C:559AH LINE# 196
C:559EH LINE# 197 C:559EH LINE# 197
C:55A2H LINE# 198 C:55A2H LINE# 198
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C:55A6H LINE# 199 C:55A6H LINE# 199
@ -2639,7 +2639,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:5584H LINE# 261 C:5584H LINE# 261
------- ENDPROC AFEINIT ------- ENDPROC AFEINIT
------- PROC AFERDFLG ------- PROC AFERDFLG
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C:6CA1H LINE# 272 C:6CA1H LINE# 272
@ -2699,7 +2699,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:5DDFH LINE# 339 C:5DDFH LINE# 339
C:5DE4H LINE# 340 C:5DE4H LINE# 340
C:5DE4H LINE# 341 C:5DE4H LINE# 341
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C:5DE6H LINE# 342 C:5DE6H LINE# 342
@ -2759,7 +2759,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
------- ENDPROC AFELOADCHECKDIS ------- ENDPROC AFELOADCHECKDIS
------- PROC _AFEBALCTL ------- PROC _AFEBALCTL
X:02BCH SYMBOL BalChTemp X:02BCH SYMBOL BalChTemp
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C:6C62H LINE# 422 C:6C62H LINE# 422
@ -2819,7 +2819,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:73C0H LINE# 486 C:73C0H LINE# 486
C:73C0H LINE# 487 C:73C0H LINE# 487
C:73C7H LINE# 488 C:73C7H LINE# 488
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C:73D2H LINE# 489 C:73D2H LINE# 489
@ -2879,7 +2879,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:3E1FH LINE# 32 C:3E1FH LINE# 32
C:3E1FH LINE# 33 C:3E1FH LINE# 33
C:3E1FH LINE# 36 C:3E1FH LINE# 36
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C:3E2BH LINE# 37 C:3E2BH LINE# 37
@ -2939,7 +2939,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:6E62H LINE# 101 C:6E62H LINE# 101
C:6E62H LINE# 102 C:6E62H LINE# 102
C:6E64H LINE# 103 C:6E64H LINE# 103
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C:6E64H LINE# 104 C:6E64H LINE# 104
@ -2999,7 +2999,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:4CCCH LINE# 193 C:4CCCH LINE# 193
C:4CCCH LINE# 194 C:4CCCH LINE# 194
C:4CD2H LINE# 195 C:4CD2H LINE# 195
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C:4CD4H LINE# 196 C:4CD4H LINE# 196
@ -3059,7 +3059,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:72DBH PUBLIC AFEInfoProcess C:72DBH PUBLIC AFEInfoProcess
X:05F2H PUBLIC ucDsgingCheckCnt X:05F2H PUBLIC ucDsgingCheckCnt
B:00A8H.4 PUBLIC ES0 B:00A8H.4 PUBLIC ES0
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C:6738H PUBLIC AfeGetVol C:6738H PUBLIC AfeGetVol
@ -3119,7 +3119,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
X:02C3H SYMBOL i X:02C3H SYMBOL i
B:002AH.3 SYMBOL Result B:002AH.3 SYMBOL Result
------- ENDDO ------- ENDDO
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C:6738H LINE# 87 C:6738H LINE# 87
@ -3179,7 +3179,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:43D4H LINE# 157 C:43D4H LINE# 157
C:43D6H LINE# 165 C:43D6H LINE# 165
C:43F5H LINE# 167 C:43F5H LINE# 167
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C:43F7H LINE# 175 C:43F7H LINE# 175
@ -3239,7 +3239,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:4035H LINE# 281 C:4035H LINE# 281
C:4037H LINE# 289 C:4037H LINE# 289
C:4051H LINE# 291 C:4051H LINE# 291
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C:4053H LINE# 299 C:4053H LINE# 299
@ -3299,7 +3299,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:3676H LINE# 392 C:3676H LINE# 392
C:3694H LINE# 393 C:3694H LINE# 393
C:369CH LINE# 394 C:369CH LINE# 394
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C:36B1H LINE# 396 C:36B1H LINE# 396
@ -3359,7 +3359,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
D:00C0H PUBLIC P4 D:00C0H PUBLIC P4
D:0080H PUBLIC P5 D:0080H PUBLIC P5
X:05D6H PUBLIC slExtCur X:05D6H PUBLIC slExtCur
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C:740AH PUBLIC CaliCurZero C:740AH PUBLIC CaliCurZero
@ -3419,7 +3419,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:6A26H LINE# 81 C:6A26H LINE# 81
C:6A4AH LINE# 82 C:6A4AH LINE# 82
C:6A4AH LINE# 83 C:6A4AH LINE# 83
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C:6A52H LINE# 84 C:6A52H LINE# 84
@ -3479,7 +3479,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:63C9H LINE# 158 C:63C9H LINE# 158
C:63C9H LINE# 159 C:63C9H LINE# 159
C:63CCH LINE# 160 C:63CCH LINE# 160
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 59 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 59
C:63CCH LINE# 162 C:63CCH LINE# 162
@ -3539,7 +3539,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:6565H LINE# 51 C:6565H LINE# 51
C:6568H LINE# 52 C:6568H LINE# 52
C:6568H LINE# 53 C:6568H LINE# 53
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C:656AH LINE# 54 C:656AH LINE# 54
@ -3599,7 +3599,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:578EH PUBLIC E2PRomInit C:578EH PUBLIC E2PRomInit
C:71B2H PUBLIC E2PRomTwiCheck C:71B2H PUBLIC E2PRomTwiCheck
B:00A0H.0 PUBLIC P2_0 B:00A0H.0 PUBLIC P2_0
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X:03DDH PUBLIC ucRTCBKTime1 X:03DDH PUBLIC ucRTCBKTime1
@ -3659,7 +3659,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:71C9H LINE# 56 C:71C9H LINE# 56
C:71C9H LINE# 57 C:71C9H LINE# 57
C:71CEH LINE# 58 C:71CEH LINE# 58
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C:71CEH LINE# 59 C:71CEH LINE# 59
@ -3719,7 +3719,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:5F0DH LINE# 133 C:5F0DH LINE# 133
C:5F0FH LINE# 134 C:5F0FH LINE# 134
------- ENDPROC _E2PROMREAD ------- ENDPROC _E2PROMREAD
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------- PROC E2PROMERASE ------- PROC E2PROMERASE
@ -3779,7 +3779,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:666FH LINE# 210 C:666FH LINE# 210
C:666FH LINE# 211 C:666FH LINE# 211
C:6681H LINE# 212 C:6681H LINE# 212
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C:6686H LINE# 213 C:6686H LINE# 213
@ -3839,7 +3839,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:3533H LINE# 281 C:3533H LINE# 281
C:3543H LINE# 282 C:3543H LINE# 282
C:3553H LINE# 283 C:3553H LINE# 283
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C:355EH LINE# 284 C:355EH LINE# 284
@ -3899,7 +3899,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:68EEH LINE# 363 C:68EEH LINE# 363
C:68F5H LINE# 364 C:68F5H LINE# 364
C:6902H LINE# 366 C:6902H LINE# 366
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C:6921H LINE# 367 C:6921H LINE# 367
@ -3959,7 +3959,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:4E9DH LINE# 444 C:4E9DH LINE# 444
C:4E9DH LINE# 445 C:4E9DH LINE# 445
C:4EA0H LINE# 446 C:4EA0H LINE# 446
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C:4EA0H LINE# 447 C:4EA0H LINE# 447
@ -4019,7 +4019,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:459DH LINE# 515 C:459DH LINE# 515
C:459FH LINE# 516 C:459FH LINE# 516
C:459FH LINE# 518 C:459FH LINE# 518
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C:45A2H LINE# 519 C:45A2H LINE# 519
@ -4079,7 +4079,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
B:00D8H.0 PUBLIC IF40 B:00D8H.0 PUBLIC IF40
C:59D3H PUBLIC InterruptINT4 C:59D3H PUBLIC InterruptINT4
B:00D8H.1 PUBLIC IF41 B:00D8H.1 PUBLIC IF41
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B:00D8H.2 PUBLIC IF42 B:00D8H.2 PUBLIC IF42
@ -4139,7 +4139,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:1003H LINE# 74 C:1003H LINE# 74
C:100BH LINE# 76 C:100BH LINE# 76
C:100DH LINE# 78 C:100DH LINE# 78
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C:1010H LINE# 79 C:1010H LINE# 79
@ -4199,7 +4199,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:5096H LINE# 82 C:5096H LINE# 82
C:5099H LINE# 83 C:5099H LINE# 83
C:5099H LINE# 84 C:5099H LINE# 84
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C:509BH LINE# 85 C:509BH LINE# 85
@ -4259,7 +4259,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:6E70H PUBLIC _McuFlashWrOneByte C:6E70H PUBLIC _McuFlashWrOneByte
B:002DH.6 PUBLIC bMcuFlashErr B:002DH.6 PUBLIC bMcuFlashErr
C:52C0H PUBLIC _McuFlashWrite C:52C0H PUBLIC _McuFlashWrite
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X:05F6H PUBLIC ucMcuFlashWrValid X:05F6H PUBLIC ucMcuFlashWrValid
@ -4319,7 +4319,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:70FDH LINE# 68 C:70FDH LINE# 68
C:70FFH LINE# 69 C:70FFH LINE# 69
C:70FFH LINE# 70 C:70FFH LINE# 70
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C:710CH LINE# 72 C:710CH LINE# 72
@ -4379,7 +4379,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:54D2H LINE# 129 C:54D2H LINE# 129
C:54D2H LINE# 130 C:54D2H LINE# 130
C:54D5H LINE# 131 C:54D5H LINE# 131
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C:54D6H LINE# 132 C:54D6H LINE# 132
@ -4439,7 +4439,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:5305H LINE# 198 C:5305H LINE# 198
C:5308H LINE# 199 C:5308H LINE# 199
C:5309H LINE# 200 C:5309H LINE# 200
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C:530AH LINE# 201 C:530AH LINE# 201
@ -4499,7 +4499,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:4820H LINE# 269 C:4820H LINE# 269
C:4822H LINE# 270 C:4822H LINE# 270
C:482AH LINE# 271 C:482AH LINE# 271
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C:4832H LINE# 272 C:4832H LINE# 272
@ -4559,7 +4559,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:72C6H LINE# 336 C:72C6H LINE# 336
C:72C6H LINE# 337 C:72C6H LINE# 337
C:72C9H LINE# 338 C:72C9H LINE# 338
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C:72C9H LINE# 339 C:72C9H LINE# 339
@ -4619,7 +4619,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
D:0098H PUBLIC SCON D:0098H PUBLIC SCON
D:0088H PUBLIC TCON D:0088H PUBLIC TCON
D:00CEH PUBLIC PWM0DL D:00CEH PUBLIC PWM0DL
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D:00A4H PUBLIC PWM1DL D:00A4H PUBLIC PWM1DL
@ -4679,7 +4679,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:7147H LINE# 98 C:7147H LINE# 98
C:7148H LINE# 99 C:7148H LINE# 99
C:7149H LINE# 100 C:7149H LINE# 100
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C:714AH LINE# 102 C:714AH LINE# 102
@ -4739,7 +4739,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:6942H LINE# 163 C:6942H LINE# 163
C:694AH LINE# 164 C:694AH LINE# 164
C:694AH LINE# 165 C:694AH LINE# 165
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C:694EH LINE# 166 C:694EH LINE# 166
@ -4799,7 +4799,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:6F1DH LINE# 275 C:6F1DH LINE# 275
C:6F1DH LINE# 276 C:6F1DH LINE# 276
C:6F2EH LINE# 277 C:6F2EH LINE# 277
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C:6F33H LINE# 278 C:6F33H LINE# 278
@ -4859,7 +4859,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
D:0080H PUBLIC P5 D:0080H PUBLIC P5
C:6782H PUBLIC MosStatusCheck C:6782H PUBLIC MosStatusCheck
C:6FA1H PUBLIC MosCtrl C:6FA1H PUBLIC MosCtrl
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B:002EH.3 PUBLIC bCHGMOSBk B:002EH.3 PUBLIC bCHGMOSBk
@ -4919,7 +4919,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:0000H SYMBOL _ICE_DUMMY_ C:0000H SYMBOL _ICE_DUMMY_
D:0080H PUBLIC P0 D:0080H PUBLIC P0
C:63E4H PUBLIC PorProtectOTC C:63E4H PUBLIC PorProtectOTC
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D:0090H PUBLIC P1 D:0090H PUBLIC P1
@ -4979,7 +4979,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:63E4H LINE# 72 C:63E4H LINE# 72
C:63E4H LINE# 73 C:63E4H LINE# 73
C:63E4H LINE# 74 C:63E4H LINE# 74
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C:63E7H LINE# 75 C:63E7H LINE# 75
@ -5039,7 +5039,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:64D0H LINE# 141 C:64D0H LINE# 141
------- ENDPROC PORPROTECTOTD ------- ENDPROC PORPROTECTOTD
------- PROC PORPROTECTUTD ------- PROC PORPROTECTUTD
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C:64D1H LINE# 150 C:64D1H LINE# 150
@ -5099,7 +5099,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
X:03BDH PUBLIC uiOCD2DelayCnt X:03BDH PUBLIC uiOCD2DelayCnt
D:00B0H PUBLIC P3 D:00B0H PUBLIC P3
D:00C0H PUBLIC P4 D:00C0H PUBLIC P4
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D:0080H PUBLIC P5 D:0080H PUBLIC P5
@ -5159,7 +5159,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:46C3H LINE# 63 C:46C3H LINE# 63
C:46C3H LINE# 64 C:46C3H LINE# 64
C:46C6H LINE# 65 C:46C6H LINE# 65
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C:46C6H LINE# 66 C:46C6H LINE# 66
@ -5219,7 +5219,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:491AH LINE# 127 C:491AH LINE# 127
C:4920H LINE# 128 C:4920H LINE# 128
C:4920H LINE# 129 C:4920H LINE# 129
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C:4921H LINE# 130 C:4921H LINE# 130
@ -5279,7 +5279,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:4A37H LINE# 196 C:4A37H LINE# 196
C:4A3DH LINE# 197 C:4A3DH LINE# 197
C:4A3DH LINE# 198 C:4A3DH LINE# 198
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C:4A3EH LINE# 199 C:4A3EH LINE# 199
@ -5339,7 +5339,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:4B6BH LINE# 261 C:4B6BH LINE# 261
C:4B6BH LINE# 262 C:4B6BH LINE# 262
C:4B6BH LINE# 263 C:4B6BH LINE# 263
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------- ENDPROC PROTECTOTD ------- ENDPROC PROTECTOTD
@ -5399,7 +5399,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:6189H LINE# 332 C:6189H LINE# 332
C:6189H LINE# 333 C:6189H LINE# 333
C:6190H LINE# 334 C:6190H LINE# 334
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C:6190H LINE# 335 C:6190H LINE# 335
@ -5459,7 +5459,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:7175H LINE# 407 C:7175H LINE# 407
C:7175H LINE# 408 C:7175H LINE# 408
C:7178H LINE# 409 C:7178H LINE# 409
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C:7178H LINE# 410 C:7178H LINE# 410
@ -5519,7 +5519,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
D:00A0H PUBLIC P2 D:00A0H PUBLIC P2
D:00B0H PUBLIC P3 D:00B0H PUBLIC P3
D:00C0H PUBLIC P4 D:00C0H PUBLIC P4
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D:0080H PUBLIC P5 D:0080H PUBLIC P5
@ -5579,7 +5579,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:6082H LINE# 77 C:6082H LINE# 77
------- ENDPROC _RTCWRITE ------- ENDPROC _RTCWRITE
------- PROC _RTCREAD ------- PROC _RTCREAD
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X:02E7H SYMBOL RdAddr X:02E7H SYMBOL RdAddr
@ -5639,7 +5639,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:320BH LINE# 155 C:320BH LINE# 155
C:3217H LINE# 156 C:3217H LINE# 156
C:3227H LINE# 157 C:3227H LINE# 157
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C:3237H LINE# 158 C:3237H LINE# 158
@ -5699,7 +5699,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:5436H LINE# 225 C:5436H LINE# 225
C:543BH LINE# 226 C:543BH LINE# 226
C:543DH LINE# 227 C:543DH LINE# 227
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C:5441H LINE# 228 C:5441H LINE# 228
@ -5759,7 +5759,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
B:002BH.0 SYMBOL Result B:002BH.0 SYMBOL Result
D:0004H SYMBOL timeoutcount D:0004H SYMBOL timeoutcount
------- ENDDO ------- ENDDO
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C:7076H LINE# 59 C:7076H LINE# 59
@ -5819,7 +5819,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:3D4DH LINE# 121 C:3D4DH LINE# 121
C:3D50H LINE# 122 C:3D50H LINE# 122
C:3D57H LINE# 123 C:3D57H LINE# 123
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C:3D57H LINE# 124 C:3D57H LINE# 124
@ -5879,7 +5879,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:3E01H LINE# 183 C:3E01H LINE# 183
C:3E04H LINE# 184 C:3E04H LINE# 184
C:3E0EH LINE# 185 C:3E0EH LINE# 185
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C:3E0EH LINE# 186 C:3E0EH LINE# 186
@ -5939,7 +5939,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:32D1H LINE# 246 C:32D1H LINE# 246
C:32D1H LINE# 247 C:32D1H LINE# 247
C:32D3H LINE# 248 C:32D3H LINE# 248
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C:32D6H LINE# 249 C:32D6H LINE# 249
@ -5999,7 +5999,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:33DAH LINE# 321 C:33DAH LINE# 321
C:33E4H LINE# 322 C:33E4H LINE# 322
C:33ECH LINE# 323 C:33ECH LINE# 323
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C:33ECH LINE# 325 C:33ECH LINE# 325
@ -6059,7 +6059,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:62F3H PUBLIC InterruptUART0 C:62F3H PUBLIC InterruptUART0
D:0086H PUBLIC INSCON D:0086H PUBLIC INSCON
D:009BH PUBLIC SADEN D:009BH PUBLIC SADEN
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D:009AH PUBLIC SADDR D:009AH PUBLIC SADDR
@ -6119,7 +6119,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
------- ENDMOD THERMISTOR ------- ENDMOD THERMISTOR
------- MODULE TWIIO ------- MODULE TWIIO
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C:0000H SYMBOL _ICE_DUMMY_ C:0000H SYMBOL _ICE_DUMMY_
@ -6179,7 +6179,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
X:0337H PUBLIC Info_ulTempDsgFcc X:0337H PUBLIC Info_ulTempDsgFcc
X:033BH PUBLIC E2ui_CYCLECOUNTA_B X:033BH PUBLIC E2ui_CYCLECOUNTA_B
X:033DH PUBLIC E2ui_CYCLECOUNTB_B X:033DH PUBLIC E2ui_CYCLECOUNTB_B
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 104 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 104
X:033FH PUBLIC E2uiTempFCC_K1 X:033FH PUBLIC E2uiTempFCC_K1
@ -6239,7 +6239,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:2F10H LINE# 124 C:2F10H LINE# 124
C:2F1CH LINE# 125 C:2F1CH LINE# 125
C:2F2BH LINE# 126 C:2F2BH LINE# 126
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 105 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 105
C:2F3CH LINE# 127 C:2F3CH LINE# 127
@ -6299,7 +6299,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:6380H LINE# 221 C:6380H LINE# 221
C:6384H LINE# 222 C:6384H LINE# 222
C:6388H LINE# 223 C:6388H LINE# 223
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 106 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 106
C:6390H LINE# 224 C:6390H LINE# 224
@ -6359,7 +6359,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
------- MODULE ?C?CASTF ------- MODULE ?C?CASTF
C:247AH PUBLIC ?C?CASTF C:247AH PUBLIC ?C?CASTF
------- ENDMOD ?C?CASTF ------- ENDMOD ?C?CASTF
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 107 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 107
@ -6419,7 +6419,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:270BH PUBLIC ?C?ULSHR C:270BH PUBLIC ?C?ULSHR
------- ENDMOD ?C?ULSHR ------- ENDMOD ?C?ULSHR
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 108 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 108
------- MODULE ?C?SLSHR ------- MODULE ?C?SLSHR
@ -6479,7 +6479,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
FUNCTION REGISTER MASKS FUNCTION REGISTER MASKS
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 109 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 109
@ -6539,7 +6539,7 @@ MCUINTOPD. . . . . . . . . @0xc000
MOSCTRL. . . . . . . . . . @0xf7ff MOSCTRL. . . . . . . . . . @0xf7ff
MOSSTATUSCHECK . . . . . . @0xc000 MOSSTATUSCHECK . . . . . . @0xc000
PORPROTECTOTC. . . . . . . @0xf78f PORPROTECTOTC. . . . . . . @0xf78f
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 110 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 110
PORPROTECTOTD. . . . . . . @0xf78f PORPROTECTOTD. . . . . . . @0xf78f
@ -6599,7 +6599,7 @@ _MCUFLASHWRSECTOR. . . . . @0xf33f
_MEMORYCOPY. . . . . . . . @0xf78d _MEMORYCOPY. . . . . . . . @0xf78d
_MEMORYSET . . . . . . . . @0xf781 _MEMORYSET . . . . . . . . @0xf781
_PUTCHAR . . . . . . . . . @0xc000 _PUTCHAR . . . . . . . . . @0xc000
BL51 BANKED LINKER/LOCATER V6.22 02/08/2025 15:18:21 PAGE 111 BL51 BANKED LINKER/LOCATER V6.22 02/11/2025 15:43:04 PAGE 111
_RTCMODIFYTIME . . . . . . @0xf7ff _RTCMODIFYTIME . . . . . . @0xf7ff

131
output/MCUCore_Load.plg
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@ -1,12 +1,3 @@
<html>
<body>
<pre>
<h1>µVision Build Log</h1>
<h2>Project:</h2>
E:\Y\keil\ZDBMS\ZDBMS\MCUCore.uvproj
Project File Date: 01/23/2025
<h2>Output:</h2>
Build target 'McuFlash_Load' Build target 'McuFlash_Load'
compiling Main.c... compiling Main.c...
compiling Initial.c... compiling Initial.c...
@ -49,113 +40,21 @@ Program Size: data=151.4 xdata=1529 code=29770
creating hex file from ".\output\MCUCore_Load"... creating hex file from ".\output\MCUCore_Load"...
".\output\MCUCore_Load" - 0 Error(s), 3 Warning(s). ".\output\MCUCore_Load" - 0 Error(s), 3 Warning(s).
Load "E:\\Y\\keil\\ZDBMS\\ZDBMS\\output\\MCUCore_Load" Load "E:\\Y\\keil\\ZDBMS\\ZDBMS\\output\\MCUCore_Load"
Flash Erase Done. Refresh WriteMode error.
ISP size=0, E2PROM size=1024; error time at 2025-02-11 15:43:07.
Main Size=64512Bytes; E2PROM Size=1024Bytes; *** Error:Flash Erase failed.
The Code CheckSum is 32F7H
Code Write Done: 29776 bytes programmed.
Code Option Write Done.
Code Verify Done: 29776 bytes verified.
Code Option Verify Done
Code Security Write Done.
Code Security Verify Done
Update EEprom Done
elaspe time 3985 ms
Build target 'McuFlash_Load'
compiling Main.c...
compiling Initial.c...
compiling InterruptApp.c...
compiling Led.c...
compiling KeyApp.c...
compiling LowPower.c...
compiling UartApp.c...
compiling Memory.c...
compiling AFE.c...
compiling Balance.c...
compiling Calculate.c...
compiling Calibrate.c...
compiling ChargerLoad.c...
compiling ExtE2PRom.c...
compiling Interrupt.c...
compiling KeyScan.c...
compiling McuFlash.c...
compiling McuLib.c...
CODE_DRV\MCULIB.C(20): warning C280: 'ClkSource': unreferenced local variable
CODE_DRV\MCULIB.C(84): warning C280: 'SysClock': unreferenced local variable
compiling MosCtrl.c...
compiling PorSelfTest.c...
compiling Protect.c...
compiling RTC.c...
compiling TWI.c...
compiling Uart.c...
compiling Thermistor.c...
compiling TwiIO.c...
assembling STARTUP.A51...
compiling GasGaugeInter_V4_13.c...
compiling BootApp.c...
compiling BootIAP.c...
linking...
*** WARNING L15: MULTIPLE CALL TO SEGMENT
SEGMENT: ?PR?_MCUCLOCKSET?MCULIB
CALLER1: ?PR?INTERRUPTINT4?INTERRUPT
CALLER2: ?C_C51STARTUP
Program Size: data=151.4 xdata=1529 code=29607
creating hex file from ".\output\MCUCore_Load"...
".\output\MCUCore_Load" - 0 Error(s), 3 Warning(s).
Load "E:\\Y\\keil\\ZDBMS\\ZDBMS\\output\\MCUCore_Load" Load "E:\\Y\\keil\\ZDBMS\\ZDBMS\\output\\MCUCore_Load"
Flash Erase Done. Refresh WriteMode error.
ISP size=0, E2PROM size=1024; error time at 2025-02-11 15:43:14.
Main Size=64512Bytes; E2PROM Size=1024Bytes; *** Error:Flash Erase failed.
The Code CheckSum is E552H Load "E:\\Y\\keil\\ZDBMS\\ZDBMS\\output\\MCUCore_Load"
Code Write Done: 29613 bytes programmed. Refresh WriteMode error.
Code Option Write Done. error time at 2025-02-11 15:43:23.
Code Verify Done: 29613 bytes verified. *** Error:Flash Erase failed.
Code Option Verify Done Load "E:\\Y\\keil\\ZDBMS\\ZDBMS\\output\\MCUCore_Load"
Code Security Write Done. Refresh WriteMode error.
Code Security Verify Done error time at 2025-02-11 15:43:29.
Update EEprom Done *** Error:Flash Erase failed.
elaspe time 3969 ms
Build target 'McuFlash_Load'
compiling Main.c...
compiling Initial.c...
compiling InterruptApp.c...
compiling Led.c...
compiling KeyApp.c...
compiling LowPower.c...
compiling UartApp.c...
compiling Memory.c...
compiling AFE.c...
compiling Balance.c...
compiling Calculate.c...
compiling Calibrate.c...
compiling ChargerLoad.c...
compiling ExtE2PRom.c...
compiling Interrupt.c...
compiling KeyScan.c...
compiling McuFlash.c...
compiling McuLib.c...
CODE_DRV\MCULIB.C(20): warning C280: 'ClkSource': unreferenced local variable
CODE_DRV\MCULIB.C(84): warning C280: 'SysClock': unreferenced local variable
compiling MosCtrl.c...
compiling PorSelfTest.c...
compiling Protect.c...
compiling RTC.c...
compiling TWI.c...
compiling Uart.c...
compiling Thermistor.c...
compiling TwiIO.c...
assembling STARTUP.A51...
compiling GasGaugeInter_V4_13.c...
compiling BootApp.c...
compiling BootIAP.c...
linking...
*** WARNING L15: MULTIPLE CALL TO SEGMENT
SEGMENT: ?PR?_MCUCLOCKSET?MCULIB
CALLER1: ?PR?INTERRUPTINT4?INTERRUPT
CALLER2: ?C_C51STARTUP
Program Size: data=151.4 xdata=1529 code=29770
creating hex file from ".\output\MCUCore_Load"...
".\output\MCUCore_Load" - 0 Error(s), 3 Warning(s).
Load "E:\\Y\\keil\\ZDBMS\\ZDBMS\\output\\MCUCore_Load" Load "E:\\Y\\keil\\ZDBMS\\ZDBMS\\output\\MCUCore_Load"
Flash Erase Done. Flash Erase Done.
ISP size=0, E2PROM size=1024; ISP size=0, E2PROM size=1024;
@ -168,4 +67,4 @@ Code Option Verify Done
Code Security Write Done. Code Security Write Done.
Code Security Verify Done Code Security Verify Done
Update EEprom Done Update EEprom Done
elaspe time 4000 ms elaspe time 4016 ms

6
output/Main.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 MAIN 02/08/2025 15:18:20 PAGE 1 C51 COMPILER V9.01 MAIN 02/11/2025 15:43:03 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE MAIN C51 COMPILER V9.01, COMPILATION OF MODULE MAIN
@ -62,7 +62,7 @@ line level source
51 3 ProtectProcess(); //电压、电流、温度保护 51 3 ProtectProcess(); //电压、电流、温度保护
52 3 52 3
53 3 PorSelfTest(); //第一次上电保护检测（延时较短，暂定50mS一次检测） 53 3 PorSelfTest(); //第一次上电保护检测（延时较短，暂定50mS一次检测）
C51 COMPILER V9.01 MAIN 02/08/2025 15:18:20 PAGE 2 C51 COMPILER V9.01 MAIN 02/11/2025 15:43:03 PAGE 2
54 3 54 3
55 3 LoadCheck(); //检测负载是否释放 55 3 LoadCheck(); //检测负载是否释放
@ -126,7 +126,7 @@ line level source
112 4 } 112 4 }
113 3 113 3
114 3 McuFlashWrWaitCheck(); //检测是否需要更新参数到MCU Flash 114 3 McuFlashWrWaitCheck(); //检测是否需要更新参数到MCU Flash
C51 COMPILER V9.01 MAIN 02/08/2025 15:18:20 PAGE 3 C51 COMPILER V9.01 MAIN 02/11/2025 15:43:03 PAGE 3
115 3 115 3
116 3 E2PRomBKCheck(); //备份EEPROM 116 3 E2PRomBKCheck(); //备份EEPROM

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14
output/McuFlash.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 MCUFLASH 02/08/2025 15:18:20 PAGE 1 C51 COMPILER V9.01 MCUFLASH 02/11/2025 15:43:04 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE MCUFLASH C51 COMPILER V9.01, COMPILATION OF MODULE MCUFLASH
@ -62,7 +62,7 @@ line level source
50 50
51 51
52 /************************************************************************************************* 52 /*************************************************************************************************
C51 COMPILER V9.01 MCUFLASH 02/08/2025 15:18:20 PAGE 2 C51 COMPILER V9.01 MCUFLASH 02/11/2025 15:43:04 PAGE 2
53 * 函数名: McuFlashBlankCheck 53 * 函数名: McuFlashBlankCheck
54 * 参 数: McuFlashAddr：起始地址 54 * 参 数: McuFlashAddr：起始地址
@ -126,7 +126,7 @@ line level source
112 1 112 1
113 1 for(i=0; i<MCUFLASH_SECTOR_SIZE; i++) 113 1 for(i=0; i<MCUFLASH_SECTOR_SIZE; i++)
114 1 { 114 1 {
C51 COMPILER V9.01 MCUFLASH 02/08/2025 15:18:20 PAGE 3 C51 COMPILER V9.01 MCUFLASH 02/11/2025 15:43:04 PAGE 3
115 2 IB_OFFSET = McuFlashAddr+i; 115 2 IB_OFFSET = McuFlashAddr+i;
116 2 XPAGE = (McuFlashAddr+i)>>8; 116 2 XPAGE = (McuFlashAddr+i)>>8;
@ -190,7 +190,7 @@ line level source
174 3.将XRAM数据写入 174 3.将XRAM数据写入
175 4.校验XRAM和MCU Flash区数据是否一致 175 4.校验XRAM和MCU Flash区数据是否一致
176 *************************************************************************************************/ 176 *************************************************************************************************/
C51 COMPILER V9.01 MCUFLASH 02/08/2025 15:18:20 PAGE 4 C51 COMPILER V9.01 MCUFLASH 02/11/2025 15:43:04 PAGE 4
177 BOOL McuFlashWrite(U16 McuFlashAddr, U16 XramAddr) 177 BOOL McuFlashWrite(U16 McuFlashAddr, U16 XramAddr)
178 { 178 {
@ -254,7 +254,7 @@ line level source
236 236
237 237
238 /************************************************************************************************* 238 /*************************************************************************************************
C51 COMPILER V9.01 MCUFLASH 02/08/2025 15:18:20 PAGE 5 C51 COMPILER V9.01 MCUFLASH 02/11/2025 15:43:04 PAGE 5
239 * 函数名: McuFlashProcess 239 * 函数名: McuFlashProcess
240 * 参 数: 无 240 * 参 数: 无
@ -318,7 +318,7 @@ line level source
298 2 } 298 2 }
299 1 } 299 1 }
300 300
C51 COMPILER V9.01 MCUFLASH 02/08/2025 15:18:20 PAGE 6 C51 COMPILER V9.01 MCUFLASH 02/11/2025 15:43:04 PAGE 6
301 301
302 /************************************************************************************************* 302 /*************************************************************************************************
@ -382,7 +382,7 @@ line level source
359 1 McuFlashEn(); 359 1 McuFlashEn();
360 1 if(CWORD[McuFlashAddr/2] == 0x5AA5) 360 1 if(CWORD[McuFlashAddr/2] == 0x5AA5)
361 1 { 361 1 {
C51 COMPILER V9.01 MCUFLASH 02/08/2025 15:18:20 PAGE 7 C51 COMPILER V9.01 MCUFLASH 02/11/2025 15:43:04 PAGE 7
362 2 Result = 1; 362 2 Result = 1;
363 2 } 363 2 }

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12
output/McuLib.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 MCULIB 02/08/2025 15:18:20 PAGE 1 C51 COMPILER V9.01 MCULIB 02/11/2025 15:43:04 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE MCULIB C51 COMPILER V9.01, COMPILATION OF MODULE MCULIB
@ -62,7 +62,7 @@ line level source
49 1 // TempVal = 0x10000 - (U32)128*XmS/256; 49 1 // TempVal = 0x10000 - (U32)128*XmS/256;
50 1 // } 50 1 // }
51 1 // } 51 1 // }
C51 COMPILER V9.01 MCULIB 02/08/2025 15:18:20 PAGE 2 C51 COMPILER V9.01 MCULIB 02/11/2025 15:43:04 PAGE 2
52 1 // else if(ClkSource == TIM_CLK_24MHz) 52 1 // else if(ClkSource == TIM_CLK_24MHz)
53 1 // { 53 1 // {
@ -126,7 +126,7 @@ line level source
109 109
110 /************************************************************************************************* 110 /*************************************************************************************************
111 * 函数名: McuPWM0Set、McuPWM1Set、McuPWM2Set 111 * 函数名: McuPWM0Set、McuPWM1Set、McuPWM2Set
C51 COMPILER V9.01 MCULIB 02/08/2025 15:18:20 PAGE 3 C51 COMPILER V9.01 MCULIB 02/11/2025 15:43:04 PAGE 3
112 * 参 数: PwmFreq：PWM的频率Hz；DutyRatio：PWM的高电平占空比 112 * 参 数: PwmFreq：PWM的频率Hz；DutyRatio：PWM的高电平占空比
113 * 返回值: 无 113 * 返回值: 无
@ -190,7 +190,7 @@ line level source
168 1 { 168 1 {
169 2 Tcnt = 1670/4; 169 2 Tcnt = 1670/4;
170 2 } 170 2 }
C51 COMPILER V9.01 MCULIB 02/08/2025 15:18:20 PAGE 4 C51 COMPILER V9.01 MCULIB 02/11/2025 15:43:04 PAGE 4
171 1 else //2MHz 171 1 else //2MHz
172 1 { 172 1 {
@ -254,7 +254,7 @@ line level source
230 1 || (E2ucRamCheckFlg9 != RAM_CHECK_DATA) 230 1 || (E2ucRamCheckFlg9 != RAM_CHECK_DATA)
231 1 || (E2ucRamCheckFlgA != RAM_CHECK_DATA) 231 1 || (E2ucRamCheckFlgA != RAM_CHECK_DATA)
232 1 || (E2ucRamCheckFlgB != RAM_CHECK_DATA) 232 1 || (E2ucRamCheckFlgB != RAM_CHECK_DATA)
C51 COMPILER V9.01 MCULIB 02/08/2025 15:18:20 PAGE 5 C51 COMPILER V9.01 MCULIB 02/11/2025 15:43:04 PAGE 5
233 1 || (E2uiCheckFlag != 0x5AA5)) 233 1 || (E2uiCheckFlag != 0x5AA5))
234 1 { 234 1 {
@ -318,7 +318,7 @@ line level source
292 1 PCON |= 0x01; 292 1 PCON |= 0x01;
293 1 _nop_(); 293 1 _nop_();
294 1 _nop_(); 294 1 _nop_();
C51 COMPILER V9.01 MCULIB 02/08/2025 15:18:20 PAGE 6 C51 COMPILER V9.01 MCULIB 02/11/2025 15:43:04 PAGE 6
295 1 _nop_(); 295 1 _nop_();
296 1 _nop_(); 296 1 _nop_();

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output/Memory.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 MEMORY 02/08/2025 15:18:20 PAGE 1 C51 COMPILER V9.01 MEMORY 02/11/2025 15:43:03 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE MEMORY C51 COMPILER V9.01, COMPILATION OF MODULE MEMORY
@ -62,7 +62,7 @@ line level source
50 sbit bOV = uiBatStatus^8; 50 sbit bOV = uiBatStatus^8;
51 sbit bUV = uiBatStatus^9; 51 sbit bUV = uiBatStatus^9;
52 sbit bOCC = uiBatStatus^10; 52 sbit bOCC = uiBatStatus^10;
C51 COMPILER V9.01 MEMORY 02/08/2025 15:18:20 PAGE 2 C51 COMPILER V9.01 MEMORY 02/11/2025 15:43:03 PAGE 2
53 sbit bOCD1 = uiBatStatus^11; 53 sbit bOCD1 = uiBatStatus^11;
54 sbit bOCD2 = uiBatStatus^12; 54 sbit bOCD2 = uiBatStatus^12;
@ -126,7 +126,7 @@ line level source
112 U8 xdata E2ucOCCDelay _at_ CHG_PARA_MAP_ADDR+15; 112 U8 xdata E2ucOCCDelay _at_ CHG_PARA_MAP_ADDR+15;
113 U8 xdata E2ucOCCRDelay _at_ CHG_PARA_MAP_ADDR+16; 113 U8 xdata E2ucOCCRDelay _at_ CHG_PARA_MAP_ADDR+16;
114 U8 xdata E2ucRamCheckFlg2 _at_ CHG_PARA_MAP_ADDR+17; 114 U8 xdata E2ucRamCheckFlg2 _at_ CHG_PARA_MAP_ADDR+17;
C51 COMPILER V9.01 MEMORY 02/08/2025 15:18:20 PAGE 3 C51 COMPILER V9.01 MEMORY 02/11/2025 15:43:03 PAGE 3
115 115
116 //放电参数区开始 SubClassID=0x03 langth=21 116 //放电参数区开始 SubClassID=0x03 langth=21
@ -190,7 +190,7 @@ line level source
174 U16 xdata E2uiAFEOVvol _at_ AFE_PARA_MAP_ADDR+1; 174 U16 xdata E2uiAFEOVvol _at_ AFE_PARA_MAP_ADDR+1;
175 U8 xdata E2ucRamCheckFlgA _at_ AFE_PARA_MAP_ADDR+3; 175 U8 xdata E2ucRamCheckFlgA _at_ AFE_PARA_MAP_ADDR+3;
176 176
C51 COMPILER V9.01 MEMORY 02/08/2025 15:18:20 PAGE 4 C51 COMPILER V9.01 MEMORY 02/11/2025 15:43:03 PAGE 4
177 //校准参数区开始 SubClassID=0x0B langth=12 177 //校准参数区开始 SubClassID=0x0B langth=12
178 U16 xdata E2uiVPackGain _at_ CALI_PARA_MAP_ADDR; 178 U16 xdata E2uiVPackGain _at_ CALI_PARA_MAP_ADDR;

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@ -1,4 +1,4 @@
C51 COMPILER V9.01 MOSCTRL 02/08/2025 15:18:21 PAGE 1 C51 COMPILER V9.01 MOSCTRL 02/11/2025 15:43:04 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE MOSCTRL C51 COMPILER V9.01, COMPILATION OF MODULE MOSCTRL
@ -62,7 +62,7 @@ line level source
49 2 } 49 2 }
50 1 50 1
51 1 if(bOCD1 || bOCD2 || bAFE_SC) //放电过流时，如果OCPM配置为1，则关闭充电MOS 51 1 if(bOCD1 || bOCD2 || bAFE_SC) //放电过流时，如果OCPM配置为1，则关闭充电MOS
C51 COMPILER V9.01 MOSCTRL 02/08/2025 15:18:21 PAGE 2 C51 COMPILER V9.01 MOSCTRL 02/11/2025 15:43:04 PAGE 2
52 1 { 52 1 {
53 2 bCHGMOS = 0; 53 2 bCHGMOS = 0;

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8
output/PorSelfTest.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 PORSELFTEST 02/08/2025 15:18:21 PAGE 1 C51 COMPILER V9.01 PORSELFTEST 02/11/2025 15:43:04 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE PORSELFTEST C51 COMPILER V9.01, COMPILATION OF MODULE PORSELFTEST
@ -62,7 +62,7 @@ line level source
50 2 if(uiCellVmin < E2uiUVvol) 50 2 if(uiCellVmin < E2uiUVvol)
51 2 { 51 2 {
52 3 if(++uiUVDelayCnt >= TIME_50mS_50mS) 52 3 if(++uiUVDelayCnt >= TIME_50mS_50mS)
C51 COMPILER V9.01 PORSELFTEST 02/08/2025 15:18:21 PAGE 2 C51 COMPILER V9.01 PORSELFTEST 02/11/2025 15:43:04 PAGE 2
53 3 { 53 3 {
54 4 bUV = 1; 54 4 bUV = 1;
@ -126,7 +126,7 @@ line level source
112 3 uiUTCDelayCnt = 0; 112 3 uiUTCDelayCnt = 0;
113 3 } 113 3 }
114 2 } 114 2 }
C51 COMPILER V9.01 PORSELFTEST 02/08/2025 15:18:21 PAGE 3 C51 COMPILER V9.01 PORSELFTEST 02/11/2025 15:43:04 PAGE 3
115 1 } 115 1 }
116 116
@ -190,7 +190,7 @@ line level source
174 * 描 述: 第一次上电时的自检，持续100mS，上电自检最快完成时间为50mS 174 * 描 述: 第一次上电时的自检，持续100mS，上电自检最快完成时间为50mS
175 *************************************************************************************************/ 175 *************************************************************************************************/
176 void PorSelfTest(void) 176 void PorSelfTest(void)
C51 COMPILER V9.01 PORSELFTEST 02/08/2025 15:18:21 PAGE 4 C51 COMPILER V9.01 PORSELFTEST 02/11/2025 15:43:04 PAGE 4
177 { 177 {
178 1 if(bPorSelfTestFlg) 178 1 if(bPorSelfTestFlg)

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output/Protect.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 PROTECT 02/08/2025 15:18:21 PAGE 1 C51 COMPILER V9.01 PROTECT 02/11/2025 15:43:04 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE PROTECT C51 COMPILER V9.01, COMPILATION OF MODULE PROTECT
@ -62,7 +62,7 @@ line level source
48 4 bOVLock = 0; 48 4 bOVLock = 0;
49 4 uiOVDelayCnt = 0; 49 4 uiOVDelayCnt = 0;
50 4 uiOVRDelayCnt = 0; 50 4 uiOVRDelayCnt = 0;
C51 COMPILER V9.01 PROTECT 02/08/2025 15:18:21 PAGE 2 C51 COMPILER V9.01 PROTECT 02/11/2025 15:43:04 PAGE 2
51 4 } 51 4 }
52 3 } 52 3 }
@ -126,7 +126,7 @@ line level source
110 2 } 110 2 }
111 1 else if(!bUVLock) 111 1 else if(!bUVLock)
112 1 { 112 1 {
C51 COMPILER V9.01 PROTECT 02/08/2025 15:18:21 PAGE 3 C51 COMPILER V9.01 PROTECT 02/11/2025 15:43:04 PAGE 3
113 2 if(uiCellVmin > E2uiUVRvol) 113 2 if(uiCellVmin > E2uiUVRvol)
114 2 { 114 2 {
@ -190,7 +190,7 @@ line level source
172 2 else if(uiTempeMax > E2uiTempOTC) 172 2 else if(uiTempeMax > E2uiTempOTC)
173 2 { 173 2 {
174 3 uiOTCRDelayCnt = 0; 174 3 uiOTCRDelayCnt = 0;
C51 COMPILER V9.01 PROTECT 02/08/2025 15:18:21 PAGE 4 C51 COMPILER V9.01 PROTECT 02/11/2025 15:43:04 PAGE 4
175 3 } 175 3 }
176 2 } 176 2 }
@ -254,7 +254,7 @@ line level source
234 2 { 234 2 {
235 3 if(++uiOTDDelayCnt >= TEMPE_DELAY_CNT) 235 3 if(++uiOTDDelayCnt >= TEMPE_DELAY_CNT)
236 3 { 236 3 {
C51 COMPILER V9.01 PROTECT 02/08/2025 15:18:21 PAGE 5 C51 COMPILER V9.01 PROTECT 02/11/2025 15:43:04 PAGE 5
237 4 bOTD = 1; 237 4 bOTD = 1;
238 4 uiOTDDelayCnt = 0; 238 4 uiOTDDelayCnt = 0;
@ -318,7 +318,7 @@ line level source
296 4 bUTD = 0; 296 4 bUTD = 0;
297 4 uiUTDDelayCnt = 0; 297 4 uiUTDDelayCnt = 0;
298 4 uiUTDRDelayCnt = 0; 298 4 uiUTDRDelayCnt = 0;
C51 COMPILER V9.01 PROTECT 02/08/2025 15:18:21 PAGE 6 C51 COMPILER V9.01 PROTECT 02/11/2025 15:43:04 PAGE 6
299 4 } 299 4 }
300 3 } 300 3 }
@ -382,7 +382,7 @@ line level source
358 3 } 358 3 }
359 2 else if(!bLoadChkingFlg) 359 2 else if(!bLoadChkingFlg)
360 2 { 360 2 {
C51 COMPILER V9.01 PROTECT 02/08/2025 15:18:21 PAGE 7 C51 COMPILER V9.01 PROTECT 02/11/2025 15:43:04 PAGE 7
361 3 if(uiOCD1DelayCnt > 0) 361 3 if(uiOCD1DelayCnt > 0)
362 3 { 362 3 {
@ -446,7 +446,7 @@ line level source
420 2 ProtectOCD2(); //·Åµç¹ýÁ÷2±£»¤ 420 2 ProtectOCD2(); //·Åµç¹ýÁ÷2±£»¤
421 2 } 421 2 }
422 1 } 422 1 }
C51 COMPILER V9.01 PROTECT 02/08/2025 15:18:21 PAGE 8 C51 COMPILER V9.01 PROTECT 02/11/2025 15:43:04 PAGE 8
423 423
424 424

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10
output/RTC.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 RTC 02/08/2025 15:18:21 PAGE 1 C51 COMPILER V9.01 RTC 02/11/2025 15:43:04 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE RTC C51 COMPILER V9.01, COMPILATION OF MODULE RTC
@ -62,7 +62,7 @@ line level source
51 1 BOOL Result = 0; 51 1 BOOL Result = 0;
52 1 U8 i; 52 1 U8 i;
53 1 53 1
C51 COMPILER V9.01 RTC 02/08/2025 15:18:21 PAGE 2 C51 COMPILER V9.01 RTC 02/11/2025 15:43:04 PAGE 2
54 1 if(!bRTCErr) 54 1 if(!bRTCErr)
55 1 { 55 1 {
@ -126,7 +126,7 @@ line level source
113 1 return Result; 113 1 return Result;
114 1 } 114 1 }
115 115
C51 COMPILER V9.01 RTC 02/08/2025 15:18:21 PAGE 3 C51 COMPILER V9.01 RTC 02/11/2025 15:43:04 PAGE 3
116 /************************************************************************************************* 116 /*************************************************************************************************
117 * 函数名: RTCReadTime 117 * 函数名: RTCReadTime
@ -190,7 +190,7 @@ line level source
172 172
173 /************************************************************************************************* 173 /*************************************************************************************************
174 * 函数名: RTCModifyTime 174 * 函数名: RTCModifyTime
C51 COMPILER V9.01 RTC 02/08/2025 15:18:21 PAGE 4 C51 COMPILER V9.01 RTC 02/11/2025 15:43:04 PAGE 4
175 * 参 数: RTC：将RTC参数传递进来，进行RTC更新 175 * 参 数: RTC：将RTC参数传递进来，进行RTC更新
176 * 返回值: 无 176 * 返回值: 无
@ -254,7 +254,7 @@ line level source
232 2 } 232 2 }
233 1 233 1
234 1 MemoryCopy(rtcbuf, (U8 xdata *)RtcInitVal, 7); //从E2读出的时间或出厂时间先放到RTC时间寄存器 234 1 MemoryCopy(rtcbuf, (U8 xdata *)RtcInitVal, 7); //从E2读出的时间或出厂时间先放到RTC时间寄存器
C51 COMPILER V9.01 RTC 02/08/2025 15:18:21 PAGE 5 C51 COMPILER V9.01 RTC 02/11/2025 15:43:04 PAGE 5
-中存起来 -中存起来
235 1 Result = RTCReadTime((RTC_VAR xdata *)RtcInitVal); 235 1 Result = RTCReadTime((RTC_VAR xdata *)RtcInitVal);

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4
output/STARTUP.lst
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@ -1,4 +1,4 @@
A51 MACRO ASSEMBLER STARTUP 02/08/2025 15:18:21 PAGE 1 A51 MACRO ASSEMBLER STARTUP 02/11/2025 15:43:04 PAGE 1
MACRO ASSEMBLER A51 V8.02 MACRO ASSEMBLER A51 V8.02
@ -48,7 +48,7 @@ LOC OBJ LINE SOURCE
001C 00 37 NOP 001C 00 37 NOP
001D 020000 F 38 LJMP ?C_START 001D 020000 F 38 LJMP ?C_START
39 END 39 END
A51 MACRO ASSEMBLER STARTUP 02/08/2025 15:18:21 PAGE 2 A51 MACRO ASSEMBLER STARTUP 02/11/2025 15:43:04 PAGE 2
SYMBOL TABLE LISTING SYMBOL TABLE LISTING
------ ----- ------- ------ ----- -------

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16
output/TWI.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 TWI 02/08/2025 15:18:21 PAGE 1 C51 COMPILER V9.01 TWI 02/11/2025 15:43:04 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE TWI C51 COMPILER V9.01, COMPILATION OF MODULE TWI
@ -62,7 +62,7 @@ line level source
51 51
52 52
53 /************************************************************************************************* 53 /*************************************************************************************************
C51 COMPILER V9.01 TWI 02/08/2025 15:18:21 PAGE 2 C51 COMPILER V9.01 TWI 02/11/2025 15:43:04 PAGE 2
54 * 函数名: TWICheckStatus 54 * 函数名: TWICheckStatus
55 * 参 数: Status：当前TWI的状态 55 * 参 数: Status：当前TWI的状态
@ -126,7 +126,7 @@ line level source
112 2 HTimeoutChk(); 112 2 HTimeoutChk();
113 2 TWICON = 0x60; //Start 113 2 TWICON = 0x60; //Start
114 2 if((!TWICheckStatus(0x08))&&(!TWICheckStatus(0x10))) 114 2 if((!TWICheckStatus(0x08))&&(!TWICheckStatus(0x10)))
C51 COMPILER V9.01 TWI 02/08/2025 15:18:21 PAGE 3 C51 COMPILER V9.01 TWI 02/11/2025 15:43:04 PAGE 3
115 2 { 115 2 {
116 3 Result = 0; 116 3 Result = 0;
@ -190,7 +190,7 @@ line level source
174 5 goto WrErr; 174 5 goto WrErr;
175 5 } 175 5 }
176 4 WrBuf++; 176 4 WrBuf++;
C51 COMPILER V9.01 TWI 02/08/2025 15:18:21 PAGE 4 C51 COMPILER V9.01 TWI 02/11/2025 15:43:04 PAGE 4
177 4 } 177 4 }
178 3 } 178 3 }
@ -254,7 +254,7 @@ line level source
236 2 { 236 2 {
237 3 Result = 0; 237 3 Result = 0;
238 3 goto RdErr; 238 3 goto RdErr;
C51 COMPILER V9.01 TWI 02/08/2025 15:18:21 PAGE 5 C51 COMPILER V9.01 TWI 02/11/2025 15:43:04 PAGE 5
239 3 } 239 3 }
240 2 240 2
@ -318,7 +318,7 @@ line level source
298 5 TWICheckStatus(0x50); 298 5 TWICheckStatus(0x50);
299 5 } 299 5 }
300 4 *RdBuf = TWIDAT; 300 4 *RdBuf = TWIDAT;
C51 COMPILER V9.01 TWI 02/08/2025 15:18:21 PAGE 6 C51 COMPILER V9.01 TWI 02/11/2025 15:43:04 PAGE 6
301 4 RdBuf++; 301 4 RdBuf++;
302 4 } 302 4 }
@ -382,7 +382,7 @@ line level source
360 // TWIBR = (24000/TWI_FREQ_KHz-16)/2/1; //配置发送波特率，禁止总线超时判断，f=fsys/(16+2*CR*TWI 360 // TWIBR = (24000/TWI_FREQ_KHz-16)/2/1; //配置发送波特率，禁止总线超时判断，f=fsys/(16+2*CR*TWI
-BR)=24MHz/(16+2*16*TWIBR)=**KHz -BR)=24MHz/(16+2*16*TWIBR)=**KHz
361 // TWISTA = 0x06; //16分频 361 // TWISTA = 0x06; //16分频
C51 COMPILER V9.01 TWI 02/08/2025 15:18:21 PAGE 7 C51 COMPILER V9.01 TWI 02/11/2025 15:43:04 PAGE 7
362 // TWICON = 0x40; //ENTWI ，禁止高电平超时 362 // TWICON = 0x40; //ENTWI ，禁止高电平超时
363 // TWTFREE = 0xff; //最大超时配置 363 // TWTFREE = 0xff; //最大超时配置
@ -446,7 +446,7 @@ line level source
419 // TWISTA = 0x00; 419 // TWISTA = 0x00;
420 // break; 420 // break;
421 // 421 //
C51 COMPILER V9.01 TWI 02/08/2025 15:18:21 PAGE 8 C51 COMPILER V9.01 TWI 02/11/2025 15:43:04 PAGE 8
422 // case 2: 422 // case 2:
423 // TWISTA = 0x02; 423 // TWISTA = 0x02;

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14
output/Thermistor.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 THERMISTOR 02/08/2025 15:18:21 PAGE 1 C51 COMPILER V9.01 THERMISTOR 02/11/2025 15:43:04 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE THERMISTOR C51 COMPILER V9.01, COMPILATION OF MODULE THERMISTOR
@ -62,7 +62,7 @@ line level source
6777, //-20 6777, //-20
6447, //-19 6447, //-19
6136, //-18 6136, //-18
C51 COMPILER V9.01 THERMISTOR 02/08/2025 15:18:21 PAGE 2 C51 COMPILER V9.01 THERMISTOR 02/11/2025 15:43:04 PAGE 2
5842, //-17 5842, //-17
5564, //-16 5564, //-16
@ -126,7 +126,7 @@ line level source
543, //42 543, //42
525, //43 525, //43
508, //44 508, //44
C51 COMPILER V9.01 THERMISTOR 02/08/2025 15:18:21 PAGE 3 C51 COMPILER V9.01 THERMISTOR 02/11/2025 15:43:04 PAGE 3
491, //45 491, //45
474, //46 474, //46
@ -190,7 +190,7 @@ line level source
88, //104 88, //104
86, //105 86, //105
83, //106 83, //106
C51 COMPILER V9.01 THERMISTOR 02/08/2025 15:18:21 PAGE 4 C51 COMPILER V9.01 THERMISTOR 02/11/2025 15:43:04 PAGE 4
81, //107 81, //107
79, //108 79, //108
@ -254,7 +254,7 @@ line level source
4512, //-06 4512, //-06
4277, //-05 4277, //-05
4056, //-04 4056, //-04
C51 COMPILER V9.01 THERMISTOR 02/08/2025 15:18:21 PAGE 5 C51 COMPILER V9.01 THERMISTOR 02/11/2025 15:43:04 PAGE 5
3848, //-03 3848, //-03
3652, //-02 3652, //-02
@ -318,7 +318,7 @@ line level source
287, //56 287, //56
276, //57 276, //57
266, //58 266, //58
C51 COMPILER V9.01 THERMISTOR 02/08/2025 15:18:21 PAGE 6 C51 COMPILER V9.01 THERMISTOR 02/11/2025 15:43:04 PAGE 6
257, //59 257, //59
248, //60 248, //60
@ -382,7 +382,7 @@ line level source
#elif RT_TABLE == NTC_SL #elif RT_TABLE == NTC_SL
361 U16 code NTC103AT[NTC103AT_ARRAY_LEN]= 361 U16 code NTC103AT[NTC103AT_ARRAY_LEN]=
362 { //温度为索引-20 362 { //温度为索引-20
C51 COMPILER V9.01 THERMISTOR 02/08/2025 15:18:21 PAGE 7 C51 COMPILER V9.01 THERMISTOR 02/11/2025 15:43:04 PAGE 7
363 // -20℃~100℃共121个温度点，索引0~120 363 // -20℃~100℃共121个温度点，索引0~120
364 9534, 9006, 8510, 8044, 7607, 7196, 6809, 6445, 6103, 5780, //-20~-11 364 9534, 9006, 8510, 8044, 7607, 7196, 6809, 6445, 6103, 5780, //-20~-11

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16
output/TwiIO.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 TWIIO 02/08/2025 15:18:21 PAGE 1 C51 COMPILER V9.01 TWIIO 02/11/2025 15:43:04 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE TWIIO C51 COMPILER V9.01, COMPILATION OF MODULE TWIIO
@ -62,7 +62,7 @@ line level source
{ {
U8 i; U8 i;
for(i=0; i<13; i++) for(i=0; i<13; i++)
C51 COMPILER V9.01 TWIIO 02/08/2025 15:18:21 PAGE 2 C51 COMPILER V9.01 TWIIO 02/11/2025 15:43:04 PAGE 2
{ {
} }
@ -126,7 +126,7 @@ line level source
if(TWI_RD_CLK) if(TWI_RD_CLK)
{ {
result = 1; result = 1;
C51 COMPILER V9.01 TWIIO 02/08/2025 15:18:21 PAGE 3 C51 COMPILER V9.01 TWIIO 02/11/2025 15:43:04 PAGE 3
break; break;
} }
@ -190,7 +190,7 @@ line level source
TWI_DAT_HIGH; TWI_DAT_HIGH;
} }
else else
C51 COMPILER V9.01 TWIIO 02/08/2025 15:18:21 PAGE 4 C51 COMPILER V9.01 TWIIO 02/11/2025 15:43:04 PAGE 4
{ {
TWI_DAT_LOW; TWI_DAT_LOW;
@ -254,7 +254,7 @@ line level source
{ {
TWI_DAT_LOW; TWI_DAT_LOW;
} }
C51 COMPILER V9.01 TWIIO 02/08/2025 15:18:21 PAGE 5 C51 COMPILER V9.01 TWIIO 02/11/2025 15:43:04 PAGE 5
else else
{ {
@ -318,7 +318,7 @@ line level source
if(!TwiSendData(SlaveID, 1)) //Send Slave E2ucID if(!TwiSendData(SlaveID, 1)) //Send Slave E2ucID
{ {
goto WrErr; goto WrErr;
C51 COMPILER V9.01 TWIIO 02/08/2025 15:18:21 PAGE 6 C51 COMPILER V9.01 TWIIO 02/11/2025 15:43:04 PAGE 6
} }
@ -382,7 +382,7 @@ line level source
TempBuf[0] = SlaveID; TempBuf[0] = SlaveID;
TempBuf[1] = (U8)RdAddr; TempBuf[1] = (U8)RdAddr;
// TempBuf[2] = Length; // TempBuf[2] = Length;
C51 COMPILER V9.01 TWIIO 02/08/2025 15:18:21 PAGE 7 C51 COMPILER V9.01 TWIIO 02/11/2025 15:43:04 PAGE 7
TempBuf[2] = SlaveID | 0x01; TempBuf[2] = SlaveID | 0x01;
@ -446,7 +446,7 @@ line level source
*RdBuf = TempBuf[3+i]; *RdBuf = TempBuf[3+i];
RdBuf++; RdBuf++;
} }
C51 COMPILER V9.01 TWIIO 02/08/2025 15:18:21 PAGE 8 C51 COMPILER V9.01 TWIIO 02/11/2025 15:43:04 PAGE 8
} }
} }

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output/Uart.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 UART 02/08/2025 15:18:21 PAGE 1 C51 COMPILER V9.01 UART 02/11/2025 15:43:04 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE UART C51 COMPILER V9.01, COMPILATION OF MODULE UART
@ -62,7 +62,7 @@ line level source
#elif UART0_DEFINE == 15 #elif UART0_DEFINE == 15
UART0CR = 0x14; UART0CR = 0x14;
#elif UART0_DEFINE == 16 #elif UART0_DEFINE == 16
C51 COMPILER V9.01 UART 02/08/2025 15:18:21 PAGE 2 C51 COMPILER V9.01 UART 02/11/2025 15:43:04 PAGE 2
UART0CR = 0x25; UART0CR = 0x25;
#elif UART0_DEFINE == 17 #elif UART0_DEFINE == 17
@ -126,7 +126,7 @@ line level source
110 void InterruptUART0(void) interrupt 4 110 void InterruptUART0(void) interrupt 4
111 { 111 {
112 1 U8 xdata RxData; 112 1 U8 xdata RxData;
C51 COMPILER V9.01 UART 02/08/2025 15:18:21 PAGE 3 C51 COMPILER V9.01 UART 02/11/2025 15:43:04 PAGE 3
113 1 113 1
114 1 _push_(INSCON); 114 1 _push_(INSCON);
@ -190,7 +190,7 @@ line level source
UART1CR = 0x14; UART1CR = 0x14;
#elif UART1_DEFINE == 13 #elif UART1_DEFINE == 13
UART1CR = 0x54; UART1CR = 0x54;
C51 COMPILER V9.01 UART 02/08/2025 15:18:21 PAGE 4 C51 COMPILER V9.01 UART 02/11/2025 15:43:04 PAGE 4
#elif UART1_DEFINE == 14 #elif UART1_DEFINE == 14
UART1CR = 0x24; UART1CR = 0x24;
@ -254,7 +254,7 @@ line level source
* 描 述: UART1接收和发送中断服务程序 * 描 述: UART1接收和发送中断服务程序
InterruptUart1AppRx(RxData)，调用APP层的接收中断处理函数 InterruptUart1AppRx(RxData)，调用APP层的接收中断处理函数
InterruptUart1AppTx()，调用APP层的发送中断处理函数 InterruptUart1AppTx()，调用APP层的发送中断处理函数
C51 COMPILER V9.01 UART 02/08/2025 15:18:21 PAGE 5 C51 COMPILER V9.01 UART 02/11/2025 15:43:04 PAGE 5
*************************************************************************************************/ *************************************************************************************************/
void InterruptUart1(void) interrupt 15 void InterruptUart1(void) interrupt 15
@ -318,7 +318,7 @@ line level source
{ {
U8 xdata RxData; U8 xdata RxData;
C51 COMPILER V9.01 UART 02/08/2025 15:18:21 PAGE 6 C51 COMPILER V9.01 UART 02/11/2025 15:43:04 PAGE 6
_push_(INSCON); _push_(INSCON);
McuBank1Sel(); McuBank1Sel();

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output/UartApp.lst
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@ -1,4 +1,4 @@
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 1 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE UARTAPP C51 COMPILER V9.01, COMPILATION OF MODULE UARTAPP
@ -62,7 +62,7 @@ line level source
50 Others: NULL 50 Others: NULL
51 *******************************************************************************/ 51 *******************************************************************************/
52 U16 code Page1WrRdFuncTable[18]= 52 U16 code Page1WrRdFuncTable[18]=
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 2 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 2
53 { 53 {
54 SYS_PARA_MAP_ADDR, //SubClassID 0x00 54 SYS_PARA_MAP_ADDR, //SubClassID 0x00
@ -126,7 +126,7 @@ line level source
112 1 if(ucUart0Buf[2] == 0x00) //Testing equipment is properly 112 1 if(ucUart0Buf[2] == 0x00) //Testing equipment is properly
113 1 { 113 1 {
114 2 Uart0SendAck(); 114 2 Uart0SendAck();
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 3 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 3
115 2 } 115 2 }
116 1 else 116 1 else
@ -190,7 +190,7 @@ line level source
174 1 if(ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] == CRC8cal(&ucUart0Buf, ucUart0Buf[UART_LENGTH]+3)) 174 1 if(ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] == CRC8cal(&ucUart0Buf, ucUart0Buf[UART_LENGTH]+3))
175 1 { 175 1 {
176 2 for(i=0; i<ucUart0Buf[UART_LENGTH]; i++) 176 2 for(i=0; i<ucUart0Buf[UART_LENGTH]; i++)
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 4 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 4
177 2 { 177 2 {
178 3 McuWDTClear(); 178 3 McuWDTClear();
@ -254,7 +254,7 @@ line level source
if(ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] == CRC8cal(&ucUart2Buf, ucUart2Buf[UART_LENGTH]+3)) if(ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] == CRC8cal(&ucUart2Buf, ucUart2Buf[UART_LENGTH]+3))
{ {
for(i=0; i<ucUart2Buf[UART_LENGTH]; i++) for(i=0; i<ucUart2Buf[UART_LENGTH]; i++)
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 5 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 5
{ {
McuWDTClear(); McuWDTClear();
@ -318,7 +318,7 @@ line level source
for(i=0; i<ucUart1Buf[UART_LENGTH]; i++) for(i=0; i<ucUart1Buf[UART_LENGTH]; i++)
{ {
McuWDTClear(); McuWDTClear();
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 6 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 6
ucUart1Buf[3+i] = *ptr; ucUart1Buf[3+i] = *ptr;
ptr++; ptr++;
@ -382,7 +382,7 @@ line level source
360 2 } 360 2 }
361 1 else 361 1 else
362 1 { 362 1 {
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 7 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 7
363 2 Uart0SendNack(); 363 2 Uart0SendNack();
364 2 } 364 2 }
@ -446,7 +446,7 @@ line level source
} }
else else
{ {
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 8 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 8
Uart2SendNack(); Uart2SendNack();
} }
@ -510,7 +510,7 @@ line level source
{ {
if(ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] == CRC8cal(&ucUart2Buf, ucUart2Buf[UART_LENGTH]+3)) if(ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] == CRC8cal(&ucUart2Buf, ucUart2Buf[UART_LENGTH]+3))
{ {
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 9 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 9
ucSubClassID=ucUart2Buf[3]; ucSubClassID=ucUart2Buf[3];
@ -574,7 +574,7 @@ line level source
546 2 Uart0ReadInfo((U8 xdata *)&Info.uiICTempe[1]); 546 2 Uart0ReadInfo((U8 xdata *)&Info.uiICTempe[1]);
547 2 break; 547 2 break;
548 2 548 2
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 10 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 10
549 2 case FULL_CHG_CAP: 549 2 case FULL_CHG_CAP:
550 2 Uart0ReadInfo((U8 xdata *)&Info.ulFCC); 550 2 Uart0ReadInfo((U8 xdata *)&Info.ulFCC);
@ -638,7 +638,7 @@ line level source
/************************************************************************************************* /*************************************************************************************************
* 函数名: Uart0RdCmdProcess * 函数名: Uart0RdCmdProcess
* 参 数: 无 * 参 数: 无
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 11 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 11
* 返回值: 无 * 返回值: 无
* 描 述: UART读命令处理函数 * 描 述: UART读命令处理函数
@ -702,7 +702,7 @@ line level source
Uart1ReadInfo((U8 xdata *)&Info.uiCycleCount); Uart1ReadInfo((U8 xdata *)&Info.uiCycleCount);
break; break;
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 12 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 12
case PACK_STATUS: case PACK_STATUS:
Uart1ReadInfo((U8 xdata *)&Info.uiPackStatus); Uart1ReadInfo((U8 xdata *)&Info.uiPackStatus);
@ -766,7 +766,7 @@ line level source
case CELL5: case CELL5:
case CELL6: case CELL6:
case CELL7: case CELL7:
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 13 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 13
case CELL8: case CELL8:
case CELL9: case CELL9:
@ -830,7 +830,7 @@ line level source
Uart2ReadInfo((U8 xdata *)&Info.uiManuCommand); Uart2ReadInfo((U8 xdata *)&Info.uiManuCommand);
break; break;
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 14 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 14
default: //read extern EEPRom data default: //read extern EEPRom data
if(ucUart2Buf[UART_LENGTH] >= 128) if(ucUart2Buf[UART_LENGTH] >= 128)
@ -894,7 +894,7 @@ line level source
* 函数名: Uart1CaliCurrent * 函数名: Uart1CaliCurrent
* 参 数: 无 * 参 数: 无
* 返回值: 无 * 返回值: 无
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 15 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 15
* 描 述: UART1通讯发送校准总电压的数据 * 描 述: UART1通讯发送校准总电压的数据
*************************************************************************************************/ *************************************************************************************************/
@ -958,7 +958,7 @@ line level source
918 * 函数名: Uart0CaliCurrent、Uart0CaliCurOffset 918 * 函数名: Uart0CaliCurrent、Uart0CaliCurOffset
919 * 参 数: 无 919 * 参 数: 无
920 * 返回值: 无 920 * 返回值: 无
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 16 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 16
921 * 描 述: UART0通讯发送校准电流采集增益&Offset的数据 921 * 描 述: UART0通讯发送校准电流采集增益&Offset的数据
922 *************************************************************************************************/ 922 *************************************************************************************************/
@ -1022,7 +1022,7 @@ line level source
| ((U32)ucUart1Buf[6]); | ((U32)ucUart1Buf[6]);
if((!AFE.siCurr) || (!slExtCur)) if((!AFE.siCurr) || (!slExtCur))
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 17 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 17
{ {
Uart1SendNack(); Uart1SendNack();
@ -1086,7 +1086,7 @@ line level source
} }
else else
{ {
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 18 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 18
Uart2SendNack(); Uart2SendNack();
} }
@ -1150,7 +1150,7 @@ line level source
1104 1 } 1104 1 }
1105 #endif 1105 #endif
1106 1106
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 19 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 19
1107 #if (UART1_DEFINE != 0) 1107 #if (UART1_DEFINE != 0)
/************************************************************************************************* /*************************************************************************************************
@ -1214,7 +1214,7 @@ line level source
{ {
Uart2SendNack(); Uart2SendNack();
} }
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 20 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 20
} }
@ -1278,7 +1278,7 @@ line level source
if(ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] == CRC8cal(&ucUart1Buf, ucUart1Buf[UART_LENGTH]+3)) if(ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] == CRC8cal(&ucUart1Buf, ucUart1Buf[UART_LENGTH]+3))
{ {
for(i=0; i<7; i++) for(i=0; i<7; i++)
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 21 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 21
{ {
ucExtRTC[i] = ucUart1Buf[3+i]; ucExtRTC[i] = ucUart1Buf[3+i];
@ -1342,7 +1342,7 @@ line level source
1290 2 break; 1290 2 break;
1291 2 case CALI_CUR_COMMAND: 1291 2 case CALI_CUR_COMMAND:
1292 2 Uart0CaliCurrent(); 1292 2 Uart0CaliCurrent();
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 22 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 22
1293 2 break; 1293 2 break;
1294 2 case CALI_VOL_COMMAND: 1294 2 case CALI_VOL_COMMAND:
@ -1406,7 +1406,7 @@ line level source
break; break;
case CALI_CUR_COMMAND: case CALI_CUR_COMMAND:
Uart1CaliCurrent(); Uart1CaliCurrent();
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 23 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 23
break; break;
case CALI_VOL_COMMAND: case CALI_VOL_COMMAND:
@ -1470,7 +1470,7 @@ line level source
break; break;
case CALI_CUR_COMMAND: case CALI_CUR_COMMAND:
Uart2CaliCurrent(); Uart2CaliCurrent();
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 24 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 24
break; break;
case CALI_VOL_COMMAND: case CALI_VOL_COMMAND:
@ -1534,7 +1534,7 @@ line level source
1476 3 } 1476 3 }
1477 2 else 1477 2 else
1478 2 { 1478 2 {
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 25 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 25
1479 3 uiReceCheckSum = 0; //帧头判断正确 1479 3 uiReceCheckSum = 0; //帧头判断正确
1480 3 ucUartErrCode = 0; 1480 3 ucUartErrCode = 0;
@ -1598,7 +1598,7 @@ line level source
1538 3 1538 3
1539 3 Uart0SendAck(); 1539 3 Uart0SendAck();
1540 3 } 1540 3 }
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 26 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 26
1541 2 } 1541 2 }
1542 1 } 1542 1 }
@ -1662,7 +1662,7 @@ line level source
if(ucUartErrCode != 0) //如果有错误代码则不执行命令处理 if(ucUartErrCode != 0) //如果有错误代码则不执行命令处理
{ {
ucUart1Buf[INDEXES] = ucUartErrCode; ucUart1Buf[INDEXES] = ucUartErrCode;
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 27 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 27
} }
else else
@ -1726,7 +1726,7 @@ line level source
} }
if(ucUart2BufPT == (TARGET+1)) //检查ID if(ucUart2BufPT == (TARGET+1)) //检查ID
{ {
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 28 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 28
if(ucUart2Buf[TARGET] != IAP_BMSID) if(ucUart2Buf[TARGET] != IAP_BMSID)
{ {
@ -1790,7 +1790,7 @@ line level source
1724 ucUart0Buf[1]--CMD No. 1724 ucUart0Buf[1]--CMD No.
1725 ucUart0Buf[2]--Offset 1725 ucUart0Buf[2]--Offset
1726 ucUart0Buf[3]--Data Length 1726 ucUart0Buf[3]--Data Length
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 29 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 29
1727 ucUart0Buf[4...]--Data 1727 ucUart0Buf[4...]--Data
1728 *************************************************************************************************/ 1728 *************************************************************************************************/
@ -1854,7 +1854,7 @@ line level source
1785 1785
1786 /************************************************************************************************* 1786 /*************************************************************************************************
1787 * 函数名: InterruptUart0AppTx 1787 * 函数名: InterruptUart0AppTx
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 30 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 30
1788 * 参 数: 无 1788 * 参 数: 无
1789 * 返回值: 无 1789 * 返回值: 无
@ -1918,7 +1918,7 @@ line level source
1845 1 { 1845 1 {
1846 2 ucUart0TimeoutCnt = 0; 1846 2 ucUart0TimeoutCnt = 0;
1847 2 ucUart0BufPT = 0; 1847 2 ucUart0BufPT = 0;
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 31 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 31
1848 2 Uart0RxEn(); //UART允许接收数据 1848 2 Uart0RxEn(); //UART允许接收数据
1849 2 } 1849 2 }
@ -1982,7 +1982,7 @@ line level source
{ {
Uart1WrCmdProcess(); //Write the command peocess Uart1WrCmdProcess(); //Write the command peocess
bUart1WriteFlg = 0; //PC write MCU communiaction over bUart1WriteFlg = 0; //PC write MCU communiaction over
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 32 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 32
ucUart1BufPT = 0; ucUart1BufPT = 0;
} }
@ -2046,7 +2046,7 @@ line level source
ucSleepTimerCnt = 0; //UART正常通讯会清零低功耗计数，UART复位计数 ucSleepTimerCnt = 0; //UART正常通讯会清零低功耗计数，UART复位计数
ucPDTimerCnt = 0; ucPDTimerCnt = 0;
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 33 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 33
ucUart1TimeoutCnt = 0; ucUart1TimeoutCnt = 0;
} }
@ -2110,7 +2110,7 @@ line level source
else if(ucUart2Buf[HEARD1] != 0x5A) //判断是否为IAP/ISP的起始帧 else if(ucUart2Buf[HEARD1] != 0x5A) //判断是否为IAP/ISP的起始帧
{ {
ucUart2BufPT = 0; //如果帧头错误，则复位指针 ucUart2BufPT = 0; //如果帧头错误，则复位指针
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 34 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 34
} }
} }
@ -2174,7 +2174,7 @@ line level source
else if((ucUart2BufPT==0) || (ucUart2BufPT>=ucUart2Buf[UART_LENGTH]+3)) else if((ucUart2BufPT==0) || (ucUart2BufPT>=ucUart2Buf[UART_LENGTH]+3))
{ {
Uart2RxEn(); //UART允许接收数据 Uart2RxEn(); //UART允许接收数据
C51 COMPILER V9.01 UARTAPP 02/08/2025 15:18:20 PAGE 35 C51 COMPILER V9.01 UARTAPP 02/11/2025 15:43:03 PAGE 35
ucUart2BufPT = 0; ucUart2BufPT = 0;
bUart2ReadFlg = 0; bUart2ReadFlg = 0;

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output/UartApp.obj
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