±£»¤ÅäÖÃ
240 #define _E2_AFEProtectConfig 0x74 // U8 xdata AFEProtectConfig
@@ -318,7 +318,7 @@ line level source
286 signed int E2siDfilterCur;
287 unsigned char E2ucLowPowerDeley;
288 unsigned char E2ucChgBKDelay;
- C51 COMPILER V9.01 DATAFLASH 02/13/2025 10:09:51 PAGE 6
+ C51 COMPILER V9.01 DATAFLASH 02/22/2025 15:36:16 PAGE 6
289 unsigned int E2siChgBKCur;
290 unsigned char E2ucRTCBKDelay;
@@ -382,7 +382,7 @@ line level source
348 //·Åµçζȱ£»¤²ÎÊý¿ªÊ¼ SubClassID=0x07 langth=9
349 unsigned int TempOTD;
350 unsigned int TempOTDR;
- C51 COMPILER V9.01 DATAFLASH 02/13/2025 10:09:51 PAGE 7
+ C51 COMPILER V9.01 DATAFLASH 02/22/2025 15:36:16 PAGE 7
351 unsigned int TempUTD;
352 unsigned int TempUTDR;
@@ -446,7 +446,7 @@ line level source
408 _E2_VOC10, //U16 xdata VOC10
409 _E2_VOC20, //U16 xdata VOC20
410 _E2_VOC30, //U16 xdata VOC30
- C51 COMPILER V9.01 DATAFLASH 02/13/2025 10:09:51 PAGE 8
+ C51 COMPILER V9.01 DATAFLASH 02/22/2025 15:36:16 PAGE 8
411 _E2_VOC40, //U16 xdata VOC40
412 _E2_VOC50, //U16 xdata VOC50
@@ -510,7 +510,7 @@ line level source
470
471
472 //·ÅµçPWM²ÎÊýÇø¿ªÊ¼ SubClassID=0x05 langth=5
- C51 COMPILER V9.01 DATAFLASH 02/13/2025 10:09:51 PAGE 9
+ C51 COMPILER V9.01 DATAFLASH 02/22/2025 15:36:16 PAGE 9
473 _E2_DSG1PWMFreq, //U16 xdata DSG1PWMFreq
474 _E2_DSG1PWMRatioL, //U8 xdata DSG1PWMRatioL
@@ -574,7 +574,7 @@ line level source
531 /*********************************************************************************************************
-********/
532 /*********************************************************************************************************
- C51 COMPILER V9.01 DATAFLASH 02/13/2025 10:09:51 PAGE 10
+ C51 COMPILER V9.01 DATAFLASH 02/22/2025 15:36:16 PAGE 10
-********/
533 //ϵͳÐÅÏ¢Çø¿ªÊ¼ SubClassID=0x00 langth=48
@@ -638,7 +638,7 @@ line level source
591 _E2_ucDsgEndDelay,
592 _E2_uiOCDvol, //S32 xdata E2uiOCDvol
593 _E2_ucDelayOCD, //U8 xdata E2ucDelayOCD
- C51 COMPILER V9.01 DATAFLASH 02/13/2025 10:09:51 PAGE 11
+ C51 COMPILER V9.01 DATAFLASH 02/22/2025 15:36:16 PAGE 11
594 _E2_slOCD2vol, //S32 xdata E2slOCD2vol
595 _E2_ucDelayOCD2, //U8 xdata E2ucDelayOCD2
@@ -702,7 +702,7 @@ line level source
653
654 _FLASH_CHECK_DATA, // U16 xdata FlashCheck
655 };
- C51 COMPILER V9.01 DATAFLASH 02/13/2025 10:09:51 PAGE 12
+ C51 COMPILER V9.01 DATAFLASH 02/22/2025 15:36:16 PAGE 12
656
657 //*** <<< end of configuration section >>> ***
diff --git a/output/DataFlash.obj b/output/DataFlash.obj
index 7675950..fb91052 100644
Binary files a/output/DataFlash.obj and b/output/DataFlash.obj differ
diff --git a/output/Eeprom b/output/Eeprom
index 583fd67..6b77f76 100644
Binary files a/output/Eeprom and b/output/Eeprom differ
diff --git a/output/Eeprom.hex b/output/Eeprom.hex
index 43d850b..8d69888 100644
--- a/output/Eeprom.hex
+++ b/output/Eeprom.hex
@@ -8,7 +8,7 @@
:10007000A8023C5A0A280BB802020A8C05FFFFB1FD
:10008000E002FFFF63C002045A0FA01E465A0D672C
:100090000D0309E30A4703035A0D670D0309E30A39
-:1000A000475A0BB8000A0064025A6400000BB8FFFC
+:1000A000475A0BB800320064025A6400000BB8FFD4
:1000B000FFEC78000000000000005A7411305A0A6A
:1000C00022FFA7000400000000005A00000000000A
:1000D0000000000000000000000000000000000020
@@ -40,7 +40,7 @@
:10027000A8023C5A0A280BB802020A8C05FFFFB1FB
:10028000E002FFFF63C002045A0FA01E465A0D672A
:100290000D0309E30A4703035A0D670D0309E30A37
-:1002A000475A0BB8000A0064025A6400000BB8FFFA
+:1002A000475A0BB800320064025A6400000BB8FFD2
:1002B000FFEC78000000000000005A7411305A0A68
:1002C00022FFA7000400000000005A000000000008
:1002D000000000000000000000000000000000001E
diff --git a/output/Eeprom.m51 b/output/Eeprom.m51
index 9711d58..29a1658 100644
--- a/output/Eeprom.m51
+++ b/output/Eeprom.m51
@@ -1,4 +1,4 @@
-BL51 BANKED LINKER/LOCATER V6.22 02/13/2025 10:09:51 PAGE 1
+BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:16 PAGE 1
BL51 BANKED LINKER/LOCATER V6.22, INVOKED BY:
diff --git a/output/Eeprom.plg b/output/Eeprom.plg
index d86c5f6..8b1884e 100644
--- a/output/Eeprom.plg
+++ b/output/Eeprom.plg
@@ -1,9 +1,7 @@
-
-
-
-µVision Build Log
-Project:
-E:\Y\keil\ZDBMS\ZDBMS\MCUCore.uvproj
-Project File Date: 01/23/2025
-
-Output:
+Build target 'EEPROM'
+compiling DataFlash.c...
+linking...
+*** WARNING L10: CANNOT DETERMINE ROOT SEGMENT
+Program Size: data=0.0 xdata=0 code=1024
+creating hex file from ".\output\Eeprom"...
+".\output\Eeprom" - 0 Error(s), 1 Warning(s).
diff --git a/output/ExtE2PRom.lst b/output/ExtE2PRom.lst
index fc9e299..507f271 100644
--- a/output/ExtE2PRom.lst
+++ b/output/ExtE2PRom.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01 EXTE2PROM 02/19/2025 10:42:27 PAGE 1
+C51 COMPILER V9.01 EXTE2PROM 02/22/2025 15:36:21 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE EXTE2PROM
@@ -62,7 +62,7 @@ line level source
49 3 if(++ucE2PTwiRWErrDelayCnt >= TIME_1S_5S)
50 3 {
51 4 bE2PRErr = 1;
- C51 COMPILER V9.01 EXTE2PROM 02/19/2025 10:42:27 PAGE 2
+ C51 COMPILER V9.01 EXTE2PROM 02/22/2025 15:36:21 PAGE 2
52 4 ucE2PTwiRWErrDelayCnt = TIME_1S_5S;
53 4 }
@@ -126,7 +126,7 @@ line level source
111 1 if(!bE2PRErr)
112 1 {
113 2 for(i=0; i<5; i++)
- C51 COMPILER V9.01 EXTE2PROM 02/19/2025 10:42:27 PAGE 3
+ C51 COMPILER V9.01 EXTE2PROM 02/22/2025 15:36:21 PAGE 3
114 2 {
115 3 #ifdef TWI_Hardware_Module
@@ -190,7 +190,7 @@ line level source
173 1
174 1 Result = E2PRomRead(E2PROM_BOOT_ADDR, 8, RdBuf);
175 1
- C51 COMPILER V9.01 EXTE2PROM 02/19/2025 10:42:27 PAGE 4
+ C51 COMPILER V9.01 EXTE2PROM 02/22/2025 15:36:21 PAGE 4
176 1 RdBuf[2] = RdBuf[0]+RdBuf[1];
177 1 RdBuf[6] = RdBuf[4]+RdBuf[5];
@@ -254,7 +254,7 @@ line level source
235 1 WrBuf[5] = WrBuf[1];
236 1 WrBuf[7] = WrBuf[3];
237 1
- C51 COMPILER V9.01 EXTE2PROM 02/19/2025 10:42:27 PAGE 5
+ C51 COMPILER V9.01 EXTE2PROM 02/22/2025 15:36:21 PAGE 5
238 1 E2PRomWrite(E2PROM_BOOT_ADDR, 8, WrBuf);
239 1 }
@@ -318,7 +318,7 @@ line level source
297 2 }
298 1
299 1 E2PRomBKBoot();
- C51 COMPILER V9.01 EXTE2PROM 02/19/2025 10:42:27 PAGE 6
+ C51 COMPILER V9.01 EXTE2PROM 02/22/2025 15:36:21 PAGE 6
300 1 }
301
@@ -382,7 +382,7 @@ line level source
356 * º¯ÊýÃû: UartRdRTC
357 * ²Î Êý: ÎÞ
358 * ·µ»ØÖµ: ÎÞ
- C51 COMPILER V9.01 EXTE2PROM 02/19/2025 10:42:27 PAGE 7
+ C51 COMPILER V9.01 EXTE2PROM 02/22/2025 15:36:21 PAGE 7
359 * Ãè Êö: ¶ÁÈ¡RTCʱ¼ä£ºÃë¡¢·Ö¡¢Ê±¡¢ÈÕ¡¢Ô¡¢Ä꣬²¢·µ»Ø¸øUART
360 *************************************************************************************************/
@@ -446,7 +446,7 @@ line level source
418 2 {
419 3 bE2PErase = 0;
420 3 E2PRomErase();
- C51 COMPILER V9.01 EXTE2PROM 02/19/2025 10:42:27 PAGE 8
+ C51 COMPILER V9.01 EXTE2PROM 02/22/2025 15:36:21 PAGE 8
421 3 }
422 2
@@ -510,7 +510,7 @@ line level source
480 3 }
481 2
482 2 if(bE2PBKDsgEnd)
- C51 COMPILER V9.01 EXTE2PROM 02/19/2025 10:42:27 PAGE 9
+ C51 COMPILER V9.01 EXTE2PROM 02/22/2025 15:36:21 PAGE 9
483 2 {
484 3 bE2PBKDsgEnd = 0;
@@ -574,7 +574,7 @@ line level source
542 3 {
543 4 RTCReadTime(&RTC);
544 4 MemoryCopy((U8 xdata *)&RTC, ucRTCBuf, 7);
- C51 COMPILER V9.01 EXTE2PROM 02/19/2025 10:42:27 PAGE 10
+ C51 COMPILER V9.01 EXTE2PROM 02/22/2025 15:36:21 PAGE 10
545 4 }
546 3
diff --git a/output/ExtE2PRom.obj b/output/ExtE2PRom.obj
index a5c99c4..4a61888 100644
Binary files a/output/ExtE2PRom.obj and b/output/ExtE2PRom.obj differ
diff --git a/output/GasGaugeInter_V4_13.lst b/output/GasGaugeInter_V4_13.lst
index 6d3279c..b86b56f 100644
--- a/output/GasGaugeInter_V4_13.lst
+++ b/output/GasGaugeInter_V4_13.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/19/2025 10:42:28 PAGE 1
+C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/22/2025 15:36:22 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE GASGAUGEINTER_V4_13
@@ -62,7 +62,7 @@ line level source
48 //U32 xdata E2ulCycleThreshold; //Ñ»·´ÎÊý¸üÐÂãÐÖµ£¬±äÁ¿ÀàÐÍ£ºU32 xdata£¨ÊäÈ룩
49 //U32 xdata E2ulCycleThresholdCount;//Ñ»·µçÁ¿¼ÆÊý£¬±äÁ¿ÀàÐÍ£ºU32 xdata£¨ÊäÈë\Êä³ö´æÈëE2£©
50 //U16 xdata E2uiCycleCount; //Ñ»·´ÎÊý£¬±äÁ¿ÀàÐÍ£ºU16 xdata£¨ÊäÈë\Êä³ö´æÈëE2£©
- C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/19/2025 10:42:28 PAGE 2
+ C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/22/2025 15:36:22 PAGE 2
51 //U16 xdata E2uiLastCCount; //ÉϴθüÐÂÈÝÁ¿Ê±µÄÑ»·´ÎÊý £¬±äÁ¿ÀàÐÍ£ºU16 xdata£¨ÊäÈë\Êä³ö´æÈëE2£©
52 //S16 xdata E2siDfilterCur; //ÁãµçÁ÷´°¿Ú£¬±äÁ¿ÀàÐÍ£ºS16 xdata£¨ÊäÈ룩
@@ -126,7 +126,7 @@ line level source
101 U16 data uiCellVminG; //µ±Ç°µçѹ×îµÍµÄµçоµçѹ£¬±äÁ¿ÀàÐÍ£ºU16 data£¨ÊäÈ룩
102 //U8 data ucCellNum; //µçо´®Êý£¬±äÁ¿ÀàÐÍ£ºU8 data£¨ÊäÈ룩
103 //S32 xdata slCadcCurAverage; //ÓÃÓÚ¿âÂ×»ý·ÖµÄƽ¾ùµçÁ÷£¨Ö÷¿Ø³ä·Åµç»Ø·£©£¬±äÁ¿ÀàÐÍ£ºS32 xdata£¨ÊäÈ룩
- C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/19/2025 10:42:28 PAGE 3
+ C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/22/2025 15:36:22 PAGE 3
104 S32 xdata slAdcCur2; //ÓÃÓÚ¿âÂ×»ý·ÖµÄƽ¾ùµçÁ÷£¨¸¨¿Ø·Åµç»Ø·£¬ÈçûÓпÉÒÔºãΪ0£©£¬±äÁ¿ÀàÐÍ£ºS32 xdata£¨ÊäÈ
-룩
@@ -190,7 +190,7 @@ line level source
162 1
163 1 E2ucFccUpdatePercent = 30;
164 1 E2uiChgEndTemp = (15*10 + 2731);
- C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/19/2025 10:42:28 PAGE 4
+ C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/22/2025 15:36:22 PAGE 4
165 1 E2uiDsgEndTemp = (15*10 + 2731);
166 1
@@ -254,7 +254,7 @@ line level source
224 1 EA = eabak;
225 1
226 1 if( bOV )
- C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/19/2025 10:42:28 PAGE 5
+ C51 COMPILER V9.01 GASGAUGEINTER_V4_13 02/22/2025 15:36:22 PAGE 5
227 1 {
228 2 E2ucSOC = 100;
diff --git a/output/GasGaugeInter_V4_13.obj b/output/GasGaugeInter_V4_13.obj
index 2dcd171..6d54ebf 100644
Binary files a/output/GasGaugeInter_V4_13.obj and b/output/GasGaugeInter_V4_13.obj differ
diff --git a/output/Initial.lst b/output/Initial.lst
index f61cf6f..e1ce115 100644
--- a/output/Initial.lst
+++ b/output/Initial.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01 INITIAL 02/19/2025 10:42:26 PAGE 1
+C51 COMPILER V9.01 INITIAL 02/22/2025 15:36:21 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE INITIAL
@@ -62,7 +62,7 @@ line level source
50 2 }
51 1 else if(McuFlashCheckFlg(MCUFLASH_BK2_FLG_ADDR))
52 1 {
- C51 COMPILER V9.01 INITIAL 02/19/2025 10:42:26 PAGE 2
+ C51 COMPILER V9.01 INITIAL 02/22/2025 15:36:21 PAGE 2
53 2 McuFlashRead(MCUFLASH_BK2_ADDR, XRAM_MAP_ADDR, 512);
54 2 McuFlashWrite(MCUFLASH_BK1_ADDR, XRAM_MAP_ADDR); //¸üб¸·ÝÇø1
@@ -126,7 +126,7 @@ line level source
111 1 }
112
113
- C51 COMPILER V9.01 INITIAL 02/19/2025 10:42:26 PAGE 3
+ C51 COMPILER V9.01 INITIAL 02/22/2025 15:36:21 PAGE 3
114 /*************************************************************************************************
115 * º¯ÊýÃû: InitGPIO
@@ -190,7 +190,7 @@ line level source
- IO״̬:P2.[7,6,5,4,3,2,1,0]ÓÐЧ
156 P2.7CR[1], P2.6CR[0], P2.5CR[1], P2.4CR[1], P2.3CR[1], P2.2CR[0], P2.1CR[1], P2.0CR[1], P2CR = 0xB
-B; IO·½Ïò:P2.[7,6,5,4,3,2,1,0]ÓÐЧ,1Êä³ö£¬0ÊäÈë
- C51 COMPILER V9.01 INITIAL 02/19/2025 10:42:26 PAGE 4
+ C51 COMPILER V9.01 INITIAL 02/22/2025 15:36:21 PAGE 4
157 P2.7PC[0], P2.6PC[1], P2.5PC[0], P2.4PC[0], P2.3PC[0], P2.2PC[1], P2.1PC[1], P2.0PC[1], P2PCR = 0x
-46; ÄÚ²¿ÉÏÀ:1¿ªÆô£¬0¹Ø±Õ
@@ -254,7 +254,7 @@ line level source
211 1 #if (UART0_DEFINE == 6)
P0 |= 0xC0;
P0PCR |= 0x40;
- C51 COMPILER V9.01 INITIAL 02/19/2025 10:42:26 PAGE 5
+ C51 COMPILER V9.01 INITIAL 02/22/2025 15:36:21 PAGE 5
#endif
215 1
@@ -318,7 +318,7 @@ line level source
273 1 #if (UART0_DEFINE == 17)
P0 |= 0x80;
P2 |= 0x20;
- C51 COMPILER V9.01 INITIAL 02/19/2025 10:42:26 PAGE 6
+ C51 COMPILER V9.01 INITIAL 02/22/2025 15:36:21 PAGE 6
P0PCR |= 0x80;
#endif
@@ -382,7 +382,7 @@ line level source
P0 |= 0x02;
P2 |= 0x20;
P2PCR |= 0x20;
- C51 COMPILER V9.01 INITIAL 02/19/2025 10:42:26 PAGE 7
+ C51 COMPILER V9.01 INITIAL 02/22/2025 15:36:21 PAGE 7
#endif
339 1
@@ -446,7 +446,7 @@ line level source
397 1 #if (UART1_DEFINE == 9)
P1 |= 0x02;
P2 |= 0x40;
- C51 COMPILER V9.01 INITIAL 02/19/2025 10:42:26 PAGE 8
+ C51 COMPILER V9.01 INITIAL 02/22/2025 15:36:21 PAGE 8
P2PCR |= 0x40;
#endif
@@ -510,7 +510,7 @@ line level source
#endif
460 1
461 1 #if (UART1_DEFINE == 20)
- C51 COMPILER V9.01 INITIAL 02/19/2025 10:42:26 PAGE 9
+ C51 COMPILER V9.01 INITIAL 02/22/2025 15:36:21 PAGE 9
P3 |= 0x10;
P2 |= 0x80;
@@ -574,7 +574,7 @@ line level source
P2 |= 0xC0;
P2PCR |= 0x40;
#endif
- C51 COMPILER V9.01 INITIAL 02/19/2025 10:42:26 PAGE 10
+ C51 COMPILER V9.01 INITIAL 02/22/2025 15:36:21 PAGE 10
524 1
525 1 //UART2Ïà¹ØIOÅäÖ㬵±Ç°demo°å´Ë´®¿Ú×öLEDµÆÏÔʾ¹¦ÄÜ£¬²»Ö§³Ö´®¿ÚͨѶ£¬¹Êdemo°åÅäÖÃΪ²»Ê¹ÄÜuart2´®¿Ú¹¦ÄÜ
@@ -638,7 +638,7 @@ line level source
583 2 {
584 3 bRTCErr = 1; //ÍâÖÃRTCÄ£¿é³ö´í
585 3 }
- C51 COMPILER V9.01 INITIAL 02/19/2025 10:42:26 PAGE 11
+ C51 COMPILER V9.01 INITIAL 02/22/2025 15:36:21 PAGE 11
586 2 }
587 1
diff --git a/output/Initial.obj b/output/Initial.obj
index b73281b..91acffb 100644
Binary files a/output/Initial.obj and b/output/Initial.obj differ
diff --git a/output/Interrupt.lst b/output/Interrupt.lst
index 0869039..78423c5 100644
--- a/output/Interrupt.lst
+++ b/output/Interrupt.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01 INTERRUPT 02/19/2025 10:42:27 PAGE 1
+C51 COMPILER V9.01 INTERRUPT 02/22/2025 15:36:21 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE INTERRUPT
@@ -62,7 +62,7 @@ line level source
50 2 IF45 = 0;
51 2 InterruptINT4App(0x20);
52 2 }
- C51 COMPILER V9.01 INTERRUPT 02/19/2025 10:42:27 PAGE 2
+ C51 COMPILER V9.01 INTERRUPT 02/22/2025 15:36:21 PAGE 2
53 1 if(IF46)
54 1 {
diff --git a/output/Interrupt.obj b/output/Interrupt.obj
index 1e707c7..b2ff0bc 100644
Binary files a/output/Interrupt.obj and b/output/Interrupt.obj differ
diff --git a/output/InterruptApp.lst b/output/InterruptApp.lst
index fb757f9..853b421 100644
--- a/output/InterruptApp.lst
+++ b/output/InterruptApp.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01 INTERRUPTAPP 02/19/2025 10:42:27 PAGE 1
+C51 COMPILER V9.01 INTERRUPTAPP 02/22/2025 15:36:21 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE INTERRUPTAPP
@@ -62,7 +62,7 @@ line level source
50 *************************************************************************************************/
51 void InterruptTimer3App(void)
52 {
- C51 COMPILER V9.01 INTERRUPTAPP 02/19/2025 10:42:27 PAGE 2
+ C51 COMPILER V9.01 INTERRUPTAPP 02/22/2025 15:36:21 PAGE 2
53 1
54 1 bTimer5msFlg = 1; //5ms±ê־ΪԤÁô±êÖ¾
diff --git a/output/InterruptApp.obj b/output/InterruptApp.obj
index a7032c6..9db0ab1 100644
Binary files a/output/InterruptApp.obj and b/output/InterruptApp.obj differ
diff --git a/output/KeyApp.lst b/output/KeyApp.lst
index ce14ee7..bb5eda1 100644
--- a/output/KeyApp.lst
+++ b/output/KeyApp.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01 KEYAPP 02/19/2025 10:42:27 PAGE 1
+C51 COMPILER V9.01 KEYAPP 02/22/2025 15:36:21 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE KEYAPP
@@ -62,7 +62,7 @@ line level source
50 1 {
51 2 bSlowDischarge = 0;
52 2 bMidDischarge = 0;
- C51 COMPILER V9.01 KEYAPP 02/19/2025 10:42:27 PAGE 2
+ C51 COMPILER V9.01 KEYAPP 02/22/2025 15:36:21 PAGE 2
53 2 bFastDischarge = 0;
54 2 }
diff --git a/output/KeyApp.obj b/output/KeyApp.obj
index a91a7a6..576e1f2 100644
Binary files a/output/KeyApp.obj and b/output/KeyApp.obj differ
diff --git a/output/KeyScan.lst b/output/KeyScan.lst
index a75e74c..f545c57 100644
--- a/output/KeyScan.lst
+++ b/output/KeyScan.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01 KEYSCAN 02/19/2025 10:42:27 PAGE 1
+C51 COMPILER V9.01 KEYSCAN 02/22/2025 15:36:22 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE KEYSCAN
@@ -62,7 +62,7 @@ line level source
50 2 else if(!KEY_2_IO_RD)
51 2 {
52 3 ucKeyValueBK = KEYVAL_2; //°´¼ü°´Ïº󣬻ñȡмüÖµ
- C51 COMPILER V9.01 KEYSCAN 02/19/2025 10:42:27 PAGE 2
+ C51 COMPILER V9.01 KEYSCAN 02/22/2025 15:36:22 PAGE 2
53 3 }
54 2 #endif
@@ -126,7 +126,7 @@ line level source
103 4 if(uiKeyValidCnt == KEY_L_TIME) //µ±°´ÏÂʱ¼ä´ïµ½³¤°´Â˲¨Ê±¼äʱ£¬ÈÏΪ´Ë°´¼üΪ³¤°´¼ü
104 4 {
105 5 ucKeyValue = ucKeyOldValue | KEY_STATE_L;
- C51 COMPILER V9.01 KEYSCAN 02/19/2025 10:42:27 PAGE 3
+ C51 COMPILER V9.01 KEYSCAN 02/22/2025 15:36:22 PAGE 3
106 5 bKeyFlg = 1;
107 5 }
diff --git a/output/KeyScan.obj b/output/KeyScan.obj
index 0ecc526..393731c 100644
Binary files a/output/KeyScan.obj and b/output/KeyScan.obj differ
diff --git a/output/Led.lst b/output/Led.lst
index 642be1b..60aa9bd 100644
--- a/output/Led.lst
+++ b/output/Led.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01 LED 02/19/2025 10:42:27 PAGE 1
+C51 COMPILER V9.01 LED 02/22/2025 15:36:21 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE LED
@@ -62,7 +62,7 @@ line level source
51
52
53 /*************************************************************************************************
- C51 COMPILER V9.01 LED 02/19/2025 10:42:27 PAGE 2
+ C51 COMPILER V9.01 LED 02/22/2025 15:36:21 PAGE 2
54 * º¯ÊýÃû: LedAutoOff
55 * ²Î Êý: ÎÞ
@@ -126,7 +126,7 @@ line level source
113 2 if(LedDisNum == 0)
114 2 {
115 3 // LEDAllOff();
- C51 COMPILER V9.01 LED 02/19/2025 10:42:27 PAGE 3
+ C51 COMPILER V9.01 LED 02/22/2025 15:36:21 PAGE 3
116 3 }
117 2 if(LedDisNum == 1)
diff --git a/output/Led.obj b/output/Led.obj
index fa4bfbf..7ce1700 100644
Binary files a/output/Led.obj and b/output/Led.obj differ
diff --git a/output/LowPower.lst b/output/LowPower.lst
index 56393b4..7932948 100644
--- a/output/LowPower.lst
+++ b/output/LowPower.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01 LOWPOWER 02/19/2025 10:42:27 PAGE 1
+C51 COMPILER V9.01 LOWPOWER 02/22/2025 15:36:21 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE LOWPOWER
@@ -62,7 +62,7 @@ line level source
50 2 ucSleepTimerCnt = 0;
51 2 ucPDTimerCnt = 0;
52 2 ucUart0TimeoutCnt = 0;
- C51 COMPILER V9.01 LOWPOWER 02/19/2025 10:42:27 PAGE 2
+ C51 COMPILER V9.01 LOWPOWER 02/22/2025 15:36:21 PAGE 2
53 2 ucUart1TimeoutCnt = 0;
54 2 ucUart2TimeoutCnt = 0;
@@ -126,7 +126,7 @@ line level source
112 1 #if (UART1_DEFINE != 0)
IrqUart1Dis();
#endif
- C51 COMPILER V9.01 LOWPOWER 02/19/2025 10:42:27 PAGE 3
+ C51 COMPILER V9.01 LOWPOWER 02/22/2025 15:36:21 PAGE 3
115 1 #if (UART2_DEFINE != 0)
IrqUart2Dis();
@@ -190,7 +190,7 @@ line level source
170 6 bSleepFlg = 1;
171 6 }
172 5 }
- C51 COMPILER V9.01 LOWPOWER 02/19/2025 10:42:27 PAGE 4
+ C51 COMPILER V9.01 LOWPOWER 02/22/2025 15:36:21 PAGE 4
173 4 else
174 4 {
@@ -254,7 +254,7 @@ MODULE INFORMATION: STATIC OVERLAYABLE
XDATA SIZE = 3 ----
PDATA SIZE = ---- ----
DATA SIZE = ---- ----
- C51 COMPILER V9.01 LOWPOWER 02/19/2025 10:42:27 PAGE 5
+ C51 COMPILER V9.01 LOWPOWER 02/22/2025 15:36:21 PAGE 5
IDATA SIZE = ---- ----
BIT SIZE = 4 ----
diff --git a/output/LowPower.obj b/output/LowPower.obj
index ac30168..8d1030e 100644
Binary files a/output/LowPower.obj and b/output/LowPower.obj differ
diff --git a/output/MCUCore_Load b/output/MCUCore_Load
index 0dfec03..9050e44 100644
Binary files a/output/MCUCore_Load and b/output/MCUCore_Load differ
diff --git a/output/MCUCore_Load.m51 b/output/MCUCore_Load.m51
index b5c9c67..56ef18a 100644
--- a/output/MCUCore_Load.m51
+++ b/output/MCUCore_Load.m51
@@ -1,4 +1,4 @@
-BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 1
+BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 1
BL51 BANKED LINKER/LOCATER V6.22, INVOKED BY:
@@ -59,7 +59,7 @@ INPUT MODULES INCLUDED:
D:\TOOL\KEIL\C51\LIB\C51L.LIB (?C?LSUB)
D:\TOOL\KEIL\C51\LIB\C51L.LIB (?C?LMUL)
D:\TOOL\KEIL\C51\LIB\C51L.LIB (?C?ULDIV)
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 2
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 2
D:\TOOL\KEIL\C51\LIB\C51L.LIB (?C?SLDIV)
@@ -119,7 +119,7 @@ LINK MAP OF MODULE: .\output\MCUCore_Load (MAIN)
IDATA 0030H 000CH UNIT ?ID?GASGAUGEV4_12
003CH 0064H *** GAP ***
IDATA 00A0H 0060H ABSOLUTE
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 3
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 3
@@ -179,7 +179,7 @@ LINK MAP OF MODULE: .\output\MCUCore_Load (MAIN)
XDATA 0090H 0002H ABSOLUTE
XDATA 0092H 0002H ABSOLUTE
XDATA 0094H 0002H ABSOLUTE
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 4
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 4
XDATA 0096H 0001H ABSOLUTE
@@ -239,7 +239,7 @@ LINK MAP OF MODULE: .\output\MCUCore_Load (MAIN)
XDATA 05F5H 0002H UNIT ?XD?MCUFLASH
XDATA 05F7H 0002H UNIT ?XD?GASGAUGEWKUP?GASGAUGEV4_12
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 5
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 5
* * * * * * * C O D E M E M O R Y * * * * * * *
@@ -299,7 +299,7 @@ LINK MAP OF MODULE: .\output\MCUCore_Load (MAIN)
CODE 548EH 008EH UNIT ?PR?LOWPOWERCHECK?LOWPOWER
CODE 551CH 008DH UNIT ?PR?_RTCINITTIME?RTC
CODE 55A9H 008CH UNIT ?PR?_MCUFLASHWRSECTOR?MCUFLASH
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 6
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 6
CODE 5635H 0087H UNIT ?PR?AFEINIT?AFE
@@ -359,7 +359,7 @@ LINK MAP OF MODULE: .\output\MCUCore_Load (MAIN)
CODE 6A1CH 0048H UNIT ?PR?_DELAY1MS?MCULIB
CODE 6A64H 0048H UNIT ?PR?PORPROTECTOV?PORSELFTEST
CODE 6AACH 0048H UNIT ?PR?PORPROTECTUV?PORSELFTEST
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 7
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 7
CODE 6AF4H 0045H UNIT ?PR?CALITS1?CALIBRATE
@@ -419,7 +419,7 @@ LINK MAP OF MODULE: .\output\MCUCore_Load (MAIN)
CODE 740EH 0013H UNIT ?PR?AFELOADCHECKEN?AFE
CODE 7421H 0013H UNIT ?PR?AFELOADCHECKDIS?AFE
CODE 7434H 0013H UNIT ?PR?AFEWDTEN?AFE
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 8
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 8
CODE 7447H 0013H UNIT ?PR?AFEWDTDIS?AFE
@@ -479,7 +479,7 @@ SEGMENT BIT_GROUP DATA_GROUP
?PR?_UART0READINFO?UARTAPP ----- ----- ----- ----- ----- -----
+--> ?PR?_CRC8CAL?TWI
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 9
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 9
@@ -539,7 +539,7 @@ SEGMENT BIT_GROUP DATA_GROUP
+--> ?PR?PROTECTPROCESS?PROTECT
+--> ?PR?PORSELFTEST?PORSELFTEST
+--> ?PR?LOADCHECK?CHARGERLOAD
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 10
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 10
+--> ?PR?CHGERCHECK?CHARGERLOAD
@@ -599,7 +599,7 @@ SEGMENT BIT_GROUP DATA_GROUP
?PR?INITVAR?INITIAL ----- ----- ----- ----- ----- -----
+--> ?PR?_MEMORYSET?MCULIB
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 11
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 11
@@ -659,7 +659,7 @@ SEGMENT BIT_GROUP DATA_GROUP
+--> ?PR?_RTCMODIFYTIME?RTC
?PR?_RTCREAD?RTC 002AH.5 0000H.1 ----- ----- 02E7H 0005H
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 12
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 12
+--> ?PR?_TWIREAD?TWI
@@ -719,7 +719,7 @@ SEGMENT BIT_GROUP DATA_GROUP
+--> ?PR?_AFEWRITEREG?AFE
?PR?CTOCHECKVOL?BALANCE 002AH.3 0000H.1 ----- ----- ----- -----
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 13
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 13
@@ -779,7 +779,7 @@ SEGMENT BIT_GROUP DATA_GROUP
?PR?CHGERCHECK?CHARGERLOAD ----- ----- ----- ----- ----- -----
+--> ?PR?AFECHGERCHECKEN?AFE
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 14
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 14
+--> ?PR?AFERDSTATUS?AFE
@@ -839,7 +839,7 @@ SEGMENT BIT_GROUP DATA_GROUP
+--> ?PR?CALITS1?CALIBRATE
+--> ?PR?CALITS2?CALIBRATE
+--> ?PR?CALIRTCTIME?CALIBRATE
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 15
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 15
@@ -899,7 +899,7 @@ SEGMENT BIT_GROUP DATA_GROUP
+--> ?PR?_MEMORYCOPY?MCULIB
+--> ?PR?_CRC8CAL?TWI
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 16
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 16
?PR?E2PROMBKRTC?EXTE2PROM ----- ----- ----- ----- 02BBH 000AH
@@ -959,7 +959,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:5B7CH LINE# 38
C:5B7CH LINE# 39
C:5B7CH LINE# 42
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 17
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 17
C:5B7FH LINE# 43
@@ -1019,7 +1019,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
D:00E2H PUBLIC P1CR
D:00E3H PUBLIC P2CR
D:00E4H PUBLIC P3CR
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 18
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 18
D:00BAH PUBLIC IENC
@@ -1079,7 +1079,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:52ADH LINE# 70
C:52ADH LINE# 71
C:52B0H LINE# 72
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 19
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 19
C:52B1H LINE# 73
@@ -1139,7 +1139,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:6717H LINE# 569
C:671CH LINE# 570
C:671CH LINE# 571
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 20
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 20
C:671EH LINE# 572
@@ -1199,7 +1199,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
------- ENDPROC _INTERRUPTINT4APP
------- PROC INTERRUPTTIMER3APP
C:71F5H LINE# 51
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 21
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 21
C:71F5H LINE# 52
@@ -1259,7 +1259,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:6D36H LINE# 39
C:6D36H LINE# 40
C:6D39H LINE# 41
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 22
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 22
C:6D39H LINE# 42
@@ -1319,7 +1319,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:613AH LINE# 117
C:613FH LINE# 118
C:613FH LINE# 120
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 23
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 23
C:613FH LINE# 121
@@ -1379,7 +1379,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:5DBDH LINE# 34
C:5DC4H LINE# 35
C:5DC4H LINE# 36
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 24
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 24
C:5DC7H LINE# 37
@@ -1439,7 +1439,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
------- MODULE LOWPOWER
C:0000H SYMBOL _ICE_DUMMY_
D:0080H PUBLIC P0
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 25
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 25
D:0090H PUBLIC P1
@@ -1499,7 +1499,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
------- PROC SYSTEMINTOPD
C:74CCH LINE# 65
C:74CCH LINE# 66
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 26
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 26
C:74CCH LINE# 67
@@ -1559,7 +1559,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:54B9H LINE# 152
C:54BFH LINE# 153
C:54BFH LINE# 154
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 27
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 27
C:54C2H LINE# 155
@@ -1619,7 +1619,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:6D02H LINE# 219
C:6D05H LINE# 220
C:6D05H LINE# 222
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 28
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 28
C:6D08H LINE# 223
@@ -1679,7 +1679,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
B:0029H.4 PUBLIC bISPFlg
C:59B8H PUBLIC _Uart0WriteInfo
X:03FAH PUBLIC ucUart0BufPT
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 29
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 29
X:03FBH PUBLIC ucUart1BufPT
@@ -1739,7 +1739,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:5E7CH LINE# 274
C:5E8EH LINE# 275
C:5E93H LINE# 276
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 30
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 30
C:5E96H LINE# 277
@@ -1799,7 +1799,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:3C4FH LINE# 519
C:3C4FH LINE# 520
C:3C4FH LINE# 521
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 31
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 31
C:3C4FH LINE# 522
@@ -1859,7 +1859,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:3CF8H LINE# 591
C:3CF9H LINE# 592
C:3D00H LINE# 593
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 32
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 32
C:3D00H LINE# 594
@@ -1919,7 +1919,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
------- PROC UART0CALICUROFFSET
C:6EB1H LINE# 950
C:6EB1H LINE# 951
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 33
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 33
C:6EB1H LINE# 952
@@ -1979,7 +1979,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:6413H LINE# 1207
C:641AH LINE# 1208
C:6421H LINE# 1209
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 34
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 34
C:6422H LINE# 1211
@@ -2039,7 +2039,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:50D5H LINE# 1329
C:50D5H LINE# 1330
C:50D5H LINE# 1331
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 35
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 35
C:50D5H LINE# 1332
@@ -2099,7 +2099,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:3A15H LINE# 1519
C:3A15H LINE# 1520
C:3A17H LINE# 1521
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 36
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 36
C:3A1CH LINE# 1522
@@ -2159,7 +2159,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:53BFH LINE# 1766
C:53BFH LINE# 1767
C:53D8H LINE# 1768
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 37
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 37
C:53D8H LINE# 1769
@@ -2219,7 +2219,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
------- ENDPROC INTERRUPTUART0APPTX
------- PROC UART0CHECK
C:7381H LINE# 1842
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 38
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 38
C:7381H LINE# 1843
@@ -2279,7 +2279,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
B:0022H.5 PUBLIC bAFE_SC
B:0025H.0 PUBLIC bCHGMOS
B:0020H.3 PUBLIC bBAL_EN
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 39
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 39
X:001AH PUBLIC E2ulFCC
@@ -2339,7 +2339,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
B:0024H.2 PUBLIC bVDQ
B:0026H.5 PUBLIC bAfeDSG
B:0022H.2 PUBLIC bUTC
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 40
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 40
X:0062H PUBLIC E2uiOVvol
@@ -2399,7 +2399,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
D:00C0H PUBLIC P4
D:0080H PUBLIC P5
X:0204H PUBLIC uiTempeMax
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 41
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 41
B:002BH.1 PUBLIC bCADCFlg
@@ -2459,7 +2459,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:731FH LINE# 54
C:731FH LINE# 55
C:7324H LINE# 56
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 42
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 42
C:7324H LINE# 57
@@ -2519,7 +2519,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
X:02C6H SYMBOL RdBuf
------- DO
B:002AH.4 SYMBOL Result
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 43
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 43
X:02C8H SYMBOL Times
@@ -2579,7 +2579,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:56D1H LINE# 196
C:56D5H LINE# 197
C:56D9H LINE# 198
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 44
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 44
C:56DDH LINE# 199
@@ -2639,7 +2639,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:56BBH LINE# 261
------- ENDPROC AFEINIT
------- PROC AFERDFLG
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 45
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 45
C:6D87H LINE# 272
@@ -2699,7 +2699,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:5F16H LINE# 339
C:5F1BH LINE# 340
C:5F1BH LINE# 341
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 46
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 46
C:5F1DH LINE# 342
@@ -2759,7 +2759,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
------- ENDPROC AFELOADCHECKDIS
------- PROC _AFEBALCTL
X:02BCH SYMBOL BalChTemp
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 47
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 47
C:6D48H LINE# 422
@@ -2819,7 +2819,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:74A6H LINE# 486
C:74A6H LINE# 487
C:74ADH LINE# 488
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 48
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 48
C:74B8H LINE# 489
@@ -2879,7 +2879,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:3E92H LINE# 32
C:3E92H LINE# 33
C:3E92H LINE# 36
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 49
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 49
C:3E9EH LINE# 37
@@ -2939,7 +2939,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:6F48H LINE# 101
C:6F48H LINE# 102
C:6F4AH LINE# 103
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 50
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 50
C:6F4AH LINE# 104
@@ -2999,7 +2999,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:4E03H LINE# 193
C:4E03H LINE# 194
C:4E09H LINE# 195
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 51
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 51
C:4E0BH LINE# 196
@@ -3059,7 +3059,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:73C1H PUBLIC AFEInfoProcess
X:05F2H PUBLIC ucDsgingCheckCnt
B:00A8H.4 PUBLIC ES0
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 52
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 52
C:681EH PUBLIC AfeGetVol
@@ -3119,7 +3119,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
X:02C3H SYMBOL i
B:002AH.3 SYMBOL Result
------- ENDDO
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 53
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 53
C:681EH LINE# 87
@@ -3179,7 +3179,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:4447H LINE# 157
C:4449H LINE# 165
C:4468H LINE# 167
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 54
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 54
C:446AH LINE# 175
@@ -3239,7 +3239,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:40A8H LINE# 281
C:40AAH LINE# 289
C:40C4H LINE# 291
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 55
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 55
C:40C6H LINE# 299
@@ -3299,7 +3299,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:36E9H LINE# 392
C:3707H LINE# 393
C:370FH LINE# 394
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 56
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 56
C:3724H LINE# 396
@@ -3359,7 +3359,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
D:00C0H PUBLIC P4
D:0080H PUBLIC P5
X:05D6H PUBLIC slExtCur
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 57
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 57
C:74F0H PUBLIC CaliCurZero
@@ -3419,7 +3419,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:6B0CH LINE# 81
C:6B30H LINE# 82
C:6B30H LINE# 83
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 58
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 58
C:6B38H LINE# 84
@@ -3479,7 +3479,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:64AFH LINE# 158
C:64AFH LINE# 159
C:64B2H LINE# 160
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 59
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 59
C:64B2H LINE# 162
@@ -3539,7 +3539,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:664BH LINE# 51
C:664EH LINE# 52
C:664EH LINE# 53
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 60
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 60
C:6650H LINE# 54
@@ -3599,7 +3599,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:58C5H PUBLIC E2PRomInit
C:7298H PUBLIC E2PRomTwiCheck
B:00A0H.0 PUBLIC P2_0
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 61
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 61
X:03DDH PUBLIC ucRTCBKTime1
@@ -3659,7 +3659,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:72AFH LINE# 56
C:72AFH LINE# 57
C:72B4H LINE# 58
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 62
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 62
C:72B4H LINE# 59
@@ -3719,7 +3719,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:6044H LINE# 133
C:6046H LINE# 134
------- ENDPROC _E2PROMREAD
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 63
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 63
------- PROC E2PROMERASE
@@ -3779,7 +3779,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:6755H LINE# 210
C:6755H LINE# 211
C:6767H LINE# 212
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 64
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 64
C:676CH LINE# 213
@@ -3839,7 +3839,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:35A6H LINE# 281
C:35B6H LINE# 282
C:35C6H LINE# 283
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 65
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 65
C:35D1H LINE# 284
@@ -3899,7 +3899,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:69D4H LINE# 363
C:69DBH LINE# 364
C:69E8H LINE# 366
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 66
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 66
C:6A07H LINE# 367
@@ -3959,7 +3959,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:4FD4H LINE# 444
C:4FD4H LINE# 445
C:4FD7H LINE# 446
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 67
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 67
C:4FD7H LINE# 447
@@ -4019,7 +4019,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:4610H LINE# 515
C:4612H LINE# 516
C:4612H LINE# 518
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 68
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 68
C:4615H LINE# 519
@@ -4079,7 +4079,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
B:00D8H.0 PUBLIC IF40
C:5B0AH PUBLIC InterruptINT4
B:00D8H.1 PUBLIC IF41
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 69
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 69
B:00D8H.2 PUBLIC IF42
@@ -4139,7 +4139,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:1003H LINE# 74
C:100BH LINE# 76
C:100DH LINE# 78
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 70
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 70
C:1010H LINE# 79
@@ -4199,7 +4199,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:51CDH LINE# 82
C:51D0H LINE# 83
C:51D0H LINE# 84
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 71
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 71
C:51D2H LINE# 85
@@ -4259,7 +4259,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:6F56H PUBLIC _McuFlashWrOneByte
B:002DH.6 PUBLIC bMcuFlashErr
C:53F7H PUBLIC _McuFlashWrite
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 72
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 72
X:05F6H PUBLIC ucMcuFlashWrValid
@@ -4319,7 +4319,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:71E3H LINE# 68
C:71E5H LINE# 69
C:71E5H LINE# 70
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 73
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 73
C:71F2H LINE# 72
@@ -4379,7 +4379,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:5609H LINE# 129
C:5609H LINE# 130
C:560CH LINE# 131
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 74
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 74
C:560DH LINE# 132
@@ -4439,7 +4439,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:543CH LINE# 198
C:543FH LINE# 199
C:5440H LINE# 200
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 75
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 75
C:5441H LINE# 201
@@ -4499,7 +4499,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:4957H LINE# 269
C:4959H LINE# 270
C:4961H LINE# 271
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 76
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 76
C:4969H LINE# 272
@@ -4559,7 +4559,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:73ACH LINE# 336
C:73ACH LINE# 337
C:73AFH LINE# 338
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 77
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 77
C:73AFH LINE# 339
@@ -4619,7 +4619,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
D:0098H PUBLIC SCON
D:0088H PUBLIC TCON
D:00CEH PUBLIC PWM0DL
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 78
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 78
D:00A4H PUBLIC PWM1DL
@@ -4679,7 +4679,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:722DH LINE# 98
C:722EH LINE# 99
C:722FH LINE# 100
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 79
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 79
C:7230H LINE# 102
@@ -4739,7 +4739,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:6A28H LINE# 163
C:6A30H LINE# 164
C:6A30H LINE# 165
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 80
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 80
C:6A34H LINE# 166
@@ -4799,7 +4799,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:7003H LINE# 275
C:7003H LINE# 276
C:7014H LINE# 277
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 81
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 81
C:7019H LINE# 278
@@ -4859,7 +4859,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
D:0080H PUBLIC P5
C:6868H PUBLIC MosStatusCheck
C:7087H PUBLIC MosCtrl
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 82
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 82
B:002EH.3 PUBLIC bCHGMOSBk
@@ -4919,7 +4919,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:0000H SYMBOL _ICE_DUMMY_
D:0080H PUBLIC P0
C:64CAH PUBLIC PorProtectOTC
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 83
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 83
D:0090H PUBLIC P1
@@ -4979,7 +4979,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:64CAH LINE# 72
C:64CAH LINE# 73
C:64CAH LINE# 74
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 84
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 84
C:64CDH LINE# 75
@@ -5039,7 +5039,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:65B6H LINE# 141
------- ENDPROC PORPROTECTOTD
------- PROC PORPROTECTUTD
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 85
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 85
C:65B7H LINE# 150
@@ -5099,7 +5099,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
X:03BDH PUBLIC uiOCD2DelayCnt
D:00B0H PUBLIC P3
D:00C0H PUBLIC P4
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 86
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 86
D:0080H PUBLIC P5
@@ -5159,7 +5159,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:4736H LINE# 63
C:4736H LINE# 64
C:4739H LINE# 65
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 87
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 87
C:4739H LINE# 66
@@ -5219,7 +5219,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:4A51H LINE# 127
C:4A57H LINE# 128
C:4A57H LINE# 129
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 88
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 88
C:4A58H LINE# 130
@@ -5279,7 +5279,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:4B6EH LINE# 196
C:4B74H LINE# 197
C:4B74H LINE# 198
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 89
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 89
C:4B75H LINE# 199
@@ -5339,7 +5339,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:4CA2H LINE# 261
C:4CA2H LINE# 262
C:4CA2H LINE# 263
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 90
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 90
------- ENDPROC PROTECTOTD
@@ -5399,7 +5399,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:62C0H LINE# 332
C:62C0H LINE# 333
C:62C7H LINE# 334
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 91
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 91
C:62C7H LINE# 335
@@ -5459,7 +5459,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:725BH LINE# 407
C:725BH LINE# 408
C:725EH LINE# 409
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 92
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 92
C:725EH LINE# 410
@@ -5519,7 +5519,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
D:00A0H PUBLIC P2
D:00B0H PUBLIC P3
D:00C0H PUBLIC P4
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 93
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 93
D:0080H PUBLIC P5
@@ -5579,7 +5579,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:61B9H LINE# 77
------- ENDPROC _RTCWRITE
------- PROC _RTCREAD
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 94
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 94
X:02E7H SYMBOL RdAddr
@@ -5639,7 +5639,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:327EH LINE# 155
C:328AH LINE# 156
C:329AH LINE# 157
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 95
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 95
C:32AAH LINE# 158
@@ -5699,7 +5699,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:556DH LINE# 225
C:5572H LINE# 226
C:5574H LINE# 227
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 96
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 96
C:5578H LINE# 228
@@ -5759,7 +5759,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
B:002BH.0 SYMBOL Result
D:0004H SYMBOL timeoutcount
------- ENDDO
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 97
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 97
C:715CH LINE# 59
@@ -5819,7 +5819,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:3DC0H LINE# 121
C:3DC3H LINE# 122
C:3DCAH LINE# 123
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 98
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 98
C:3DCAH LINE# 124
@@ -5879,7 +5879,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:3E74H LINE# 183
C:3E77H LINE# 184
C:3E81H LINE# 185
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 99
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 99
C:3E81H LINE# 186
@@ -5939,7 +5939,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:3344H LINE# 246
C:3344H LINE# 247
C:3346H LINE# 248
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 100
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 100
C:3349H LINE# 249
@@ -5999,7 +5999,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:344DH LINE# 321
C:3457H LINE# 322
C:345FH LINE# 323
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 101
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 101
C:345FH LINE# 325
@@ -6059,7 +6059,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:642AH PUBLIC InterruptUART0
D:0086H PUBLIC INSCON
D:009BH PUBLIC SADEN
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 102
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 102
D:009AH PUBLIC SADDR
@@ -6119,7 +6119,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
------- ENDMOD THERMISTOR
------- MODULE TWIIO
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 103
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 103
C:0000H SYMBOL _ICE_DUMMY_
@@ -6179,7 +6179,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
X:0337H PUBLIC Info_ulTempDsgFcc
X:033BH PUBLIC E2ui_CYCLECOUNTA_B
X:033DH PUBLIC E2ui_CYCLECOUNTB_B
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 104
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 104
X:033FH PUBLIC E2uiTempFCC_K1
@@ -6239,7 +6239,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:2AF4H LINE# 124
C:2B00H LINE# 125
C:2B0FH LINE# 126
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 105
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 105
C:2B20H LINE# 127
@@ -6299,7 +6299,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:2CD4H LINE# 196
C:2CDEH LINE# 198
C:2CE5H LINE# 199
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 106
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 106
C:2CEFH LINE# 200
@@ -6359,7 +6359,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:72D2H LINE# 19
C:72DEH LINE# 20
C:72DEH LINE# 21
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 107
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 107
C:72E0H LINE# 22
@@ -6419,7 +6419,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
C:2591H PUBLIC ?C?LADD
------- ENDMOD ?C?LADD
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 108
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 108
------- MODULE ?C?LSUB
@@ -6479,7 +6479,7 @@ SYMBOL TABLE OF MODULE: .\output\MCUCore_Load (MAIN)
------- ENDMOD ?C?LLDIDATA0
------- MODULE ?C?LLDXDATA0
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 109
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 109
C:276AH PUBLIC ?C?LLDXDATA0
@@ -6539,7 +6539,7 @@ AFELOADCHECKEN . . . . . . @0xf7ff
AFERAMCHECK. . . . . . . . @0xf7ff
AFERDFLG . . . . . . . . . @0xf7ff
AFERDSTATUS. . . . . . . . @0xf7ff
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 110
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 110
AFETEMPADCDIS. . . . . . . @0xf7ff
@@ -6599,7 +6599,7 @@ TWIINIT. . . . . . . . . . @0xe000
UART0CALICUROFFSET . . . . @0xf375
UART0CALIRTC . . . . . . . @0xf377
UART0CALITS1 . . . . . . . @0xf377
- BL51 BANKED LINKER/LOCATER V6.22 02/19/2025 10:42:28 PAGE 111
+ BL51 BANKED LINKER/LOCATER V6.22 02/22/2025 15:36:22 PAGE 111
UART0CALITS2 . . . . . . . @0xf377
diff --git a/output/MCUCore_Load.plg b/output/MCUCore_Load.plg
index 1073e8f..d86c5f6 100644
--- a/output/MCUCore_Load.plg
+++ b/output/MCUCore_Load.plg
@@ -7,44 +7,3 @@ E:\Y\keil\ZDBMS\ZDBMS\MCUCore.uvproj
Project File Date: 01/23/2025
Output:
-Build target 'McuFlash_Load'
-compiling Main.c...
-compiling Initial.c...
-compiling InterruptApp.c...
-compiling Led.c...
-compiling KeyApp.c...
-compiling LowPower.c...
-compiling UartApp.c...
-compiling Memory.c...
-compiling AFE.c...
-compiling Balance.c...
-compiling Calculate.c...
-compiling Calibrate.c...
-compiling ChargerLoad.c...
-compiling ExtE2PRom.c...
-compiling Interrupt.c...
-compiling KeyScan.c...
-compiling McuFlash.c...
-compiling McuLib.c...
-CODE_DRV\MCULIB.C(20): warning C280: 'ClkSource': unreferenced local variable
-CODE_DRV\MCULIB.C(84): warning C280: 'SysClock': unreferenced local variable
-compiling MosCtrl.c...
-compiling PorSelfTest.c...
-compiling Protect.c...
-compiling RTC.c...
-compiling TWI.c...
-compiling Uart.c...
-compiling Thermistor.c...
-compiling TwiIO.c...
-assembling STARTUP.A51...
-compiling GasGaugeInter_V4_13.c...
-compiling BootApp.c...
-compiling BootIAP.c...
-linking...
-*** WARNING L15: MULTIPLE CALL TO SEGMENT
- SEGMENT: ?PR?_MCUCLOCKSET?MCULIB
- CALLER1: ?PR?INTERRUPTINT4?INTERRUPT
- CALLER2: ?C_C51STARTUP
-Program Size: data=151.4 xdata=1529 code=30000
-creating hex file from ".\output\MCUCore_Load"...
-".\output\MCUCore_Load" - 0 Error(s), 3 Warning(s).
diff --git a/output/Main.lst b/output/Main.lst
index 7c9a55b..b195b1b 100644
--- a/output/Main.lst
+++ b/output/Main.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01 MAIN 02/19/2025 10:42:26 PAGE 1
+C51 COMPILER V9.01 MAIN 02/22/2025 15:36:21 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE MAIN
@@ -62,7 +62,7 @@ line level source
51 3 ProtectProcess(); //µçѹ¡¢µçÁ÷¡¢Î¶ȱ£»¤
52 3
53 3 PorSelfTest(); //µÚÒ»´ÎÉϵ籣»¤¼ì²â£¨ÑÓʱ½Ï¶Ì£¬Ôݶ¨50mSÒ»´Î¼ì²â£©
- C51 COMPILER V9.01 MAIN 02/19/2025 10:42:26 PAGE 2
+ C51 COMPILER V9.01 MAIN 02/22/2025 15:36:21 PAGE 2
54 3
55 3 LoadCheck(); //¼ì²â¸ºÔØÊÇ·ñÊÍ·Å
@@ -126,7 +126,7 @@ line level source
112 4 }
113 3
114 3 McuFlashWrWaitCheck(); //¼ì²âÊÇ·ñÐèÒª¸üвÎÊýµ½MCU Flash
- C51 COMPILER V9.01 MAIN 02/19/2025 10:42:26 PAGE 3
+ C51 COMPILER V9.01 MAIN 02/22/2025 15:36:21 PAGE 3
115 3
116 3 E2PRomBKCheck(); //±¸·ÝEEPROM
diff --git a/output/Main.obj b/output/Main.obj
index d34d127..96bf20f 100644
Binary files a/output/Main.obj and b/output/Main.obj differ
diff --git a/output/McuFlash.lst b/output/McuFlash.lst
index 6548fbf..9e12cca 100644
--- a/output/McuFlash.lst
+++ b/output/McuFlash.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01 MCUFLASH 02/19/2025 10:42:27 PAGE 1
+C51 COMPILER V9.01 MCUFLASH 02/22/2025 15:36:22 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE MCUFLASH
@@ -62,7 +62,7 @@ line level source
50
51
52 /*************************************************************************************************
- C51 COMPILER V9.01 MCUFLASH 02/19/2025 10:42:27 PAGE 2
+ C51 COMPILER V9.01 MCUFLASH 02/22/2025 15:36:22 PAGE 2
53 * º¯ÊýÃû: McuFlashBlankCheck
54 * ²Î Êý: McuFlashAddr£ºÆðʼµØÖ·
@@ -126,7 +126,7 @@ line level source
112 1
113 1 for(i=0; i>8;
@@ -190,7 +190,7 @@ line level source
174 3.½«XRAMÊý¾ÝдÈë
175 4.УÑéXRAMºÍMCU FlashÇøÊý¾ÝÊÇ·ñÒ»ÖÂ
176 *************************************************************************************************/
- C51 COMPILER V9.01 MCUFLASH 02/19/2025 10:42:27 PAGE 4
+ C51 COMPILER V9.01 MCUFLASH 02/22/2025 15:36:22 PAGE 4
177 BOOL McuFlashWrite(U16 McuFlashAddr, U16 XramAddr)
178 {
@@ -254,7 +254,7 @@ line level source
236
237
238 /*************************************************************************************************
- C51 COMPILER V9.01 MCUFLASH 02/19/2025 10:42:27 PAGE 5
+ C51 COMPILER V9.01 MCUFLASH 02/22/2025 15:36:22 PAGE 5
239 * º¯ÊýÃû: McuFlashProcess
240 * ²Î Êý: ÎÞ
@@ -318,7 +318,7 @@ line level source
298 2 }
299 1 }
300
- C51 COMPILER V9.01 MCUFLASH 02/19/2025 10:42:27 PAGE 6
+ C51 COMPILER V9.01 MCUFLASH 02/22/2025 15:36:22 PAGE 6
301
302 /*************************************************************************************************
@@ -382,7 +382,7 @@ line level source
359 1 McuFlashEn();
360 1 if(CWORD[McuFlashAddr/2] == 0x5AA5)
361 1 {
- C51 COMPILER V9.01 MCUFLASH 02/19/2025 10:42:27 PAGE 7
+ C51 COMPILER V9.01 MCUFLASH 02/22/2025 15:36:22 PAGE 7
362 2 Result = 1;
363 2 }
diff --git a/output/McuFlash.obj b/output/McuFlash.obj
index d28d5c8..843f593 100644
Binary files a/output/McuFlash.obj and b/output/McuFlash.obj differ
diff --git a/output/McuLib.lst b/output/McuLib.lst
index 2998f25..f9502a2 100644
--- a/output/McuLib.lst
+++ b/output/McuLib.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01 MCULIB 02/19/2025 10:42:27 PAGE 1
+C51 COMPILER V9.01 MCULIB 02/22/2025 15:36:22 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE MCULIB
@@ -62,7 +62,7 @@ line level source
49 1 // TempVal = 0x10000 - (U32)128*XmS/256;
50 1 // }
51 1 // }
- C51 COMPILER V9.01 MCULIB 02/19/2025 10:42:27 PAGE 2
+ C51 COMPILER V9.01 MCULIB 02/22/2025 15:36:22 PAGE 2
52 1 // else if(ClkSource == TIM_CLK_24MHz)
53 1 // {
@@ -126,7 +126,7 @@ line level source
109
110 /*************************************************************************************************
111 * º¯ÊýÃû: McuPWM0Set¡¢McuPWM1Set¡¢McuPWM2Set
- C51 COMPILER V9.01 MCULIB 02/19/2025 10:42:27 PAGE 3
+ C51 COMPILER V9.01 MCULIB 02/22/2025 15:36:22 PAGE 3
112 * ²Î Êý: PwmFreq£ºPWMµÄƵÂÊHz£»DutyRatio£ºPWMµÄ¸ßµçƽռ¿Õ±È
113 * ·µ»ØÖµ: ÎÞ
@@ -190,7 +190,7 @@ line level source
168 1 {
169 2 Tcnt = 1670/4;
170 2 }
- C51 COMPILER V9.01 MCULIB 02/19/2025 10:42:27 PAGE 4
+ C51 COMPILER V9.01 MCULIB 02/22/2025 15:36:22 PAGE 4
171 1 else //2MHz
172 1 {
@@ -254,7 +254,7 @@ line level source
230 1 || (E2ucRamCheckFlg9 != RAM_CHECK_DATA)
231 1 || (E2ucRamCheckFlgA != RAM_CHECK_DATA)
232 1 || (E2ucRamCheckFlgB != RAM_CHECK_DATA)
- C51 COMPILER V9.01 MCULIB 02/19/2025 10:42:27 PAGE 5
+ C51 COMPILER V9.01 MCULIB 02/22/2025 15:36:22 PAGE 5
233 1 || (E2uiCheckFlag != 0x5AA5))
234 1 {
@@ -318,7 +318,7 @@ line level source
292 1 PCON |= 0x01;
293 1 _nop_();
294 1 _nop_();
- C51 COMPILER V9.01 MCULIB 02/19/2025 10:42:27 PAGE 6
+ C51 COMPILER V9.01 MCULIB 02/22/2025 15:36:22 PAGE 6
295 1 _nop_();
296 1 _nop_();
diff --git a/output/McuLib.obj b/output/McuLib.obj
index 1ee4a4f..93ca9e3 100644
Binary files a/output/McuLib.obj and b/output/McuLib.obj differ
diff --git a/output/Memory.lst b/output/Memory.lst
index 5893696..73f5fde 100644
--- a/output/Memory.lst
+++ b/output/Memory.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01 MEMORY 02/19/2025 10:42:27 PAGE 1
+C51 COMPILER V9.01 MEMORY 02/22/2025 15:36:21 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE MEMORY
@@ -62,7 +62,7 @@ line level source
50 sbit bOV = uiBatStatus^8;
51 sbit bUV = uiBatStatus^9;
52 sbit bOCC = uiBatStatus^10;
- C51 COMPILER V9.01 MEMORY 02/19/2025 10:42:27 PAGE 2
+ C51 COMPILER V9.01 MEMORY 02/22/2025 15:36:21 PAGE 2
53 sbit bOCD1 = uiBatStatus^11;
54 sbit bOCD2 = uiBatStatus^12;
@@ -126,7 +126,7 @@ line level source
112 U8 xdata E2ucOCCDelay _at_ CHG_PARA_MAP_ADDR+15;
113 U8 xdata E2ucOCCRDelay _at_ CHG_PARA_MAP_ADDR+16;
114 U8 xdata E2ucRamCheckFlg2 _at_ CHG_PARA_MAP_ADDR+17;
- C51 COMPILER V9.01 MEMORY 02/19/2025 10:42:27 PAGE 3
+ C51 COMPILER V9.01 MEMORY 02/22/2025 15:36:21 PAGE 3
115
116 //·Åµç²ÎÊýÇø¿ªÊ¼ SubClassID=0x03 langth=21
@@ -190,7 +190,7 @@ line level source
174 U16 xdata E2uiAFEOVvol _at_ AFE_PARA_MAP_ADDR+1;
175 U8 xdata E2ucRamCheckFlgA _at_ AFE_PARA_MAP_ADDR+3;
176
- C51 COMPILER V9.01 MEMORY 02/19/2025 10:42:27 PAGE 4
+ C51 COMPILER V9.01 MEMORY 02/22/2025 15:36:21 PAGE 4
177 //У׼²ÎÊýÇø¿ªÊ¼ SubClassID=0x0B langth=12
178 U16 xdata E2uiVPackGain _at_ CALI_PARA_MAP_ADDR;
diff --git a/output/Memory.obj b/output/Memory.obj
index 8f1940d..5d5ac28 100644
Binary files a/output/Memory.obj and b/output/Memory.obj differ
diff --git a/output/MosCtrl.lst b/output/MosCtrl.lst
index 414dfbb..db37357 100644
--- a/output/MosCtrl.lst
+++ b/output/MosCtrl.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01 MOSCTRL 02/19/2025 10:42:27 PAGE 1
+C51 COMPILER V9.01 MOSCTRL 02/22/2025 15:36:22 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE MOSCTRL
@@ -62,7 +62,7 @@ line level source
49 2 }
50 1
51 1 if(bOCD1 || bOCD2 || bAFE_SC) //·Åµç¹ýÁ÷ʱ£¬Èç¹ûOCPMÅäÖÃΪ1£¬Ôò¹Ø±Õ³äµçMOS
- C51 COMPILER V9.01 MOSCTRL 02/19/2025 10:42:27 PAGE 2
+ C51 COMPILER V9.01 MOSCTRL 02/22/2025 15:36:22 PAGE 2
52 1 {
53 2 bCHGMOS = 0;
diff --git a/output/MosCtrl.obj b/output/MosCtrl.obj
index 735b214..a33a884 100644
Binary files a/output/MosCtrl.obj and b/output/MosCtrl.obj differ
diff --git a/output/PorSelfTest.lst b/output/PorSelfTest.lst
index 42d2cb8..9893e6d 100644
--- a/output/PorSelfTest.lst
+++ b/output/PorSelfTest.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01 PORSELFTEST 02/19/2025 10:42:28 PAGE 1
+C51 COMPILER V9.01 PORSELFTEST 02/22/2025 15:36:22 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE PORSELFTEST
@@ -62,7 +62,7 @@ line level source
50 2 if(uiCellVmin < E2uiUVvol)
51 2 {
52 3 if(++uiUVDelayCnt >= TIME_50mS_50mS)
- C51 COMPILER V9.01 PORSELFTEST 02/19/2025 10:42:28 PAGE 2
+ C51 COMPILER V9.01 PORSELFTEST 02/22/2025 15:36:22 PAGE 2
53 3 {
54 4 bUV = 1;
@@ -126,7 +126,7 @@ line level source
112 3 uiUTCDelayCnt = 0;
113 3 }
114 2 }
- C51 COMPILER V9.01 PORSELFTEST 02/19/2025 10:42:28 PAGE 3
+ C51 COMPILER V9.01 PORSELFTEST 02/22/2025 15:36:22 PAGE 3
115 1 }
116
@@ -190,7 +190,7 @@ line level source
174 * Ãè Êö: µÚÒ»´ÎÉϵçʱµÄ×Լ죬³ÖÐø100mS£¬Éϵç×Ô¼ì×î¿ìÍê³Éʱ¼äΪ50mS
175 *************************************************************************************************/
176 void PorSelfTest(void)
- C51 COMPILER V9.01 PORSELFTEST 02/19/2025 10:42:28 PAGE 4
+ C51 COMPILER V9.01 PORSELFTEST 02/22/2025 15:36:22 PAGE 4
177 {
178 1 if(bPorSelfTestFlg)
diff --git a/output/PorSelfTest.obj b/output/PorSelfTest.obj
index 346b220..d821a29 100644
Binary files a/output/PorSelfTest.obj and b/output/PorSelfTest.obj differ
diff --git a/output/Protect.lst b/output/Protect.lst
index 9c32426..e0190be 100644
--- a/output/Protect.lst
+++ b/output/Protect.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01 PROTECT 02/19/2025 10:42:28 PAGE 1
+C51 COMPILER V9.01 PROTECT 02/22/2025 15:36:22 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE PROTECT
@@ -62,7 +62,7 @@ line level source
48 4 bOVLock = 0;
49 4 uiOVDelayCnt = 0;
50 4 uiOVRDelayCnt = 0;
- C51 COMPILER V9.01 PROTECT 02/19/2025 10:42:28 PAGE 2
+ C51 COMPILER V9.01 PROTECT 02/22/2025 15:36:22 PAGE 2
51 4 }
52 3 }
@@ -126,7 +126,7 @@ line level source
110 2 }
111 1 else if(!bUVLock)
112 1 {
- C51 COMPILER V9.01 PROTECT 02/19/2025 10:42:28 PAGE 3
+ C51 COMPILER V9.01 PROTECT 02/22/2025 15:36:22 PAGE 3
113 2 if(uiCellVmin > E2uiUVRvol)
114 2 {
@@ -190,7 +190,7 @@ line level source
172 2 else if(uiTempeMax > E2uiTempOTC)
173 2 {
174 3 uiOTCRDelayCnt = 0;
- C51 COMPILER V9.01 PROTECT 02/19/2025 10:42:28 PAGE 4
+ C51 COMPILER V9.01 PROTECT 02/22/2025 15:36:22 PAGE 4
175 3 }
176 2 }
@@ -254,7 +254,7 @@ line level source
234 2 {
235 3 if(++uiOTDDelayCnt >= TEMPE_DELAY_CNT)
236 3 {
- C51 COMPILER V9.01 PROTECT 02/19/2025 10:42:28 PAGE 5
+ C51 COMPILER V9.01 PROTECT 02/22/2025 15:36:22 PAGE 5
237 4 bOTD = 1;
238 4 uiOTDDelayCnt = 0;
@@ -318,7 +318,7 @@ line level source
296 4 bUTD = 0;
297 4 uiUTDDelayCnt = 0;
298 4 uiUTDRDelayCnt = 0;
- C51 COMPILER V9.01 PROTECT 02/19/2025 10:42:28 PAGE 6
+ C51 COMPILER V9.01 PROTECT 02/22/2025 15:36:22 PAGE 6
299 4 }
300 3 }
@@ -382,7 +382,7 @@ line level source
358 3 }
359 2 else if(!bLoadChkingFlg)
360 2 {
- C51 COMPILER V9.01 PROTECT 02/19/2025 10:42:28 PAGE 7
+ C51 COMPILER V9.01 PROTECT 02/22/2025 15:36:22 PAGE 7
361 3 if(uiOCD1DelayCnt > 0)
362 3 {
@@ -446,7 +446,7 @@ line level source
420 2 ProtectOCD2(); //·Åµç¹ýÁ÷2±£»¤
421 2 }
422 1 }
- C51 COMPILER V9.01 PROTECT 02/19/2025 10:42:28 PAGE 8
+ C51 COMPILER V9.01 PROTECT 02/22/2025 15:36:22 PAGE 8
423
424
diff --git a/output/Protect.obj b/output/Protect.obj
index 2ca48c6..daf1762 100644
Binary files a/output/Protect.obj and b/output/Protect.obj differ
diff --git a/output/RTC.lst b/output/RTC.lst
index cc33ee2..2961ddb 100644
--- a/output/RTC.lst
+++ b/output/RTC.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01 RTC 02/19/2025 10:42:28 PAGE 1
+C51 COMPILER V9.01 RTC 02/22/2025 15:36:22 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE RTC
@@ -62,7 +62,7 @@ line level source
51 1 BOOL Result = 0;
52 1 U8 i;
53 1
- C51 COMPILER V9.01 RTC 02/19/2025 10:42:28 PAGE 2
+ C51 COMPILER V9.01 RTC 02/22/2025 15:36:22 PAGE 2
54 1 if(!bRTCErr)
55 1 {
@@ -126,7 +126,7 @@ line level source
113 1 return Result;
114 1 }
115
- C51 COMPILER V9.01 RTC 02/19/2025 10:42:28 PAGE 3
+ C51 COMPILER V9.01 RTC 02/22/2025 15:36:22 PAGE 3
116 /*************************************************************************************************
117 * º¯ÊýÃû: RTCReadTime
@@ -190,7 +190,7 @@ line level source
172
173 /*************************************************************************************************
174 * º¯ÊýÃû: RTCModifyTime
- C51 COMPILER V9.01 RTC 02/19/2025 10:42:28 PAGE 4
+ C51 COMPILER V9.01 RTC 02/22/2025 15:36:22 PAGE 4
175 * ²Î Êý: RTC£º½«RTC²ÎÊý´«µÝ½øÀ´£¬½øÐÐRTC¸üÐÂ
176 * ·µ»ØÖµ: ÎÞ
@@ -254,7 +254,7 @@ line level source
232 2 }
233 1
234 1 MemoryCopy(rtcbuf, (U8 xdata *)RtcInitVal, 7); //´ÓE2¶Á³öµÄʱ¼ä»ò³ö³§Ê±¼äÏȷŵ½RTCʱ¼ä¼Ä´æÆ÷
- C51 COMPILER V9.01 RTC 02/19/2025 10:42:28 PAGE 5
+ C51 COMPILER V9.01 RTC 02/22/2025 15:36:22 PAGE 5
-ÖдæÆðÀ´
235 1 Result = RTCReadTime((RTC_VAR xdata *)RtcInitVal);
diff --git a/output/RTC.obj b/output/RTC.obj
index 003e6d6..2b79d0b 100644
Binary files a/output/RTC.obj and b/output/RTC.obj differ
diff --git a/output/STARTUP.lst b/output/STARTUP.lst
index e9ccf35..60337d1 100644
--- a/output/STARTUP.lst
+++ b/output/STARTUP.lst
@@ -1,4 +1,4 @@
-A51 MACRO ASSEMBLER STARTUP 02/19/2025 10:42:28 PAGE 1
+A51 MACRO ASSEMBLER STARTUP 02/22/2025 15:36:22 PAGE 1
MACRO ASSEMBLER A51 V8.02
@@ -48,7 +48,7 @@ LOC OBJ LINE SOURCE
001C 00 37 NOP
001D 020000 F 38 LJMP ?C_START
39 END
- A51 MACRO ASSEMBLER STARTUP 02/19/2025 10:42:28 PAGE 2
+ A51 MACRO ASSEMBLER STARTUP 02/22/2025 15:36:22 PAGE 2
SYMBOL TABLE LISTING
------ ----- -------
diff --git a/output/STARTUP.obj b/output/STARTUP.obj
index f7cee0e..fa873fc 100644
Binary files a/output/STARTUP.obj and b/output/STARTUP.obj differ
diff --git a/output/TWI.lst b/output/TWI.lst
index 8caadf3..df7b0e8 100644
--- a/output/TWI.lst
+++ b/output/TWI.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01 TWI 02/19/2025 10:42:28 PAGE 1
+C51 COMPILER V9.01 TWI 02/22/2025 15:36:22 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE TWI
@@ -62,7 +62,7 @@ line level source
51
52
53 /*************************************************************************************************
- C51 COMPILER V9.01 TWI 02/19/2025 10:42:28 PAGE 2
+ C51 COMPILER V9.01 TWI 02/22/2025 15:36:22 PAGE 2
54 * º¯ÊýÃû: TWICheckStatus
55 * ²Î Êý: Status£ºµ±Ç°TWIµÄ״̬
@@ -126,7 +126,7 @@ line level source
112 2 HTimeoutChk();
113 2 TWICON = 0x60; //Start
114 2 if((!TWICheckStatus(0x08))&&(!TWICheckStatus(0x10)))
- C51 COMPILER V9.01 TWI 02/19/2025 10:42:28 PAGE 3
+ C51 COMPILER V9.01 TWI 02/22/2025 15:36:22 PAGE 3
115 2 {
116 3 Result = 0;
@@ -190,7 +190,7 @@ line level source
174 5 goto WrErr;
175 5 }
176 4 WrBuf++;
- C51 COMPILER V9.01 TWI 02/19/2025 10:42:28 PAGE 4
+ C51 COMPILER V9.01 TWI 02/22/2025 15:36:22 PAGE 4
177 4 }
178 3 }
@@ -254,7 +254,7 @@ line level source
236 2 {
237 3 Result = 0;
238 3 goto RdErr;
- C51 COMPILER V9.01 TWI 02/19/2025 10:42:28 PAGE 5
+ C51 COMPILER V9.01 TWI 02/22/2025 15:36:22 PAGE 5
239 3 }
240 2
@@ -318,7 +318,7 @@ line level source
298 5 TWICheckStatus(0x50);
299 5 }
300 4 *RdBuf = TWIDAT;
- C51 COMPILER V9.01 TWI 02/19/2025 10:42:28 PAGE 6
+ C51 COMPILER V9.01 TWI 02/22/2025 15:36:22 PAGE 6
301 4 RdBuf++;
302 4 }
@@ -382,7 +382,7 @@ line level source
360 // TWIBR = (24000/TWI_FREQ_KHz-16)/2/1; //ÅäÖ÷¢ËͲ¨ÌØÂÊ£¬½ûÖ¹×ÜÏß³¬Ê±Åжϣ¬f=fsys/(16+2*CR*TWI
-BR)=24MHz/(16+2*16*TWIBR)=**KHz
361 // TWISTA = 0x06; //16·ÖƵ
- C51 COMPILER V9.01 TWI 02/19/2025 10:42:28 PAGE 7
+ C51 COMPILER V9.01 TWI 02/22/2025 15:36:22 PAGE 7
362 // TWICON = 0x40; //ENTWI £¬½ûÖ¹¸ßµçƽ³¬Ê±
363 // TWTFREE = 0xff; //×î´ó³¬Ê±ÅäÖÃ
@@ -446,7 +446,7 @@ line level source
419 // TWISTA = 0x00;
420 // break;
421 //
- C51 COMPILER V9.01 TWI 02/19/2025 10:42:28 PAGE 8
+ C51 COMPILER V9.01 TWI 02/22/2025 15:36:22 PAGE 8
422 // case 2:
423 // TWISTA = 0x02;
diff --git a/output/TWI.obj b/output/TWI.obj
index c89e9d7..673a0b0 100644
Binary files a/output/TWI.obj and b/output/TWI.obj differ
diff --git a/output/Thermistor.lst b/output/Thermistor.lst
index 9bbcd95..0a4e8f7 100644
--- a/output/Thermistor.lst
+++ b/output/Thermistor.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01 THERMISTOR 02/19/2025 10:42:28 PAGE 1
+C51 COMPILER V9.01 THERMISTOR 02/22/2025 15:36:22 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE THERMISTOR
@@ -62,7 +62,7 @@ line level source
6777, //-20
6447, //-19
6136, //-18
- C51 COMPILER V9.01 THERMISTOR 02/19/2025 10:42:28 PAGE 2
+ C51 COMPILER V9.01 THERMISTOR 02/22/2025 15:36:22 PAGE 2
5842, //-17
5564, //-16
@@ -126,7 +126,7 @@ line level source
543, //42
525, //43
508, //44
- C51 COMPILER V9.01 THERMISTOR 02/19/2025 10:42:28 PAGE 3
+ C51 COMPILER V9.01 THERMISTOR 02/22/2025 15:36:22 PAGE 3
491, //45
474, //46
@@ -190,7 +190,7 @@ line level source
88, //104
86, //105
83, //106
- C51 COMPILER V9.01 THERMISTOR 02/19/2025 10:42:28 PAGE 4
+ C51 COMPILER V9.01 THERMISTOR 02/22/2025 15:36:22 PAGE 4
81, //107
79, //108
@@ -254,7 +254,7 @@ line level source
4512, //-06
4277, //-05
4056, //-04
- C51 COMPILER V9.01 THERMISTOR 02/19/2025 10:42:28 PAGE 5
+ C51 COMPILER V9.01 THERMISTOR 02/22/2025 15:36:22 PAGE 5
3848, //-03
3652, //-02
@@ -318,7 +318,7 @@ line level source
287, //56
276, //57
266, //58
- C51 COMPILER V9.01 THERMISTOR 02/19/2025 10:42:28 PAGE 6
+ C51 COMPILER V9.01 THERMISTOR 02/22/2025 15:36:22 PAGE 6
257, //59
248, //60
@@ -382,7 +382,7 @@ line level source
#elif RT_TABLE == NTC_SL
361 U16 code NTC103AT[NTC103AT_ARRAY_LEN]=
362 { //ζÈΪË÷Òý-20
- C51 COMPILER V9.01 THERMISTOR 02/19/2025 10:42:28 PAGE 7
+ C51 COMPILER V9.01 THERMISTOR 02/22/2025 15:36:22 PAGE 7
363 // -20¡æ~100¡æ¹²121¸öζȵ㣬Ë÷Òý0~120
364 9534, 9006, 8510, 8044, 7607, 7196, 6809, 6445, 6103, 5780, //-20~-11
diff --git a/output/Thermistor.obj b/output/Thermistor.obj
index 55822c1..b1f4de1 100644
Binary files a/output/Thermistor.obj and b/output/Thermistor.obj differ
diff --git a/output/TwiIO.lst b/output/TwiIO.lst
index 18244dc..b2a0aab 100644
--- a/output/TwiIO.lst
+++ b/output/TwiIO.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01 TWIIO 02/19/2025 10:42:28 PAGE 1
+C51 COMPILER V9.01 TWIIO 02/22/2025 15:36:22 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE TWIIO
@@ -62,7 +62,7 @@ line level source
{
U8 i;
for(i=0; i<13; i++)
- C51 COMPILER V9.01 TWIIO 02/19/2025 10:42:28 PAGE 2
+ C51 COMPILER V9.01 TWIIO 02/22/2025 15:36:22 PAGE 2
{
}
@@ -126,7 +126,7 @@ line level source
if(TWI_RD_CLK)
{
result = 1;
- C51 COMPILER V9.01 TWIIO 02/19/2025 10:42:28 PAGE 3
+ C51 COMPILER V9.01 TWIIO 02/22/2025 15:36:22 PAGE 3
break;
}
@@ -190,7 +190,7 @@ line level source
TWI_DAT_HIGH;
}
else
- C51 COMPILER V9.01 TWIIO 02/19/2025 10:42:28 PAGE 4
+ C51 COMPILER V9.01 TWIIO 02/22/2025 15:36:22 PAGE 4
{
TWI_DAT_LOW;
@@ -254,7 +254,7 @@ line level source
{
TWI_DAT_LOW;
}
- C51 COMPILER V9.01 TWIIO 02/19/2025 10:42:28 PAGE 5
+ C51 COMPILER V9.01 TWIIO 02/22/2025 15:36:22 PAGE 5
else
{
@@ -318,7 +318,7 @@ line level source
if(!TwiSendData(SlaveID, 1)) //Send Slave E2ucID
{
goto WrErr;
- C51 COMPILER V9.01 TWIIO 02/19/2025 10:42:28 PAGE 6
+ C51 COMPILER V9.01 TWIIO 02/22/2025 15:36:22 PAGE 6
}
@@ -382,7 +382,7 @@ line level source
TempBuf[0] = SlaveID;
TempBuf[1] = (U8)RdAddr;
// TempBuf[2] = Length;
- C51 COMPILER V9.01 TWIIO 02/19/2025 10:42:28 PAGE 7
+ C51 COMPILER V9.01 TWIIO 02/22/2025 15:36:22 PAGE 7
TempBuf[2] = SlaveID | 0x01;
@@ -446,7 +446,7 @@ line level source
*RdBuf = TempBuf[3+i];
RdBuf++;
}
- C51 COMPILER V9.01 TWIIO 02/19/2025 10:42:28 PAGE 8
+ C51 COMPILER V9.01 TWIIO 02/22/2025 15:36:22 PAGE 8
}
}
diff --git a/output/TwiIO.obj b/output/TwiIO.obj
index b72994e..7b350c0 100644
Binary files a/output/TwiIO.obj and b/output/TwiIO.obj differ
diff --git a/output/Uart.lst b/output/Uart.lst
index edaeb68..05a20cd 100644
--- a/output/Uart.lst
+++ b/output/Uart.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01 UART 02/19/2025 10:42:28 PAGE 1
+C51 COMPILER V9.01 UART 02/22/2025 15:36:22 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE UART
@@ -62,7 +62,7 @@ line level source
#elif UART0_DEFINE == 15
UART0CR = 0x14;
#elif UART0_DEFINE == 16
- C51 COMPILER V9.01 UART 02/19/2025 10:42:28 PAGE 2
+ C51 COMPILER V9.01 UART 02/22/2025 15:36:22 PAGE 2
UART0CR = 0x25;
#elif UART0_DEFINE == 17
@@ -126,7 +126,7 @@ line level source
110 void InterruptUART0(void) interrupt 4
111 {
112 1 U8 xdata RxData;
- C51 COMPILER V9.01 UART 02/19/2025 10:42:28 PAGE 3
+ C51 COMPILER V9.01 UART 02/22/2025 15:36:22 PAGE 3
113 1
114 1 _push_(INSCON);
@@ -190,7 +190,7 @@ line level source
UART1CR = 0x14;
#elif UART1_DEFINE == 13
UART1CR = 0x54;
- C51 COMPILER V9.01 UART 02/19/2025 10:42:28 PAGE 4
+ C51 COMPILER V9.01 UART 02/22/2025 15:36:22 PAGE 4
#elif UART1_DEFINE == 14
UART1CR = 0x24;
@@ -254,7 +254,7 @@ line level source
* Ãè Êö: UART1½ÓÊպͷ¢ËÍÖжϷþÎñ³ÌÐò
InterruptUart1AppRx(RxData)£¬µ÷ÓÃAPP²ãµÄ½ÓÊÕÖжϴ¦Àíº¯Êý
InterruptUart1AppTx()£¬µ÷ÓÃAPP²ãµÄ·¢ËÍÖжϴ¦Àíº¯Êý
- C51 COMPILER V9.01 UART 02/19/2025 10:42:28 PAGE 5
+ C51 COMPILER V9.01 UART 02/22/2025 15:36:22 PAGE 5
*************************************************************************************************/
void InterruptUart1(void) interrupt 15
@@ -318,7 +318,7 @@ line level source
{
U8 xdata RxData;
- C51 COMPILER V9.01 UART 02/19/2025 10:42:28 PAGE 6
+ C51 COMPILER V9.01 UART 02/22/2025 15:36:22 PAGE 6
_push_(INSCON);
McuBank1Sel();
diff --git a/output/Uart.obj b/output/Uart.obj
index 005b64e..f2f0393 100644
Binary files a/output/Uart.obj and b/output/Uart.obj differ
diff --git a/output/UartApp.lst b/output/UartApp.lst
index c5a654b..92a4ff3 100644
--- a/output/UartApp.lst
+++ b/output/UartApp.lst
@@ -1,4 +1,4 @@
-C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 1
+C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE UARTAPP
@@ -62,7 +62,7 @@ line level source
50 Others: NULL
51 *******************************************************************************/
52 U16 code Page1WrRdFuncTable[18]=
- C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 2
+ C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 2
53 {
54 SYS_PARA_MAP_ADDR, //SubClassID 0x00
@@ -126,7 +126,7 @@ line level source
112 1 if(ucUart0Buf[2] == 0x00) //Testing equipment is properly
113 1 {
114 2 Uart0SendAck();
- C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 3
+ C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 3
115 2 }
116 1 else
@@ -190,7 +190,7 @@ line level source
174 1 if(ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] == CRC8cal(&ucUart0Buf, ucUart0Buf[UART_LENGTH]+3))
175 1 {
176 2 for(i=0; i= 128)
@@ -894,7 +894,7 @@ line level source
* º¯ÊýÃû: Uart1CaliCurrent
* ²Î Êý: ÎÞ
* ·µ»ØÖµ: ÎÞ
- C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 15
+ C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 15
* Ãè Êö: UART1ͨѶ·¢ËÍУ׼×ܵçѹµÄÊý¾Ý
*************************************************************************************************/
@@ -958,7 +958,7 @@ line level source
918 * º¯ÊýÃû: Uart0CaliCurrent¡¢Uart0CaliCurOffset
919 * ²Î Êý: ÎÞ
920 * ·µ»ØÖµ: ÎÞ
- C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 16
+ C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 16
921 * Ãè Êö: UART0ͨѶ·¢ËÍУ׼µçÁ÷²É¼¯ÔöÒæ&OffsetµÄÊý¾Ý
922 *************************************************************************************************/
@@ -1022,7 +1022,7 @@ line level source
| ((U32)ucUart1Buf[6]);
if((!AFE.siCurr) || (!slExtCur))
- C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 17
+ C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 17
{
Uart1SendNack();
@@ -1086,7 +1086,7 @@ line level source
}
else
{
- C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 18
+ C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 18
Uart2SendNack();
}
@@ -1150,7 +1150,7 @@ line level source
1104 1 }
1105 #endif
1106
- C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 19
+ C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 19
1107 #if (UART1_DEFINE != 0)
/*************************************************************************************************
@@ -1214,7 +1214,7 @@ line level source
{
Uart2SendNack();
}
- C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 20
+ C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 20
}
@@ -1278,7 +1278,7 @@ line level source
if(ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] == CRC8cal(&ucUart1Buf, ucUart1Buf[UART_LENGTH]+3))
{
for(i=0; i<7; i++)
- C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 21
+ C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 21
{
ucExtRTC[i] = ucUart1Buf[3+i];
@@ -1342,7 +1342,7 @@ line level source
1290 2 break;
1291 2 case CALI_CUR_COMMAND:
1292 2 Uart0CaliCurrent();
- C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 22
+ C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 22
1293 2 break;
1294 2 case CALI_VOL_COMMAND:
@@ -1406,7 +1406,7 @@ line level source
break;
case CALI_CUR_COMMAND:
Uart1CaliCurrent();
- C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 23
+ C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 23
break;
case CALI_VOL_COMMAND:
@@ -1470,7 +1470,7 @@ line level source
break;
case CALI_CUR_COMMAND:
Uart2CaliCurrent();
- C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 24
+ C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 24
break;
case CALI_VOL_COMMAND:
@@ -1534,7 +1534,7 @@ line level source
1476 3 }
1477 2 else
1478 2 {
- C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 25
+ C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 25
1479 3 uiReceCheckSum = 0; //Ö¡Í·ÅжÏÕýÈ·
1480 3 ucUartErrCode = 0;
@@ -1598,7 +1598,7 @@ line level source
1538 3
1539 3 Uart0SendAck();
1540 3 }
- C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 26
+ C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 26
1541 2 }
1542 1 }
@@ -1662,7 +1662,7 @@ line level source
if(ucUartErrCode != 0) //Èç¹ûÓдíÎó´úÂëÔò²»Ö´ÐÐÃüÁî´¦Àí
{
ucUart1Buf[INDEXES] = ucUartErrCode;
- C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 27
+ C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 27
}
else
@@ -1726,7 +1726,7 @@ line level source
}
if(ucUart2BufPT == (TARGET+1)) //¼ì²éID
{
- C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 28
+ C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 28
if(ucUart2Buf[TARGET] != IAP_BMSID)
{
@@ -1790,7 +1790,7 @@ line level source
1724 ucUart0Buf[1]--CMD No.
1725 ucUart0Buf[2]--Offset
1726 ucUart0Buf[3]--Data Length
- C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 29
+ C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 29
1727 ucUart0Buf[4...]--Data
1728 *************************************************************************************************/
@@ -1854,7 +1854,7 @@ line level source
1785
1786 /*************************************************************************************************
1787 * º¯ÊýÃû: InterruptUart0AppTx
- C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 30
+ C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 30
1788 * ²Î Êý: ÎÞ
1789 * ·µ»ØÖµ: ÎÞ
@@ -1918,7 +1918,7 @@ line level source
1845 1 {
1846 2 ucUart0TimeoutCnt = 0;
1847 2 ucUart0BufPT = 0;
- C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 31
+ C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 31
1848 2 Uart0RxEn(); //UARTÔÊÐí½ÓÊÕÊý¾Ý
1849 2 }
@@ -1982,7 +1982,7 @@ line level source
{
Uart1WrCmdProcess(); //Write the command peocess
bUart1WriteFlg = 0; //PC write MCU communiaction over
- C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 32
+ C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 32
ucUart1BufPT = 0;
}
@@ -2046,7 +2046,7 @@ line level source
ucSleepTimerCnt = 0; //UARTÕý³£Í¨Ñ¶»áÇåÁãµÍ¹¦ºÄ¼ÆÊý£¬UART¸´Î»¼ÆÊý
ucPDTimerCnt = 0;
- C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 33
+ C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 33
ucUart1TimeoutCnt = 0;
}
@@ -2110,7 +2110,7 @@ line level source
else if(ucUart2Buf[HEARD1] != 0x5A) //ÅжÏÊÇ·ñΪIAP/ISPµÄÆðʼ֡
{
ucUart2BufPT = 0; //Èç¹ûÖ¡Í·´íÎó£¬Ôò¸´Î»Ö¸Õë
- C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 34
+ C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 34
}
}
@@ -2174,7 +2174,7 @@ line level source
else if((ucUart2BufPT==0) || (ucUart2BufPT>=ucUart2Buf[UART_LENGTH]+3))
{
Uart2RxEn(); //UARTÔÊÐí½ÓÊÕÊý¾Ý
- C51 COMPILER V9.01 UARTAPP 02/19/2025 10:42:27 PAGE 35
+ C51 COMPILER V9.01 UARTAPP 02/22/2025 15:36:21 PAGE 35
ucUart2BufPT = 0;
bUart2ReadFlg = 0;
diff --git a/output/UartApp.obj b/output/UartApp.obj
index ee0c88a..7a5ee3d 100644
Binary files a/output/UartApp.obj and b/output/UartApp.obj differ