721 lines
30 KiB
Plaintext
721 lines
30 KiB
Plaintext
C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 1
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C51 COMPILER V9.01, COMPILATION OF MODULE SH_IEC60730B_8051F_PORTING
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OBJECT MODULE PLACED IN .\output\sh_iec60730b_8051f_porting.obj
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COMPILER INVOKED BY: C:\Keil_v5\C51\BIN\C51.EXE code_classb\iec60730_proc\sh_iec60730b_8051f_porting.c LARGE OPTIMIZE(7,
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-SIZE) REGFILE(.\output\McuFlash_ISP.ORC) BROWSE INTVECTOR(0X1000) INCDIR(.\header_app;.\header_drv;.\code_gasguage) DEBU
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-G OBJECTEXTEND PRINT(.\output\sh_iec60730b_8051f_porting.lst) OBJECT(.\output\sh_iec60730b_8051f_porting.obj)
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line level source
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1 /*
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2 * IEC60730 Class B TEST PROCESS for SINOWEALTH 8051 based ICs.
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3 * File: sh_iec60730b_8051f_testproc.h
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4 * Version: 1.0
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5 * Author: Robin.zhang Chaoming.luo
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6 * Date: 04/21/2023
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7 * SINOWEALTH IS SUPPLYING THIS SOFTWARE FOR USE EXCLUSIVELY ON SINOWEALTH'S
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8 * MICROCONTROLLER PRODUCTS. IT IS PROTECTED UNDER APPLICABLE COPYRIGHT LAWS.
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9 * THIS SOFTWARE IS FOR GUIDANCE IN ORDER TO SAVE TIME. AS A RESULT, SINOWEALTH
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10 * SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES
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11 * WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF SUCH FIRMWARE AND/OR
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12 * THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN
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13 * CONNECTION WITH THEIR PRODUCTS.
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14 *
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15 */
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16
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17 #include "sh_iec60730b_8051f_testproc.h"
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*** WARNING C318 IN LINE 17 OF code_classb\iec60730_proc\sh_iec60730b_8051f_porting.c: can't open file 'sh_iec60730b_805
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-1f_testproc.h'
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18 #include "main.h"
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19
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20
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21 #if SH_CHK_DIO_TEST_EN == 1
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*** WARNING C322 IN LINE 21 OF code_classb\iec60730_proc\sh_iec60730b_8051f_porting.c: unknown identifier
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/*******************************************************************************
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*
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* @brief This function is used for read GPIO port value
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*
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* @param pin: GPIO ID
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*
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* @return GPIO Value
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*
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******************************************************************************/
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SHT_U8 sh_8051f_dio_read_port_val(SHT_GPIO_ID pin)
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{
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SHT_U8 readV;
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switch(pin&0xF0)
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{
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case 0x00:
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readV = P0;
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break;
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case 0x10:
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readV = P1;
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break;
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case 0x20:
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readV = P2;
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break;
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case 0x30:
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readV = P3;
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break;
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case 0x40:
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readV = P4;
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break;
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C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 2
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case 0x50:
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INSCON = 0x40; //SFR Bank1 selected
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readV = P5;
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INSCON = 0x00; //SFR Bank0 selected
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break;
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}
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return readV;
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}
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/*******************************************************************************
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*
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* @brief This function is used for read GPIO port mode control register(CR)
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*
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* @param pin: GPIO ID
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*
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* @return GPIO mode control register value
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*
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******************************************************************************/
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SHT_U8 sh_8051f_dio_read_port_cr(SHT_GPIO_ID pin)
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{
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SHT_U8 readV;
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switch(pin&0xF0)
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{
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case 0x00:
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readV = P0CR;
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break;
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case 0x10:
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readV = P1CR;
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break;
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case 0x20:
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readV = P2CR;
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break;
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case 0x30:
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readV = P3CR;
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break;
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case 0x40:
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readV = P4CR;
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break;
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case 0x50:
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INSCON = 0x40; //SFR Bank1 selected
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readV = P5CR;
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INSCON = 0x00; //SFR Bank0 selected
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break;
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}
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return readV;
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}
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/*******************************************************************************
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*
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* @brief This function is used for read GPIO port pull control register(PCR)
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*
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* @param pin: GPIO ID
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*
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* @return GPIO pull control register value
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*
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******************************************************************************/
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SHT_U8 sh_8051f_dio_read_port_pcr(SHT_GPIO_ID pin)
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{
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SHT_U8 readV;
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switch(pin&0xF0)
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{
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case 0x00:
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readV = P0PCR;
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break;
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C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 3
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case 0x10:
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readV = P1PCR;
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break;
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case 0x20:
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readV = P2PCR;
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break;
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case 0x30:
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readV = P3PCR;
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break;
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case 0x40:
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readV = P4PCR;
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break;
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case 0x50:
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INSCON = 0x40; //SFR Bank1 selected
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readV = P5PCR;
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INSCON = 0x00; //SFR Bank0 selected
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break;
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}
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return readV;
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}
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/*******************************************************************************
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*
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* @brief This function is used for write GPIO pin value
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*
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* @param pin: GPIO ID
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* pinVal: SH_DIO_PINV_0 or SH_DIO_PINV_1
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*
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* @return void
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*
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******************************************************************************/
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void sh_8051f_dio_write_pin(SHT_GPIO_ID pin,SHT_BOOL pinVal)
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{
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SHT_U8 readV;
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readV = 1;
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readV <<= (pin&0xF);
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if(pinVal == SH_DIO_PINV_1)
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{
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switch(pin&0xF0)
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{
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case 0x00:
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P0 |= readV;
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break;
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case 0x10:
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P1 |= readV;
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break;
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case 0x20:
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P2 |= readV;
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break;
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case 0x30:
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P3 |= readV;
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break;
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case 0x40:
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P4 |= readV;
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break;
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case 0x50:
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INSCON = 0x40; //SFR Bank1 selected
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P5 |= readV;
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INSCON = 0x00; //SFR Bank0 selected
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break;
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}
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}
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else
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C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 4
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{
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readV =~readV;
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switch(pin&0xF0)
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{
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case 0x00:
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P0 &= readV;
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break;
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case 0x10:
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P1 &= readV;
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break;
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case 0x20:
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P2 &= readV;
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break;
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case 0x30:
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P3 &= readV;
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break;
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case 0x40:
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P4 &= readV;
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break;
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case 0x50:
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INSCON = 0x40; //SFR Bank1 selected
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P5 &= readV;
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INSCON = 0x00; //SFR Bank0 selected
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break;
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}
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}
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}
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/*******************************************************************************
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*
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* @brief This function is used for write GPIO port value
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*
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* @param pin: GPIO ID
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* writerv: value of all 8 pins
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*
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* @return void
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*
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******************************************************************************/
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void sh_8051f_dio_write_port_val(SHT_GPIO_ID pin,SHT_U8 writev)
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{
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switch(pin&0xF0)
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{
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case 0x00:
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P0 = writev;
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break;
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case 0x10:
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P1 = writev;
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break;
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case 0x20:
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P2 = writev;
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break;
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case 0x30:
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P3 = writev;
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break;
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case 0x40:
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P4 = writev;
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break;
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case 0x50:
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INSCON = 0x40; //SFR Bank1 selected
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P5 = writev;
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INSCON = 0x00; //SFR Bank0 selected
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break;
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}
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C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 5
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}
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/*******************************************************************************
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*
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* @brief This function is used for write GPIO mode control register (CR)
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*
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* @param pin: GPIO ID
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* writerv: value of mode control register
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*
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* @return void
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*
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******************************************************************************/
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void sh_8051f_dio_write_port_cr(SHT_GPIO_ID pin,SHT_U8 writev)
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{
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switch(pin&0xF0)
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{
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case 0x00:
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P0CR = writev;
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break;
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case 0x10:
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P1CR = writev;
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break;
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case 0x20:
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P2CR = writev;
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break;
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case 0x30:
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P3CR = writev;
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break;
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case 0x40:
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P4CR = writev;
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break;
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case 0x50:
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INSCON = 0x40; //SFR Bank1 selected
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P5CR = writev;
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INSCON = 0x00; //SFR Bank0 selected
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break;
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}
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}
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/*******************************************************************************
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*
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* @brief This function is used for write GPIO pull control register(PCR)
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*
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* @param pin: GPIO ID
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* writerv: value of pull control register
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*
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* @return void
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*
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******************************************************************************/
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void sh_8051f_dio_write_port_pcr(SHT_GPIO_ID pin,SHT_U8 writev)
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{
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switch(pin&0xF0)
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{
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case 0x00:
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P0PCR = writev;
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break;
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case 0x10:
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P1PCR = writev;
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break;
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case 0x20:
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P2PCR = writev;
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break;
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case 0x30:
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P3PCR = writev;
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C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 6
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break;
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case 0x40:
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P4PCR = writev;
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break;
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case 0x50:
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INSCON = 0x40; //SFR Bank1 selected
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P5PCR = writev;
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INSCON = 0x00; //SFR Bank0 selected
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break;
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}
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}
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/* config tested pins */
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static SHT_IEC60730B_DIO_TEST __iec60730b_dio_pin_out0 = {OUTPUT_PORT,0,0,0}; //P4_3 : output
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static SHT_IEC60730B_DIO_TEST __iec60730b_dio_pin_in0 = {INPUT_PORT,0,0,0}; //P4_2 : check input
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/*******************************************************************************
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*
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* @brief This function is used for Digital IO test
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*
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* @param void
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*
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* @return SH_CHK_PASS - digital IO tested correct
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* SH_CHK_FAIL_DIO - digital IO failed
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******************************************************************************/
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SHT_RESULT sh_8051f_dio_test(void)
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{
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SHT_RESULT checkResult = SH_CHK_PASS;
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checkResult = sh_8051f_dio_short_to_adjacent_set(&__iec60730b_dio_pin_in0,
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&__iec60730b_dio_pin_out0,
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SH_DIO_BACKUP_ENABLE);
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if( checkResult != SH_CHK_PASS)
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return checkResult;
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checkResult = sh_8051f_dio_input(__iec60730b_dio_pin_in0.gpio,SH_DIO_PINV_1);
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if( checkResult != SH_CHK_PASS)
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return checkResult;
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checkResult = sh_8051f_dio_short_to_supply_set(&__iec60730b_dio_pin_in0,SH_DIO_BACKUP_DISABLE);
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if( checkResult != SH_CHK_PASS)
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return checkResult;
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checkResult = sh_8051f_dio_input_ext(&__iec60730b_dio_pin_in0,&__iec60730b_dio_pin_out0,SH_DIO_PINV_1,
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-SH_DIO_BACKUP_ENABLE);
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if( checkResult != SH_CHK_PASS)
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return checkResult;
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checkResult = sh_8051f_dio_output(__iec60730b_dio_pin_out0.gpio,100);
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if( checkResult != SH_CHK_PASS)
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return checkResult;
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return checkResult;
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}
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#endif
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348
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349 #if SH_CHK_AIO_TEST_EN == 1
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*** WARNING C322 IN LINE 349 OF code_classb\iec60730_proc\sh_iec60730b_8051f_porting.c: unknown identifier
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/*******************************************************************************
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*
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* @brief Initialize Analog IO test structure
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*
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*
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******************************************************************************/
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/*AIO convert limit*/
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code const SHT_IEC60730B_AIO_LIMITS __iec60730b_aio_limit[SH_CHK_AIO_TEST_NUM] = {
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{LOWER_LIMIT_CH1,UPPER_LIMIT_CH1},
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C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 7
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{LOWER_LIMIT_CH2,UPPER_LIMIT_CH2},
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// {LOWER_LIMIT_CH3,UPPER_LIMIT_CH3},
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};
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SHT_U16 __iec60730b_aio_val[SH_CHK_AIO_TEST_NUM] = {0}; /*ADC sequence index array*/
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/*******************************************************************************
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*
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* @brief This function is used for Analog IO test
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*
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* @param void
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*
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* @return SH_CHK_PASS - Analog IO tested correct
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* SH_CHK_FAIL_AIO - Analog IO failed
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******************************************************************************/
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SHT_RESULT sh_8051f_aio_test(void)
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{
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SHT_RESULT checkResult = SH_CHK_PASS;
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// __iec60730b_aio_val[0] = uiAdcVal[VVBIAS];
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// __iec60730b_aio_val[1] = uiAdcVal[VBG];
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checkResult = sh_8051f_aio_input_check();
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return checkResult;
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}
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/*******************************************************************************
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*
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* @brief This function is used for Analog IO test at runtime
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*
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* @param void
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*
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* @return SH_CHK_PASS - Analog IO tested correct
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* SH_CHK_FAIL_AIO - Analog IO failed
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******************************************************************************/
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SHT_RESULT sh_8051f_aio_test_runtime(void)
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{
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SHT_RESULT checkResult = SH_CHK_PASS;
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// __iec60730b_aio_val[0] = uiAdcVal[VVBIAS];
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// __iec60730b_aio_val[1] = uiAdcVal[VBG];
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checkResult = sh_8051f_aio_input_check();
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return checkResult;
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}
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#endif
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404
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405 #if SH_CHK_WDG_EN == 1
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*** WARNING C322 IN LINE 405 OF code_classb\iec60730_proc\sh_iec60730b_8051f_porting.c: unknown identifier
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/*******************************************************************************
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*
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* @brief This function is used for watchdog testing
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*
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* @param void
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*
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* @return SH_CHK_PASS - watchdog runs correct
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* SH_CHK_FAIL_WDG - watchdog doesn't fit into limit
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******************************************************************************/
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SHT_RESULT sh_8051f_wdg_test(void)
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{
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SHT_RESULT checkResult = SH_CHK_PASS;
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__iec60730b_wdg_test_obj.resetSource = RSTSTAT;
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C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 8
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/*clear reset flags and reset watchdog config */
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RSTSTAT = SH_CHK_WDG_EXPECT_TIME;
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if( sh_8051f_wdg_setup() != SH_CHK_PASS)
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{
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/* measure watchdog timeout */
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EA = 0;
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__iec60730b_wdg_test_obj.counter = 0;
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sh_8051f_wdg_init_timer();
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if(ucKeyValue == KEY_ON_S)
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{
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__iec60730b_wdg_test_obj.resetflag = 1;
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}
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CLR_WDT();
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while(1){
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sh_8051f_wdg_delay_1ms();
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__iec60730b_wdg_test_obj.counter++;
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}
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}
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checkResult = sh_8051f_wdg_check();
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if(checkResult != SH_CHK_PASS && SH_CHK_WDG_ENDLESS_LOOP)
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{
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/* measure watchdog timeout */
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EA = 0;
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__iec60730b_wdg_test_obj.counter = 0;
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sh_8051f_wdg_init_timer();
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CLR_WDT();
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while(1){
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sh_8051f_wdg_delay_1ms();
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__iec60730b_wdg_test_obj.counter++;
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}
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}
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if(checkResult != SH_CHK_PASS)
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return checkResult;
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return checkResult;
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}
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#if (SH_CHK_WDG_TIMER_SEL == SH_CHK_WDG_P0)
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/*******************************************************************************
|
||
*
|
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* @brief This function is used for initializing timer to generate 1ms timeout event
|
||
*
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||
* @param void
|
||
*
|
||
* @return void
|
||
*
|
||
******************************************************************************/
|
||
#define SH_CHK_WDG_TV (SH_CHK_SYSCLK*1000/16)
|
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void sh_8051f_wdg_init_timer()
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{
|
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PWM0CON = 0x20;
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PWM0PL = (SH_CHK_WDG_TV&0xFF);
|
||
PWM0PH = (SH_CHK_WDG_TV>>8);
|
||
PWM0CON = 0xA0;
|
||
}
|
||
/*******************************************************************************
|
||
*
|
||
* @brief This function is used for delay 1ms
|
||
*
|
||
C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 9
|
||
|
||
* @param void
|
||
*
|
||
* @return void
|
||
*
|
||
******************************************************************************/
|
||
void sh_8051f_wdg_delay_1ms()
|
||
{
|
||
PWM0CON &= ~(1<<7);
|
||
PWM0PL = (SH_CHK_WDG_TV&0xFF);
|
||
PWM0PH = (SH_CHK_WDG_TV>>8);
|
||
PWM0CON &= ~(1<<1);
|
||
PWM0CON |= (1<<7);
|
||
while((PWM0CON&0x02) == 0){}
|
||
}
|
||
|
||
#elif (SH_CHK_WDG_TIMER_SEL == SH_CHK_WDG_P1)
|
||
#define SH_CHK_WDG_TV (SH_CHK_SYSCLK*1000/16)
|
||
void sh_8051f_wdg_init_timer()
|
||
{
|
||
PWM1CON = 0x20;
|
||
PWM1PL = (SH_CHK_WDG_TV&0xFF);
|
||
PWM1PH = (SH_CHK_WDG_TV>>8);
|
||
PWM1CON = 0xA0;
|
||
}
|
||
void sh_8051f_wdg_delay_1ms()
|
||
{
|
||
PWM1CON &= ~(1<<7);
|
||
PWM1PL = (SH_CHK_WDG_TV&0xFF);
|
||
PWM1PH = (SH_CHK_WDG_TV>>8);
|
||
PWM1CON &= ~(1<<1);
|
||
PWM1CON |= (1<<7);
|
||
while((PWM1CON&0x02) == 0){}
|
||
}
|
||
#elif (SH_CHK_WDG_TIMER_SEL == SH_CHK_WDG_P2)
|
||
#define SH_CHK_WDG_TV (SH_CHK_SYSCLK*1000/16)
|
||
void sh_8051f_wdg_init_timer()
|
||
{
|
||
PWM2CON = 0x20;
|
||
PWM2PL = (SH_CHK_WDG_TV&0xFF);
|
||
PWM2PH = (SH_CHK_WDG_TV>>8);
|
||
PWM2CON = 0xA0;
|
||
}
|
||
void sh_8051f_wdg_delay_1ms()
|
||
{
|
||
PWM2CON &= ~(1<<7);
|
||
PWM2PL = (SH_CHK_WDG_TV&0xFF);
|
||
PWM2PH = (SH_CHK_WDG_TV>>8);
|
||
PWM2CON &= ~(1<<1);
|
||
PWM2CON |= (1<<7);
|
||
while((PWM2CON&0x02) == 0){}
|
||
}
|
||
#elif (SH_CHK_WDG_TIMER_SEL == SH_CHK_WDG_T3)
|
||
#define SH_CHK_WDG_TV (0xFFFF - ((SH_CHK_SYSCLK/8*1000)))
|
||
void sh_8051f_wdg_init_timer()
|
||
{
|
||
INSCON = 0x40; //SFR Bank1 selected
|
||
T3CON = (1<<4)|(0<<0);//SYSCLK/8
|
||
TL3 = (SH_CHK_WDG_TV&0xFF);
|
||
TH3 = (SH_CHK_WDG_TV>>8);
|
||
T3CON |= (1<<2);//START TIMER
|
||
INSCON = 0x00; //SFR Bank0 selected
|
||
}
|
||
C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 10
|
||
|
||
void sh_8051f_wdg_delay_1ms()
|
||
{
|
||
INSCON = 0x40; //SFR Bank1 selected
|
||
T3CON &= ~((1<<2)|(1<<7));
|
||
TL3 = (SH_CHK_WDG_TV&0xFF);
|
||
TH3 = (SH_CHK_WDG_TV>>8);
|
||
T3CON |= (1<<2);//START TIMER2
|
||
while((T3CON & (1<<7)) == 0){}
|
||
INSCON = 0x00; //SFR Bank0 selected
|
||
}
|
||
#endif
|
||
#endif
|
||
556
|
||
557 /*******************************************************************************
|
||
558 * CLOCK TESTING FUNCTIONS
|
||
559 ******************************************************************************/
|
||
560 #if SH_CHK_CLOCK_EN == 1
|
||
*** WARNING C322 IN LINE 560 OF code_classb\iec60730_proc\sh_iec60730b_8051f_porting.c: unknown identifier
|
||
/*******************************************************************************
|
||
*
|
||
* @brief This function is used for Start Timer (with clock source different from system clock)
|
||
*
|
||
* @param void
|
||
*
|
||
* @return void
|
||
*
|
||
******************************************************************************/
|
||
#if (SH_CHK_CLOCK_LOWSPD_SEL == SH_CHK_CLOCK_T3)
|
||
void sh_8051f_clk_start_lowspeed_timer()
|
||
{
|
||
INSCON = 0x40; //SFR Bank1 selected
|
||
T3CON = 0x02; //128k
|
||
TL3 = 0;
|
||
TH3 = 0;
|
||
T3CON |= (1<<2);//START TIMER
|
||
INSCON = 0x00; //SFR Bank0 selected
|
||
}
|
||
|
||
void sh_8051f_clk_capture()
|
||
{
|
||
INSCON = 0x40; //SFR Bank1 selected
|
||
T3CON &= ~(1<<2);//STOP TIMER
|
||
__iec60730b_clk_context = T3_16;
|
||
TL3 = 0;
|
||
TH3 = 0;
|
||
T3CON |= (1<<2);//START TIMER
|
||
INSCON = 0x00; //SFR Bank0 selected
|
||
}
|
||
#endif
|
||
|
||
|
||
|
||
/*******************************************************************************
|
||
*
|
||
* @brief This function is used for Start Timer (with system clock source)
|
||
*
|
||
* @param void
|
||
*
|
||
* @return void
|
||
*
|
||
******************************************************************************/
|
||
#if (SH_CHK_CLOCK_HIGHSPD_SEL == SH_CHK_CLOCK_P0)
|
||
C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 11
|
||
|
||
void sh_8051f_clk_start_highspeed_timer()
|
||
{
|
||
PWM0PL = 0x53;
|
||
PWM0PH = 0x07;
|
||
PWM0DL = 0x53;
|
||
PWM0DH = 0x07;
|
||
PWM0CON = 0xB4;
|
||
IEN1 |= (1<<1);
|
||
}
|
||
|
||
void InterruptPWM0(void) interrupt 8
|
||
{
|
||
PWM0CON &= ~(1<<1);
|
||
sh_8051f_clk_capture();
|
||
InterruptTimer3App(); //<2F><>ʱ<EFBFBD><CAB1>
|
||
}
|
||
#elif (SH_CHK_CLOCK_HIGHSPD_SEL == SH_CHK_CLOCK_P1)
|
||
void sh_8051f_clk_start_highspeed_timer()
|
||
{
|
||
PWM1PL = 0x53;
|
||
PWM1PH = 0x07;
|
||
PWM1DL = 0x53;
|
||
PWM1DH = 0x07;
|
||
PWM1CON = 0xB4;
|
||
IEN1 |= (1<<2);
|
||
}
|
||
|
||
void InterruptPWM1(void) interrupt 9
|
||
{
|
||
PWM1CON &= ~(1<<1);
|
||
sh_8051f_clk_capture();
|
||
InterruptTimer3App(); //<2F><>ʱ<EFBFBD><CAB1>
|
||
}
|
||
#elif (SH_CHK_CLOCK_HIGHSPD_SEL == SH_CHK_CLOCK_P2)
|
||
void sh_8051f_clk_start_highspeed_timer()
|
||
{
|
||
PWM2PL = 0x53;
|
||
PWM2PH = 0x07;
|
||
PWM2DL = 0x53;
|
||
PWM2DH = 0x07;
|
||
PWM2CON = 0xB4;
|
||
IEN2 |= (1<<3);
|
||
}
|
||
|
||
void InterruptPWM2(void) interrupt 18
|
||
{
|
||
PWM2CON &= ~(1<<1);
|
||
sh_8051f_clk_capture();
|
||
InterruptTimer3App(); //<2F><>ʱ<EFBFBD><CAB1>
|
||
}
|
||
#endif
|
||
#endif
|
||
657 /*******************************************************************************
|
||
658 * ERROR OPERATION FUNCTION
|
||
659 ******************************************************************************/
|
||
660 void sh_8051f_safety_error(SHT_RESULT checkResult)
|
||
*** ERROR C141 IN LINE 660 OF CODE_CLASSB\IEC60730_PROC\SH_IEC60730B_8051F_PORTING.C: syntax error near 'checkResult', e
|
||
-xpected ')'
|
||
661 {
|
||
662 1 #if 1
|
||
663 1 //for debug
|
||
664 1 checkResult = RSTSTAT;
|
||
C51 COMPILER V9.01 SH_IEC60730B_8051F_PORTING 10/11/2023 14:22:17 PAGE 12
|
||
|
||
*** ERROR C202 IN LINE 664 OF CODE_CLASSB\IEC60730_PROC\SH_IEC60730B_8051F_PORTING.C: 'checkResult': undefined identifie
|
||
-r
|
||
665 1 while(1){
|
||
666 2 CLR_WDT();
|
||
667 2 }
|
||
668 1 #else
|
||
/*WAIT WATCHDOG REST*/
|
||
RSTSTAT = 7; /*fast reset*/
|
||
while(1){
|
||
};
|
||
#endif
|
||
674 1 }
|
||
|
||
C51 COMPILATION COMPLETE. 5 WARNING(S), 2 ERROR(S)
|