344 lines
10 KiB
C
344 lines
10 KiB
C
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/**
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******************************************************************************
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* @file stm32l4xx_ll_lptim.c
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* @author MCD Application Team
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* @brief LPTIM LL module driver.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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#if defined(USE_FULL_LL_DRIVER)
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/* Includes ------------------------------------------------------------------*/
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#include "stm32l4xx_ll_lptim.h"
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#include "stm32l4xx_ll_bus.h"
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#include "stm32l4xx_ll_rcc.h"
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#ifdef USE_FULL_ASSERT
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#include "stm32_assert.h"
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#else
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#define assert_param(expr) ((void)0U)
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#endif /* USE_FULL_ASSERT */
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/** @addtogroup STM32L4xx_LL_Driver
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* @{
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*/
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#if defined (LPTIM1) || defined (LPTIM2)
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/** @addtogroup LPTIM_LL
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* @{
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*/
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/* Private types -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private constants ---------------------------------------------------------*/
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/* Private macros ------------------------------------------------------------*/
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/** @addtogroup LPTIM_LL_Private_Macros
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* @{
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*/
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#define IS_LL_LPTIM_CLOCK_SOURCE(__VALUE__) (((__VALUE__) == LL_LPTIM_CLK_SOURCE_INTERNAL) \
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|| ((__VALUE__) == LL_LPTIM_CLK_SOURCE_EXTERNAL))
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#define IS_LL_LPTIM_CLOCK_PRESCALER(__VALUE__) (((__VALUE__) == LL_LPTIM_PRESCALER_DIV1) \
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|| ((__VALUE__) == LL_LPTIM_PRESCALER_DIV2) \
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|| ((__VALUE__) == LL_LPTIM_PRESCALER_DIV4) \
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|| ((__VALUE__) == LL_LPTIM_PRESCALER_DIV8) \
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|| ((__VALUE__) == LL_LPTIM_PRESCALER_DIV16) \
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|| ((__VALUE__) == LL_LPTIM_PRESCALER_DIV32) \
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|| ((__VALUE__) == LL_LPTIM_PRESCALER_DIV64) \
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|| ((__VALUE__) == LL_LPTIM_PRESCALER_DIV128))
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#define IS_LL_LPTIM_WAVEFORM(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_PWM) \
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|| ((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_SETONCE))
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#define IS_LL_LPTIM_OUTPUT_POLARITY(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_REGULAR) \
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|| ((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_INVERSE))
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/**
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* @}
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*/
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/* Private function prototypes -----------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/** @defgroup LPTIM_Private_Functions LPTIM Private Functions
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* @{
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*/
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup LPTIM_LL_Exported_Functions
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* @{
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*/
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/** @addtogroup LPTIM_LL_EF_Init
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* @{
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*/
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/**
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* @brief Set LPTIMx registers to their reset values.
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* @param LPTIMx LP Timer instance
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* @retval An ErrorStatus enumeration value:
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* - SUCCESS: LPTIMx registers are de-initialized
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* - ERROR: invalid LPTIMx instance
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*/
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ErrorStatus LL_LPTIM_DeInit(const LPTIM_TypeDef *LPTIMx)
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{
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ErrorStatus result = SUCCESS;
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/* Check the parameters */
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assert_param(IS_LPTIM_INSTANCE(LPTIMx));
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if (LPTIMx == LPTIM1)
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{
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LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_LPTIM1);
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LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_LPTIM1);
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}
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#if defined(LPTIM2)
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else if (LPTIMx == LPTIM2)
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{
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LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_LPTIM2);
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LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_LPTIM2);
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}
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#endif /* LPTIM2 */
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else
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{
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result = ERROR;
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}
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return result;
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}
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/**
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* @brief Set each fields of the LPTIM_InitStruct structure to its default
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* value.
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* @param LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure
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* @retval None
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*/
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void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct)
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{
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/* Set the default configuration */
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LPTIM_InitStruct->ClockSource = LL_LPTIM_CLK_SOURCE_INTERNAL;
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LPTIM_InitStruct->Prescaler = LL_LPTIM_PRESCALER_DIV1;
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LPTIM_InitStruct->Waveform = LL_LPTIM_OUTPUT_WAVEFORM_PWM;
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LPTIM_InitStruct->Polarity = LL_LPTIM_OUTPUT_POLARITY_REGULAR;
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}
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/**
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* @brief Configure the LPTIMx peripheral according to the specified parameters.
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* @note LL_LPTIM_Init can only be called when the LPTIM instance is disabled.
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* @note LPTIMx can be disabled using unitary function @ref LL_LPTIM_Disable().
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* @param LPTIMx LP Timer Instance
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* @param LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure
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* @retval An ErrorStatus enumeration value:
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* - SUCCESS: LPTIMx instance has been initialized
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* - ERROR: LPTIMx instance hasn't been initialized
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*/
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ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, const LL_LPTIM_InitTypeDef *LPTIM_InitStruct)
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{
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ErrorStatus result = SUCCESS;
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/* Check the parameters */
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assert_param(IS_LPTIM_INSTANCE(LPTIMx));
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assert_param(IS_LL_LPTIM_CLOCK_SOURCE(LPTIM_InitStruct->ClockSource));
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assert_param(IS_LL_LPTIM_CLOCK_PRESCALER(LPTIM_InitStruct->Prescaler));
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assert_param(IS_LL_LPTIM_WAVEFORM(LPTIM_InitStruct->Waveform));
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assert_param(IS_LL_LPTIM_OUTPUT_POLARITY(LPTIM_InitStruct->Polarity));
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/* The LPTIMx_CFGR register must only be modified when the LPTIM is disabled
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(ENABLE bit is reset to 0).
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*/
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if (LL_LPTIM_IsEnabled(LPTIMx) == 1UL)
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{
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result = ERROR;
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}
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else
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{
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/* Set CKSEL bitfield according to ClockSource value */
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/* Set PRESC bitfield according to Prescaler value */
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/* Set WAVE bitfield according to Waveform value */
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/* Set WAVEPOL bitfield according to Polarity value */
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MODIFY_REG(LPTIMx->CFGR,
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(LPTIM_CFGR_CKSEL | LPTIM_CFGR_PRESC | LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL),
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LPTIM_InitStruct->ClockSource | \
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LPTIM_InitStruct->Prescaler | \
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LPTIM_InitStruct->Waveform | \
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LPTIM_InitStruct->Polarity);
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}
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return result;
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}
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/**
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* @brief Disable the LPTIM instance
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* @rmtoll CR ENABLE LL_LPTIM_Disable
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* @param LPTIMx Low-Power Timer instance
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* @note The following sequence is required to solve LPTIM disable HW limitation.
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* Please check Errata Sheet ES0335 for more details under "MCU may remain
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* stuck in LPTIM interrupt when entering Stop mode" section.
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* @retval None
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*/
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void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx)
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{
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LL_RCC_ClocksTypeDef rcc_clock;
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uint32_t tmpclksource = 0;
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uint32_t tmpIER;
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uint32_t tmpCFGR;
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uint32_t tmpCMP;
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uint32_t tmpARR;
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uint32_t primask_bit;
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uint32_t tmpOR;
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#if defined(LPTIM_RCR_REP)
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uint32_t tmpRCR;
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#endif
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/* Check the parameters */
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assert_param(IS_LPTIM_INSTANCE(LPTIMx));
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/* Enter critical section */
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primask_bit = __get_PRIMASK();
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__set_PRIMASK(1) ;
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/********** Save LPTIM Config *********/
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/* Save LPTIM source clock */
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switch ((uint32_t)LPTIMx)
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{
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case LPTIM1_BASE:
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tmpclksource = LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE);
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break;
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#if defined(LPTIM2)
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case LPTIM2_BASE:
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tmpclksource = LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM2_CLKSOURCE);
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break;
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#endif /* LPTIM2 */
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default:
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break;
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}
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/* Save LPTIM configuration registers */
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tmpIER = LPTIMx->IER;
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tmpCFGR = LPTIMx->CFGR;
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tmpCMP = LPTIMx->CMP;
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tmpARR = LPTIMx->ARR;
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tmpOR = LPTIMx->OR;
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#if defined(LPTIM_RCR_REP)
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tmpRCR = LPTIMx->RCR;
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#endif
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/************* Reset LPTIM ************/
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(void)LL_LPTIM_DeInit(LPTIMx);
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/********* Restore LPTIM Config *******/
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LL_RCC_GetSystemClocksFreq(&rcc_clock);
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#if defined(LPTIM_RCR_REP)
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if ((tmpCMP != 0UL) || (tmpARR != 0UL) || (tmpRCR != 0UL))
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#else
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if ((tmpCMP != 0UL) || (tmpARR != 0UL))
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#endif
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{
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/* Force LPTIM source kernel clock from APB */
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switch ((uint32_t)LPTIMx)
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{
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case LPTIM1_BASE:
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LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE_PCLK1);
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break;
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#if defined(LPTIM2)
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case LPTIM2_BASE:
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LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM2_CLKSOURCE_PCLK1);
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break;
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#endif /* LPTIM2 */
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default:
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break;
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}
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if (tmpCMP != 0UL)
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{
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/* Restore CMP and ARR registers (LPTIM should be enabled first) */
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LPTIMx->CR |= LPTIM_CR_ENABLE;
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LPTIMx->CMP = tmpCMP;
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/* Polling on CMP write ok status after above restore operation */
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do
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{
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rcc_clock.SYSCLK_Frequency--; /* Used for timeout */
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} while (((LL_LPTIM_IsActiveFlag_CMPOK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL));
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LL_LPTIM_ClearFlag_CMPOK(LPTIMx);
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}
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if (tmpARR != 0UL)
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{
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LPTIMx->CR |= LPTIM_CR_ENABLE;
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LPTIMx->ARR = tmpARR;
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LL_RCC_GetSystemClocksFreq(&rcc_clock);
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/* Polling on ARR write ok status after above restore operation */
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do
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{
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rcc_clock.SYSCLK_Frequency--; /* Used for timeout */
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} while (((LL_LPTIM_IsActiveFlag_ARROK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL));
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LL_LPTIM_ClearFlag_ARROK(LPTIMx);
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}
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#if defined(LPTIM_RCR_REP)
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if (tmpRCR != 0UL)
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{
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LPTIMx->CR |= LPTIM_CR_ENABLE;
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LPTIMx->RCR = tmpRCR;
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LL_RCC_GetSystemClocksFreq(&rcc_clock);
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/* Polling on RCR write ok status after above restore operation */
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do
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{
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rcc_clock.SYSCLK_Frequency--; /* Used for timeout */
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} while (((LL_LPTIM_IsActiveFlag_REPOK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL));
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LL_LPTIM_ClearFlag_REPOK(LPTIMx);
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}
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#endif
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/* Restore LPTIM source kernel clock */
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LL_RCC_SetLPTIMClockSource(tmpclksource);
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}
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/* Restore configuration registers (LPTIM should be disabled first) */
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LPTIMx->CR &= ~(LPTIM_CR_ENABLE);
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LPTIMx->IER = tmpIER;
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LPTIMx->CFGR = tmpCFGR;
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LPTIMx->OR = tmpOR;
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/* Exit critical section: restore previous priority mask */
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__set_PRIMASK(primask_bit);
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#endif /* LPTIM1 || LPTIM2 */
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/**
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* @}
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*/
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#endif /* USE_FULL_LL_DRIVER */
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