296 lines
11 KiB
C
296 lines
11 KiB
C
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/**
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******************************************************************************
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* @file stm32l4xx_ll_spi.c
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* @author MCD Application Team
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* @brief SPI LL module driver.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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#if defined(USE_FULL_LL_DRIVER)
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/* Includes ------------------------------------------------------------------*/
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#include "stm32l4xx_ll_spi.h"
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#include "stm32l4xx_ll_bus.h"
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#ifdef USE_FULL_ASSERT
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#include "stm32_assert.h"
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#else
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#define assert_param(expr) ((void)0U)
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#endif /* USE_FULL_ASSERT */
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/** @addtogroup STM32L4xx_LL_Driver
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* @{
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*/
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#if defined (SPI1) || defined (SPI2) || defined (SPI3)
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/** @addtogroup SPI_LL
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* @{
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*/
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/* Private types -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private constants ---------------------------------------------------------*/
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/** @defgroup SPI_LL_Private_Constants SPI Private Constants
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* @{
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*/
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/* SPI registers Masks */
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#define SPI_CR1_CLEAR_MASK (SPI_CR1_CPHA | SPI_CR1_CPOL | SPI_CR1_MSTR | \
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SPI_CR1_BR | SPI_CR1_LSBFIRST | SPI_CR1_SSI | \
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SPI_CR1_SSM | SPI_CR1_RXONLY | SPI_CR1_CRCL | \
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SPI_CR1_CRCNEXT | SPI_CR1_CRCEN | SPI_CR1_BIDIOE | \
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SPI_CR1_BIDIMODE)
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/**
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* @}
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*/
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/* Private macros ------------------------------------------------------------*/
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/** @defgroup SPI_LL_Private_Macros SPI Private Macros
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* @{
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*/
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#define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX) \
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|| ((__VALUE__) == LL_SPI_SIMPLEX_RX) \
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|| ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \
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|| ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX))
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#define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \
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|| ((__VALUE__) == LL_SPI_MODE_SLAVE))
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#define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_4BIT) \
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|| ((__VALUE__) == LL_SPI_DATAWIDTH_5BIT) \
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|| ((__VALUE__) == LL_SPI_DATAWIDTH_6BIT) \
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|| ((__VALUE__) == LL_SPI_DATAWIDTH_7BIT) \
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|| ((__VALUE__) == LL_SPI_DATAWIDTH_8BIT) \
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|| ((__VALUE__) == LL_SPI_DATAWIDTH_9BIT) \
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|| ((__VALUE__) == LL_SPI_DATAWIDTH_10BIT) \
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|| ((__VALUE__) == LL_SPI_DATAWIDTH_11BIT) \
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|| ((__VALUE__) == LL_SPI_DATAWIDTH_12BIT) \
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|| ((__VALUE__) == LL_SPI_DATAWIDTH_13BIT) \
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|| ((__VALUE__) == LL_SPI_DATAWIDTH_14BIT) \
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|| ((__VALUE__) == LL_SPI_DATAWIDTH_15BIT) \
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|| ((__VALUE__) == LL_SPI_DATAWIDTH_16BIT))
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#define IS_LL_SPI_POLARITY(__VALUE__) (((__VALUE__) == LL_SPI_POLARITY_LOW) \
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|| ((__VALUE__) == LL_SPI_POLARITY_HIGH))
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#define IS_LL_SPI_PHASE(__VALUE__) (((__VALUE__) == LL_SPI_PHASE_1EDGE) \
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|| ((__VALUE__) == LL_SPI_PHASE_2EDGE))
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#define IS_LL_SPI_NSS(__VALUE__) (((__VALUE__) == LL_SPI_NSS_SOFT) \
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|| ((__VALUE__) == LL_SPI_NSS_HARD_INPUT) \
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|| ((__VALUE__) == LL_SPI_NSS_HARD_OUTPUT))
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#define IS_LL_SPI_BAUDRATE(__VALUE__) (((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV2) \
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|| ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV4) \
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|| ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV8) \
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|| ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV16) \
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|| ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV32) \
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|| ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV64) \
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|| ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV128) \
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|| ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV256))
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#define IS_LL_SPI_BITORDER(__VALUE__) (((__VALUE__) == LL_SPI_LSB_FIRST) \
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|| ((__VALUE__) == LL_SPI_MSB_FIRST))
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#define IS_LL_SPI_CRCCALCULATION(__VALUE__) (((__VALUE__) == LL_SPI_CRCCALCULATION_ENABLE) \
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|| ((__VALUE__) == LL_SPI_CRCCALCULATION_DISABLE))
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#define IS_LL_SPI_CRC_POLYNOMIAL(__VALUE__) ((__VALUE__) >= 0x1U)
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/**
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* @}
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*/
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/* Private function prototypes -----------------------------------------------*/
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup SPI_LL_Exported_Functions
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* @{
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*/
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/** @addtogroup SPI_LL_EF_Init
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* @{
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*/
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/**
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* @brief De-initialize the SPI registers to their default reset values.
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* @param SPIx SPI Instance
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* @retval An ErrorStatus enumeration value:
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* - SUCCESS: SPI registers are de-initialized
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* - ERROR: SPI registers are not de-initialized
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*/
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ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx)
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{
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ErrorStatus status = ERROR;
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/* Check the parameters */
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assert_param(IS_SPI_ALL_INSTANCE(SPIx));
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#if defined(SPI1)
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if (SPIx == SPI1)
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{
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/* Force reset of SPI clock */
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LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI1);
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/* Release reset of SPI clock */
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LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_SPI1);
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status = SUCCESS;
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}
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#endif /* SPI1 */
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#if defined(SPI2)
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if (SPIx == SPI2)
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{
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/* Force reset of SPI clock */
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LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI2);
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/* Release reset of SPI clock */
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LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI2);
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status = SUCCESS;
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}
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#endif /* SPI2 */
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#if defined(SPI3)
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if (SPIx == SPI3)
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{
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/* Force reset of SPI clock */
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LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI3);
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/* Release reset of SPI clock */
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LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI3);
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status = SUCCESS;
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}
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#endif /* SPI3 */
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return status;
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}
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/**
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* @brief Initialize the SPI registers according to the specified parameters in SPI_InitStruct.
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* @note As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),
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* SPI peripheral should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
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* @param SPIx SPI Instance
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* @param SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
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* @retval An ErrorStatus enumeration value. (Return always SUCCESS)
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*/
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ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct)
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{
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ErrorStatus status = ERROR;
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/* Check the SPI Instance SPIx*/
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assert_param(IS_SPI_ALL_INSTANCE(SPIx));
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/* Check the SPI parameters from SPI_InitStruct*/
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assert_param(IS_LL_SPI_TRANSFER_DIRECTION(SPI_InitStruct->TransferDirection));
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assert_param(IS_LL_SPI_MODE(SPI_InitStruct->Mode));
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assert_param(IS_LL_SPI_DATAWIDTH(SPI_InitStruct->DataWidth));
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assert_param(IS_LL_SPI_POLARITY(SPI_InitStruct->ClockPolarity));
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assert_param(IS_LL_SPI_PHASE(SPI_InitStruct->ClockPhase));
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assert_param(IS_LL_SPI_NSS(SPI_InitStruct->NSS));
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assert_param(IS_LL_SPI_BAUDRATE(SPI_InitStruct->BaudRate));
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assert_param(IS_LL_SPI_BITORDER(SPI_InitStruct->BitOrder));
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assert_param(IS_LL_SPI_CRCCALCULATION(SPI_InitStruct->CRCCalculation));
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if (LL_SPI_IsEnabled(SPIx) == 0x00000000U)
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{
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/*---------------------------- SPIx CR1 Configuration ------------------------
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* Configure SPIx CR1 with parameters:
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* - TransferDirection: SPI_CR1_BIDIMODE, SPI_CR1_BIDIOE and SPI_CR1_RXONLY bits
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* - Master/Slave Mode: SPI_CR1_MSTR bit
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* - ClockPolarity: SPI_CR1_CPOL bit
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* - ClockPhase: SPI_CR1_CPHA bit
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* - NSS management: SPI_CR1_SSM bit
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* - BaudRate prescaler: SPI_CR1_BR[2:0] bits
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* - BitOrder: SPI_CR1_LSBFIRST bit
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* - CRCCalculation: SPI_CR1_CRCEN bit
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*/
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MODIFY_REG(SPIx->CR1,
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SPI_CR1_CLEAR_MASK,
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SPI_InitStruct->TransferDirection | SPI_InitStruct->Mode |
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SPI_InitStruct->ClockPolarity | SPI_InitStruct->ClockPhase |
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SPI_InitStruct->NSS | SPI_InitStruct->BaudRate |
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SPI_InitStruct->BitOrder | SPI_InitStruct->CRCCalculation);
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/*---------------------------- SPIx CR2 Configuration ------------------------
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* Configure SPIx CR2 with parameters:
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* - DataWidth: DS[3:0] bits
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* - NSS management: SSOE bit
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*/
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MODIFY_REG(SPIx->CR2,
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SPI_CR2_DS | SPI_CR2_SSOE,
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SPI_InitStruct->DataWidth | (SPI_InitStruct->NSS >> 16U));
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/* Set Rx FIFO to Quarter (1 Byte) in case of 8 Bits mode. No DataPacking by default */
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if (SPI_InitStruct->DataWidth < LL_SPI_DATAWIDTH_9BIT)
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{
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LL_SPI_SetRxFIFOThreshold(SPIx, LL_SPI_RX_FIFO_TH_QUARTER);
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}
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/*---------------------------- SPIx CRCPR Configuration ----------------------
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* Configure SPIx CRCPR with parameters:
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* - CRCPoly: CRCPOLY[15:0] bits
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*/
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if (SPI_InitStruct->CRCCalculation == LL_SPI_CRCCALCULATION_ENABLE)
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{
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assert_param(IS_LL_SPI_CRC_POLYNOMIAL(SPI_InitStruct->CRCPoly));
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LL_SPI_SetCRCPolynomial(SPIx, SPI_InitStruct->CRCPoly);
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}
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status = SUCCESS;
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}
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return status;
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}
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/**
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* @brief Set each @ref LL_SPI_InitTypeDef field to default value.
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* @param SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
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* whose fields will be set to default values.
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* @retval None
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*/
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void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct)
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{
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/* Set SPI_InitStruct fields to default values */
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SPI_InitStruct->TransferDirection = LL_SPI_FULL_DUPLEX;
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SPI_InitStruct->Mode = LL_SPI_MODE_SLAVE;
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SPI_InitStruct->DataWidth = LL_SPI_DATAWIDTH_8BIT;
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SPI_InitStruct->ClockPolarity = LL_SPI_POLARITY_LOW;
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SPI_InitStruct->ClockPhase = LL_SPI_PHASE_1EDGE;
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SPI_InitStruct->NSS = LL_SPI_NSS_HARD_INPUT;
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SPI_InitStruct->BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV2;
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SPI_InitStruct->BitOrder = LL_SPI_MSB_FIRST;
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SPI_InitStruct->CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
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SPI_InitStruct->CRCPoly = 7U;
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#endif /* defined (SPI1) || defined (SPI2) || defined (SPI3) */
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/**
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* @}
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*/
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#endif /* USE_FULL_LL_DRIVER */
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