294 lines
7.7 KiB
C
294 lines
7.7 KiB
C
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file stm32l4xx_it.c
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* @brief Interrupt Service Routines.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2021 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "stm32l4xx_it.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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#include "uart_dev.h"
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN TD */
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/* USER CODE END TD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/* External variables --------------------------------------------------------*/
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extern DMA_HandleTypeDef hdma_adc1;
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extern UART_HandleTypeDef hlpuart1;
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extern UART_HandleTypeDef huart1;
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extern UART_HandleTypeDef huart3;
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extern TIM_HandleTypeDef htim16;
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extern TIM_HandleTypeDef htim1;
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extern TIM_HandleTypeDef htim17;
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/* USER CODE BEGIN EV */
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extern uint8_t rx_uart1_buf[1];
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extern uint8_t rx_uart2_buf[1];
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extern uint8_t rx_uart3_buf[1];
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extern uint8_t rx_uart5_buf[1];
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/* USER CODE END EV */
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/******************************************************************************/
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/* Cortex-M4 Processor Interruption and Exception Handlers */
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/******************************************************************************/
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/**
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* @brief This function handles Non maskable interrupt.
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*/
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void NMI_Handler(void)
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{
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/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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/* USER CODE END NonMaskableInt_IRQn 0 */
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/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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while (1)
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{
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}
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/* USER CODE END NonMaskableInt_IRQn 1 */
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}
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/**
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* @brief This function handles Hard fault interrupt.
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*/
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void HardFault_Handler(void)
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{
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/* USER CODE BEGIN HardFault_IRQn 0 */
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__iar_builtin_set_FAULTMASK(1);
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NVIC_SystemReset();
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/* USER CODE END HardFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_HardFault_IRQn 0 */
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/* USER CODE END W1_HardFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Memory management fault.
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*/
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void MemManage_Handler(void)
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{
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/* USER CODE BEGIN MemoryManagement_IRQn 0 */
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/* USER CODE END MemoryManagement_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
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/* USER CODE END W1_MemoryManagement_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Prefetch fault, memory access fault.
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*/
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void BusFault_Handler(void)
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{
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/* USER CODE BEGIN BusFault_IRQn 0 */
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/* USER CODE END BusFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_BusFault_IRQn 0 */
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/* USER CODE END W1_BusFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Undefined instruction or illegal state.
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*/
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void UsageFault_Handler(void)
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{
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/* USER CODE BEGIN UsageFault_IRQn 0 */
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/* USER CODE END UsageFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
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/* USER CODE END W1_UsageFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Debug monitor.
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*/
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void DebugMon_Handler(void)
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{
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/* USER CODE BEGIN DebugMonitor_IRQn 0 */
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/* USER CODE END DebugMonitor_IRQn 0 */
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/* USER CODE BEGIN DebugMonitor_IRQn 1 */
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/* USER CODE END DebugMonitor_IRQn 1 */
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}
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/******************************************************************************/
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/* STM32L4xx Peripheral Interrupt Handlers */
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/* Add here the Interrupt Handlers for the used peripherals. */
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/* For the available peripheral interrupt handler names, */
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/* please refer to the startup file (startup_stm32l4xx.s). */
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/******************************************************************************/
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/**
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* @brief This function handles DMA1 channel1 global interrupt.
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*/
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void DMA1_Channel1_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
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/* USER CODE END DMA1_Channel1_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_adc1);
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/* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
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/* USER CODE END DMA1_Channel1_IRQn 1 */
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}
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/**
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* @brief This function handles TIM1 update interrupt and TIM16 global interrupt.
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*/
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void TIM1_UP_TIM16_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM1_UP_TIM16_IRQn 0 */
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/* USER CODE END TIM1_UP_TIM16_IRQn 0 */
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HAL_TIM_IRQHandler(&htim1);
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HAL_TIM_IRQHandler(&htim16);
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/* USER CODE BEGIN TIM1_UP_TIM16_IRQn 1 */
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/* USER CODE END TIM1_UP_TIM16_IRQn 1 */
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}
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/**
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* @brief This function handles TIM1 trigger and commutation interrupts and TIM17 global interrupt.
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*/
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void TIM1_TRG_COM_TIM17_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM1_TRG_COM_TIM17_IRQn 0 */
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/* USER CODE END TIM1_TRG_COM_TIM17_IRQn 0 */
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HAL_TIM_IRQHandler(&htim17);
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/* USER CODE BEGIN TIM1_TRG_COM_TIM17_IRQn 1 */
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/* USER CODE END TIM1_TRG_COM_TIM17_IRQn 1 */
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}
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/**
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* @brief This function handles USART1 global interrupt.
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*/
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void USART1_IRQHandler(void)
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{
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/* USER CODE BEGIN USART1_IRQn 0 */
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uint8_t c = 0;
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/* USER CODE END USART1_IRQn 0 */
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HAL_UART_IRQHandler(&huart1);
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HAL_UART_Receive_IT(&huart1, rx_uart1_buf,1);
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/* USER CODE BEGIN USART1_IRQn 1 */
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uart_device_info *dev = (uart_device_info *)g_term_uart_handle;
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c = rx_uart1_buf[0];
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if(!RingQueueFull(&dev->uart_ring_queue))
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InRingQueue(&dev->uart_ring_queue, c);
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/* USER CODE END USART1_IRQn 1 */
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}
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/**
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* @brief This function handles USART3 global interrupt.
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*/
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void USART3_IRQHandler(void)
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{
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/* USER CODE BEGIN USART3_IRQn 0 */
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uint8_t c = 0;
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/* USER CODE END USART3_IRQn 0 */
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HAL_UART_IRQHandler(&huart3);
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/* USER CODE BEGIN USART3_IRQn 1 */
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uart_device_info *dev = (uart_device_info *)g_rs485_uart_handle;
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HAL_UART_Receive_IT(&huart3, rx_uart3_buf,1);
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c = rx_uart3_buf[0];
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if(!RingQueueFull(&dev->uart_ring_queue))
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InRingQueue(&dev->uart_ring_queue, c);
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/* USER CODE END USART3_IRQn 1 */
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}
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/**
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* @brief This function handles USART5 global interrupt.
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*/
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void UART5_IRQHandler(void)
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{
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/* USER CODE BEGIN USART3_IRQn 0 */
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uint8_t c = 0;
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/* USER CODE END USART3_IRQn 0 */
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HAL_UART_IRQHandler(&huart5);
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/* USER CODE BEGIN USART3_IRQn 1 */
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uart_device_info *dev = (uart_device_info *)g_ec801_uart_handle;
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HAL_UART_Receive_IT(&huart5, rx_uart5_buf,1);
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c = rx_uart5_buf[0];
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if(!RingQueueFull(&dev->uart_ring_queue))
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InRingQueue(&dev->uart_ring_queue, c);
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/* USER CODE END USART3_IRQn 1 */
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}
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/**
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* @brief This function handles LPUART1 global interrupt.
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*/
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void LPUART1_IRQHandler(void)
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{
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/* USER CODE BEGIN LPUART1_IRQn 0 */
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/* USER CODE END LPUART1_IRQn 0 */
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HAL_UART_IRQHandler(&hlpuart1);
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/* USER CODE BEGIN LPUART1_IRQn 1 */
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/* USER CODE END LPUART1_IRQn 1 */
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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