2024-07-23 02:00:15 +00:00
|
|
|
|
#include "e22.h"
|
|
|
|
|
#include "main.h"
|
|
|
|
|
#include "inflash.h"
|
2024-07-23 07:38:51 +00:00
|
|
|
|
#include "uart_dev.h"
|
2024-07-23 02:00:15 +00:00
|
|
|
|
|
|
|
|
|
uint8_t e22_state = 0;
|
2024-08-14 08:36:33 +00:00
|
|
|
|
//c0 00 09 0000 00 64 00 0a 4d 00 00 WOR<4F><52><EFBFBD>㷢<EFBFBD><E3B7A2>
|
|
|
|
|
//c0 00 09 0000 00 64 00 0a 45 00 00 WOR<4F><52><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
|
2024-07-23 02:00:15 +00:00
|
|
|
|
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
2024-07-23 07:38:51 +00:00
|
|
|
|
e22_config_pack e22_config_data = { 0xc0, 0x00, 0x09, //д<><D0B4>0<EFBFBD><30>ʼ<EFBFBD><CABC>9<EFBFBD><39><EFBFBD><EFBFBD>
|
2024-07-23 02:00:15 +00:00
|
|
|
|
0x00, 0x30, //<2F><>ַ
|
|
|
|
|
0x00, //<2F><><EFBFBD><EFBFBD>ID
|
|
|
|
|
0x64, //9600<30><30>8N1<4E><31>9.6k
|
|
|
|
|
0x00,
|
|
|
|
|
0x0A, //<2F>ŵ<EFBFBD>10
|
2024-08-14 08:36:33 +00:00
|
|
|
|
0x45,
|
|
|
|
|
0x00, 0x00}; //<2F><><EFBFBD><EFBFBD>
|
|
|
|
|
|
2024-07-23 02:00:15 +00:00
|
|
|
|
|
|
|
|
|
static unsigned short CRC16(unsigned char *arr_buff, unsigned char len)
|
|
|
|
|
{
|
|
|
|
|
unsigned short crc=0xFFFF;
|
|
|
|
|
unsigned char i, j;
|
|
|
|
|
for ( j=0; j<len; j++){
|
|
|
|
|
crc=crc ^*arr_buff++;
|
|
|
|
|
for ( i=0; i<8; i++){
|
2024-08-14 08:36:33 +00:00
|
|
|
|
if( ( crc&0x0001) >0){
|
2024-07-23 02:00:15 +00:00
|
|
|
|
crc=crc>>1;
|
|
|
|
|
crc=crc^ 0xa001;
|
|
|
|
|
}else{
|
|
|
|
|
crc=crc>>1;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return crc;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void lora_set_mode_normal()
|
|
|
|
|
{
|
|
|
|
|
HAL_GPIO_WritePin(RF_M0_GPIO_Port, RF_M0_Pin, GPIO_PIN_RESET);
|
|
|
|
|
HAL_GPIO_WritePin(RF_M1_GPIO_Port, RF_M1_Pin, GPIO_PIN_RESET);
|
2024-07-24 02:31:30 +00:00
|
|
|
|
HAL_Delay(E22_DELAY_MS);
|
2024-07-23 02:00:15 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void lora_set_mode_wor()
|
|
|
|
|
{
|
|
|
|
|
HAL_GPIO_WritePin(RF_M0_GPIO_Port, RF_M0_Pin, GPIO_PIN_SET);
|
|
|
|
|
HAL_GPIO_WritePin(RF_M1_GPIO_Port, RF_M1_Pin, GPIO_PIN_RESET);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void lora_set_mode_config()
|
|
|
|
|
{
|
|
|
|
|
HAL_GPIO_WritePin(RF_M0_GPIO_Port, RF_M0_Pin, GPIO_PIN_RESET);
|
|
|
|
|
HAL_GPIO_WritePin(RF_M1_GPIO_Port, RF_M1_Pin, GPIO_PIN_SET);
|
2024-07-24 02:31:30 +00:00
|
|
|
|
HAL_Delay(E22_DELAY_MS);
|
2024-07-23 02:00:15 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void lora_set_mode_sleep()
|
|
|
|
|
{
|
|
|
|
|
HAL_GPIO_WritePin(RF_M0_GPIO_Port, RF_M0_Pin, GPIO_PIN_SET);
|
|
|
|
|
HAL_GPIO_WritePin(RF_M1_GPIO_Port, RF_M1_Pin, GPIO_PIN_SET);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void lora_set_mode(e22_mode mode)
|
|
|
|
|
{
|
|
|
|
|
switch(mode)
|
|
|
|
|
{
|
|
|
|
|
case NORMAL:
|
|
|
|
|
lora_set_mode_normal();
|
|
|
|
|
break;
|
|
|
|
|
case WOR:
|
|
|
|
|
lora_set_mode_wor();
|
|
|
|
|
break;
|
|
|
|
|
case CONFIG:
|
|
|
|
|
lora_set_mode_config();
|
|
|
|
|
break;
|
|
|
|
|
case SLEEP:
|
|
|
|
|
lora_set_mode_sleep();
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void e22_init()
|
|
|
|
|
{
|
2024-07-24 02:31:30 +00:00
|
|
|
|
/*E22ģ<32><C4A3><EFBFBD>ϵ<EFBFBD>*/
|
2024-07-30 08:21:14 +00:00
|
|
|
|
HAL_GPIO_WritePin(RF_PWR_CTRL_GPIO_Port, RF_PWR_CTRL_Pin, GPIO_PIN_SET);
|
2024-07-26 04:33:49 +00:00
|
|
|
|
|
2024-07-25 08:27:22 +00:00
|
|
|
|
e22_config_data.ADDL = g_stConfigInfo.addr;
|
|
|
|
|
e22_config_data.NETID = g_stConfigInfo.net_id;
|
|
|
|
|
e22_config_data.REG2 = e22_config_data.NETID % 27 + 10;
|
|
|
|
|
|
2024-07-23 02:00:15 +00:00
|
|
|
|
lora_set_mode(CONFIG);
|
2024-07-24 02:31:30 +00:00
|
|
|
|
uart_dev_write(g_lora_uart_handle, (void *)&e22_config_data, sizeof(e22_config_data)/sizeof(e22_config_data.func));
|
2024-08-22 07:32:42 +00:00
|
|
|
|
HAL_Delay(E22_DELAY_MS);
|
2024-08-23 02:48:18 +00:00
|
|
|
|
lora_set_mode(WOR);
|
2024-08-14 08:36:33 +00:00
|
|
|
|
|
2024-07-24 02:31:30 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|