diff --git a/.gitignore b/.gitignore index 36e30f3..1f7c879 100644 --- a/.gitignore +++ b/.gitignore @@ -1,4 +1,3 @@ -*tmp* EWARM/Debug/ EWARM/Release/ EWARM/settings/ \ No newline at end of file diff --git a/.vscode/settings.json b/.vscode/settings.json index d693bc8..d10e987 100644 --- a/.vscode/settings.json +++ b/.vscode/settings.json @@ -12,6 +12,7 @@ "rtthread.h": "c", "rthw.h": "c", "delay_us.h": "c", - "core_cm4.h": "c" + "core_cm4.h": "c", + "gd32f4xx_usart.h": "c" } } \ No newline at end of file diff --git a/applications/main/main.c b/applications/main/main.c index c6bf304..95f5ff3 100644 --- a/applications/main/main.c +++ b/applications/main/main.c @@ -38,6 +38,8 @@ OF SUCH DAMAGE. #include "rtservice.h" #include "drv_adc.h" #include "mb85rc64.h" +#include "tmp75.h" +#include "drv_usart.h" float voltage; @@ -68,8 +70,14 @@ int main(void) // RT-Thread 内核初始化等操作... // 其他应用程序初始化代码... + + gd32_usart_init(); + adc_config(); temp75_gpio_init(); + + + //测试mb铁电读写 memset(&ttest, 0, sizeof(ttest)); // mb85rc64_page_write(); @@ -100,7 +108,7 @@ int main(void) memset(&ttest, 0, sizeof(ttest)); // mb85rc64_page_write(); mb85rc64_add_read(MB85TEST_ADD, (unsigned char *)&ttest, sizeof(ttest)); - + usart_puts(ttest.ttt); // 主循环代码... } } \ No newline at end of file diff --git a/drivers/drv_adc.c b/drivers/drv_adc.c index 6ce68e7..4dda85e 100644 --- a/drivers/drv_adc.c +++ b/drivers/drv_adc.c @@ -1,6 +1,6 @@ /************************************************************ Copyright (C), 2025, cerlink Tech. Co., Ltd. - FileName: test.cpp + FileName: drv_adc.c Author: dufresne Version : 1.0 Date:2025.09.15 Description: // 模块描述 Version: // 版本信息 @@ -17,15 +17,15 @@ #include "string.h" #include "gd32f4xx.h" #include "gd32f4xx_adc.h" -#include "gd32f4xx_dma.h" +// #include "gd32f4xx_dma.h" #include "rtthread.h" void adc_config(void) { - /* 启用GPIOA时钟 */ + /* 启用GPIOC时钟 */ rcu_periph_clock_enable(RCU_GPIOC); - /* 启用ADC0时钟 */ + /* 启用ADC1时钟 */ rcu_periph_clock_enable(RCU_ADC1); diff --git a/drivers/drv_usart.c b/drivers/drv_usart.c index 36b1044..bdaa960 100644 --- a/drivers/drv_usart.c +++ b/drivers/drv_usart.c @@ -20,7 +20,8 @@ static struct gd32_usart_config usart_config[] = { // 初始化所有配置的串口 void gd32_usart_init(void) { - for (int i = 0; i < sizeof(usart_config) / sizeof(usart_config[0]); i++) { + for (int i = 0; i < sizeof(usart_config) / sizeof(usart_config[0]); i++) + { gd32_usart_configure(&usart_config[i]); } } @@ -43,11 +44,11 @@ void gd32_usart_configure(struct gd32_usart_config *config) // 配置USART usart_deinit(config->usart_periph); usart_baudrate_set(config->usart_periph, config->baud_rate); - usart_word_length_set(config->usart_periph, USART_WL_8BIT); - usart_stop_bit_set(config->usart_periph, USART_STB_1BIT); - usart_parity_config(config->usart_periph, USART_PM_NONE); - usart_hardware_flow_rts_config(config->usart_periph, USART_RTS_DISABLE); - usart_hardware_flow_cts_config(config->usart_periph, USART_CTS_DISABLE); + // usart_word_length_set(config->usart_periph, USART_WL_8BIT); + // usart_stop_bit_set(config->usart_periph, USART_STB_1BIT); + // usart_parity_config(config->usart_periph, USART_PM_NONE); + // usart_hardware_flow_rts_config(config->usart_periph, USART_RTS_DISABLE); + // usart_hardware_flow_cts_config(config->usart_periph, USART_CTS_DISABLE); usart_receive_config(config->usart_periph, USART_RECEIVE_ENABLE); usart_transmit_config(config->usart_periph, USART_TRANSMIT_ENABLE); @@ -74,6 +75,12 @@ void gd32_usart_puts(struct gd32_usart_config *config, const char *str) } } +void usart_puts(const char *str) +{ + gd32_usart_puts(&usart_config[0], str); + +} + // 获取串口配置 by name struct gd32_usart_config *gd32_usart_get_config(const char *name) { diff --git a/drivers/drv_usart.h b/drivers/drv_usart.h index c926035..a7e8693 100644 --- a/drivers/drv_usart.h +++ b/drivers/drv_usart.h @@ -19,6 +19,7 @@ struct gd32_usart_config { uint8_t irq_type; }; + // 函数声明 void gd32_usart_init(void); void gd32_usart_configure(struct gd32_usart_config *config); diff --git a/drivers/tmp75/tmp75.c b/drivers/tmp75/tmp75.c new file mode 100644 index 0000000..d3b3e68 --- /dev/null +++ b/drivers/tmp75/tmp75.c @@ -0,0 +1,256 @@ +/************************************************* +Copyright (c) 2025, ɶƼι˾ +All rights reserved. +@file tmp75.C +@brief tmp75 + +@details +@note +@author dufresne +@date 2025/09/15 + +@version v1.0 2025/09/15 ʼ汾 +*************************************************/ + +#include "tmp75.h" +#include "rtthread.h" +#include + +/* + @ brief ʱ + @ param + @ return + @ note 2025-09-15 +*/ +static void delay_us(int us) +{ + rt_thread_udelay(us); +} + +/* + @ brief ʼtmp75оƬGPIO + @ param + @ return + @ note 2025-09-15 +*/ +void temp75_gpio_init() +{ + // ʱ + rcu_periph_clock_enable(RCU_GPIOB); + // Ϊģʽ:PB6 + gpio_mode_set(GPIOB, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO_PIN_6); + gpio_output_options_set(GPIOB, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_6); + + // PB7ģʽ + gpio_mode_set(GPIOB, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO_PIN_7); + gpio_output_options_set(GPIOB, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_7); + + TMP75_SCL_HIGH; + TMP75_SDA_HIGH; +} + +/* + @ brief SDAΪģʽ + @ param + @ return + @ note 2025-09-15 +*/ +static void tmp75_sda_output() +{ + gpio_mode_set(GPIOB, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO_PIN_7); + gpio_output_options_set(GPIOB, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_7); +} + +/* + @ brief SDAΪģʽ + @ param + @ return + @ note 2025-09-15 +*/ +static void tmp75_sda_input() +{ + gpio_mode_set(GPIOB, GPIO_MODE_INPUT, GPIO_PUPD_NONE, GPIO_PIN_7); + // gpio_output_options_set(GPIOB, GPIO_PUPD_NONE, GPIO_OSPEED_50MHZ, GPIO_PIN_7); +} + +/* + @ brief I2C startź + @ param + @ return + @ note 2025-09-15 +*/ +static void i2c_start() +{ + TMP75_SDA_HIGH; + TMP75_SCL_HIGH; + TMP75_SDA_LOW; + delay_us(40); +} + +/* + @ brief I2C stopź + @ param + @ return + @ note 2025-09-15 +*/ +static void i2c_stop() +{ + TMP75_SDA_LOW; + TMP75_SCL_HIGH; + TMP75_SDA_HIGH; +} + +/* + @ brief дһֽ + @ param + @ return + @ note 2025-09-15 +*/ +static void tmp75_write_byte(uint8_t byte) +{ + for (int i = 0; i < 8; i++) + { + TMP75_SCL_LOW; + delay_us(4); + if (byte & 0x80) + { + TMP75_SDA_HIGH; + } + else + { + TMP75_SDA_LOW; + } + byte <<= 1; + TMP75_SCL_HIGH; + delay_us(40); + } + TMP75_SCL_LOW; +} + +/* + @ brief дݺCPUTMP75صACKź + @ param + @ return + @ note 2025-09-15 +*/ +static void tmp75_ack() +{ + int i = 0; + // sdaΪģʽ + tmp75_sda_input(); + TMP75_SCL_HIGH; + while ((TMP75_SDA_GET) && (i < 1000)) + { + i++; + } + TMP75_SCL_LOW; + // sdaΪģʽ + tmp75_sda_output(); +} + +/* + @ brief ȡ + @ param + @ return value:ȡĵֽ + @ note 2025-09-15 +*/ +static uint8_t tmp75_read_byte() +{ + uint8_t value = 0; + tmp75_sda_input(); + TMP75_SCL_LOW; + + for (int i = 0; i < 8; i++) + { + TMP75_SCL_HIGH; + value <<= 1; + delay_us(10); + if (TMP75_SDA_GET) + { + value = value | 0x01; + } + TMP75_SCL_LOW; + delay_us(10); + } + tmp75_sda_output(); + return value; +} + +/* + @ brief ȡݣackź + @ param + @ return + @ note 2025-09-15 +*/ +static void master_ack() +{ + TMP75_SDA_LOW; + delay_us(5); + TMP75_SCL_HIGH; + delay_us(5); + TMP75_SCL_LOW; + delay_us(5); +} + +/* + @ brief ȡɣnoackź + @ param + @ return + @ note 2025-09-15 +*/ +static void master_noack() +{ + TMP75_SDA_HIGH; + delay_us(5); + TMP75_SCL_HIGH; + delay_us(5); + TMP75_SCL_LOW; + delay_us(5); +} +/* + @ brief ȡ¶ֵ + @ param + @ return + @ note 2025-09-15 +*/ +float tmp75_read_temp(void) +{ + uint8_t tempH = 0; + uint8_t tempL = 0; + uint16_t tempCode = 0; + float temp = 0; + + // ʼź + i2c_start(); + // дtmp75ַ + tmp75_write_byte(TMP75_ADDRESS); + // tmp75ackϢ + tmp75_ack(); + // ȡݵĵַ + tmp75_write_byte(TEMP_REGISTER_ADDRESS); + tmp75_ack(); + + i2c_start(); + // дtmp75ַ + tmp75_write_byte(TMP75_ADDRESS + 1); // ַ + tmp75_ack(); + tempH = tmp75_read_byte(); + master_ack(); + tempL = tmp75_read_byte(); + master_noack(); + i2c_stop(); + tempCode = (tempH << 8) | tempL; + tempCode = tempCode >> 6; + if (tempCode & 0x200) // ¶ + { + tempCode &= 0x1ff; + temp = ((float)tempCode - 512) / 4; + } + else + { + temp = (float)tempCode / 4; + } + TMP75_SDA_LOW; + TMP75_SCL_LOW; + return (temp); +} diff --git a/drivers/tmp75/tmp75.h b/drivers/tmp75/tmp75.h new file mode 100644 index 0000000..e64f31b --- /dev/null +++ b/drivers/tmp75/tmp75.h @@ -0,0 +1,31 @@ +///Copyright (c) 2022, ĴԴͨ޹˾ +///All rights reserved. +///@file tmp75.h +///@brief tmp75 +/// +///@details +///@note +///@author lqc +///@date 2022/05/23 +/// +///@version v1.0 2022/05/23 ʼ汾 + +#ifndef __TMP75_H_ +#define __TMP75_H_ + +#include "gd32f4xx_gpio.h" + +#define TMP75_ADDRESS 0x90 +#define TEMP_REGISTER_ADDRESS 0x00 //¶ȼĴַ + +#define TMP75_SCL_HIGH gpio_bit_set(GPIOB, GPIO_PIN_6) +#define TMP75_SCL_LOW gpio_bit_reset(GPIOB, GPIO_PIN_6) + +#define TMP75_SDA_HIGH gpio_bit_set(GPIOB, GPIO_PIN_7) +#define TMP75_SDA_LOW gpio_bit_reset(GPIOB, GPIO_PIN_7) +#define TMP75_SDA_GET gpio_input_bit_get(GPIOB, GPIO_PIN_7) + +void temp75_gpio_init(); +float tmp75_read_temp(void); + +#endif \ No newline at end of file