修改数据采集和控制周期
This commit is contained in:
起床就犯困
parent
55811f0946
commit
c184bd3407
30
.mxproject
30
.mxproject
File diff suppressed because one or more lines are too long
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@ -4,6 +4,7 @@
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#include "bl_chargControl.h"
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#include "capture.h"
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void chargControl(void);
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@ -64,10 +64,10 @@ void start(void)
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startInfo();
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// HAL_Delay(5000);
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while (1) {
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cfgTest();
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HAL_Delay(1000);
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}
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// while (1) {
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// cfgTest();
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// HAL_Delay(1000);
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// }
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TimeSliceOffset_Start();
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}
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@ -30,14 +30,13 @@ void Init(void)
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FM_GPIO_Init();
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tim_Init();
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FM_RTC_Init();
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Init_debug_uart();
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Init_BAT485_uart(g_cfgParameter.bat485_Baud);
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Init_GW485_uart(g_cfgParameter.gw485_Baud);
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// Init_BAT485_uart(115200);
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// Init_GW485_uart(115200);
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// Init_BAT485_uart(115200);
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// Init_GW485_uart(115200);
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start_gw485Rx_It();
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start_bat485Rx_It();
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@ -48,8 +47,11 @@ void Init(void)
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// POW_OUT_PCON_Open();
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HAL_Delay(100);
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setPowerOutput(TRUE);
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// EN_PWMOUT_Eable();
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// setDutyRatio(0.5);
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// while(1);
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// while (1) {
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// log_info("Init_debug_uart \n");
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// HAL_Delay(1000);
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// }
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}
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@ -29,7 +29,7 @@ static STR_TimeSliceOffset m_runled;
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static void Task_Runled(void);
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/* 喂狗 */
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#define wdi_reloadVal 3000 /* 任务执行间隔 */
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#define wdi_reloadVal 1000 /* 任务执行间隔 */
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#define wdi_offset 0 /* 任务执行偏移量 */
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static STR_TimeSliceOffset m_wdi;
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static void Task_wdi(void);
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@ -200,21 +200,19 @@ void Task_wdi(void)
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{
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feedDog();
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// debug_printf("chargCurrent:%f \n", getChargCurrent());
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// debug_printf("outputVoltage:%f \n", getOutputVoltage());
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// debug_printf("BatteryVoltage:%f \n", getBatteryVoltage());
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// debug_printf("dischargCurrent:%f \n", getDischargCurrent());
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// debug_printf("solarInCircuitVoltage:%f \n", getSolarInCircuitVoltage());
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// debug_printf("HighSideMosTemperature:%f \n", getHighSideMosTemperature());
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// debug_printf("InputVoltage:%f \n", getInputVoltage());
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// debug_printf("DischargMosState:%d \n", getDischargMosState());
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// debug_printf("MPPT_Mode:%d \n", getMPPT_Mode());
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// debug_printf("loopImpedance:%f \n", getLoopImpedance());
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// debug_printf("DutyRatio:%f \n", getDutyRatio());
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// debug_printf("OUT_VOLT_IN:%f \n", get_OUT_VOLT_IN());
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// debug_printf("HAL_GetTick:%d \n", HAL_GetTick());
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debug_printf("chargCurrent:%f \n", getChargCurrent());
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debug_printf("outputVoltage:%f \n", getOutputVoltage());
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debug_printf("BatteryVoltage:%f \n", getBatteryVoltage());
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debug_printf("dischargCurrent:%f \n", getDischargCurrent());
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debug_printf("solarInCircuitVoltage:%f \n", getSolarInCircuitVoltage());
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debug_printf("HighSideMosTemperature:%f \n", getHighSideMosTemperature());
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debug_printf("InputVoltage:%f \n", getInputVoltage());
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debug_printf("DischargMosState:%d \n", getDischargMosState());
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debug_printf("MPPT_Mode:%d \n", getMPPT_Mode());
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debug_printf("loopImpedance:%f \n", getLoopImpedance());
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debug_printf("DutyRatio:%f \n", getDutyRatio());
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debug_printf("OUT_VOLT_IN:%f \n", get_OUT_VOLT_IN());
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debug_printf("HAL_GetTick:%d \n", HAL_GetTick());
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// char buf[100];
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@ -37,4 +37,6 @@ void adcCaptureFir();
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extern void setSoftShortCircuit(uint16_t disChargCurrAdcNum);
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extern void chargControl(void);
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#endif
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@ -3,8 +3,8 @@
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#define FM_FLASH_H_
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#include "main.h"
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// #include "w25qxx.h"
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#include "w25q256.h"
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#include "w25qxx.h"
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// #include "w25q256.h"
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void Flash_Init(void);
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void read_Flash(uint8_t* pBuffer,uint32_t ReadAddr,uint16_t NumByteToRead);
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@ -19,7 +19,7 @@ void tim_Init(void)
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// HAL_TIM_Base_Start(&htim3);
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HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_4);
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HD_controlTim_Init();
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// HD_controlTim_Init();
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HAL_TIM_Base_Start_IT(&htim7);
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HD_taskBaseTim_Init();
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@ -98,7 +98,9 @@ enum {
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CHG_CURR_NUM = 2,
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PV_VOLT_IN_NUM = 3,
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};
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int16_t adcBuff[4];
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// int16_t adcBuff[4];
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int16_t adcBuff[40];
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/* 指向adcCapture中的inData16数组中的第一位也是最后一位 */
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uint8_t pointer;
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@ -161,7 +163,7 @@ void ADC_Capture_Init(void)
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// captureFirInit();
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HAL_TIM_Base_Start(&htim6);
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HAL_ADC_Start_DMA(&hadc1, (uint32_t *)adcBuff, 4);
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HAL_ADC_Start_DMA(&hadc1, (uint32_t *)adcBuff, 40);
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// /* 光伏充电输出电流比例，放大倍数*电阻 */
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// P_CHG_CURR = (1.0 / (50 * (1 / (1 / 0.01 + 1 / 0.002)))) * Proportion;
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@ -470,42 +472,58 @@ void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hdma)
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{
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if (hdma->Instance == ADC1) {
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// HAL_GPIO_TogglePin(POW_FF_CON_GPIO_Port, POW_FF_CON_Pin);
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HAL_GPIO_WritePin(POW_FF_CON_GPIO_Port, POW_FF_CON_Pin,GPIO_PIN_SET);
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// HAL_GPIO_WritePin(POW_FF_CON_GPIO_Port, POW_FF_CON_Pin,GPIO_PIN_SET);
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setSoftShortCircuit(adcBuff[DSG_CURR_NUM]);
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// setSoftShortCircuit(adcBuff[DSG_CURR_NUM]);
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WORK_VOLT_capture.totalInData -= WORK_VOLT_capture.inData16[pointer];
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DSG_CURR_capture.totalInData -= DSG_CURR_capture.inData16[pointer];
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PV_VOLT_IN_capture.totalInData -= PV_VOLT_IN_capture.inData16[pointer];
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CHG_CURR_capture.totalInData -= CHG_CURR_capture.inData16[pointer];
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// WORK_VOLT_capture.totalInData -= WORK_VOLT_capture.inData16[pointer];
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// DSG_CURR_capture.totalInData -= DSG_CURR_capture.inData16[pointer];
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// PV_VOLT_IN_capture.totalInData -= PV_VOLT_IN_capture.inData16[pointer];
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// CHG_CURR_capture.totalInData -= CHG_CURR_capture.inData16[pointer];
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WORK_VOLT_capture.inData16[pointer] = adcBuff[WORK_VOLT_NUM];
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DSG_CURR_capture.inData16[pointer] = adcBuff[DSG_CURR_NUM];
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PV_VOLT_IN_capture.inData16[pointer] = adcBuff[PV_VOLT_IN_NUM];
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CHG_CURR_capture.inData16[pointer] = adcBuff[CHG_CURR_NUM];
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// WORK_VOLT_capture.inData16[pointer] = adcBuff[WORK_VOLT_NUM];
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// DSG_CURR_capture.inData16[pointer] = adcBuff[DSG_CURR_NUM];
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// PV_VOLT_IN_capture.inData16[pointer] = adcBuff[PV_VOLT_IN_NUM];
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// CHG_CURR_capture.inData16[pointer] = adcBuff[CHG_CURR_NUM];
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WORK_VOLT_capture.totalInData += WORK_VOLT_capture.inData16[pointer];
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DSG_CURR_capture.totalInData += DSG_CURR_capture.inData16[pointer];
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PV_VOLT_IN_capture.totalInData += PV_VOLT_IN_capture.inData16[pointer];
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CHG_CURR_capture.totalInData += CHG_CURR_capture.inData16[pointer];
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// WORK_VOLT_capture.totalInData += WORK_VOLT_capture.inData16[pointer];
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// DSG_CURR_capture.totalInData += DSG_CURR_capture.inData16[pointer];
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// PV_VOLT_IN_capture.totalInData += PV_VOLT_IN_capture.inData16[pointer];
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// CHG_CURR_capture.totalInData += CHG_CURR_capture.inData16[pointer];
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pointer++;
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if (pointer >= 10) {
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pointer = 0;
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}
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// pointer++;
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// if (pointer >= 10) {
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// pointer = 0;
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// }
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arm_copy_f32(WORK_VOLT_capture.IODataF + 1, WORK_VOLT_capture.IODataF, 3);
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arm_copy_f32(DSG_CURR_capture.IODataF + 1, DSG_CURR_capture.IODataF, 3);
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arm_copy_f32(PV_VOLT_IN_capture.IODataF + 1, PV_VOLT_IN_capture.IODataF, 3);
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arm_copy_f32(CHG_CURR_capture.IODataF + 1, CHG_CURR_capture.IODataF, 3);
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// arm_copy_f32(WORK_VOLT_capture.IODataF + 1, WORK_VOLT_capture.IODataF, 3);
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// arm_copy_f32(DSG_CURR_capture.IODataF + 1, DSG_CURR_capture.IODataF, 3);
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// arm_copy_f32(PV_VOLT_IN_capture.IODataF + 1, PV_VOLT_IN_capture.IODataF, 3);
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// arm_copy_f32(CHG_CURR_capture.IODataF + 1, CHG_CURR_capture.IODataF, 3);
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WORK_VOLT_capture.IODataF[3] = (float32_t)WORK_VOLT_capture.totalInData / indata16_size;
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DSG_CURR_capture.IODataF[3] = (float32_t)DSG_CURR_capture.totalInData / indata16_size;
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PV_VOLT_IN_capture.IODataF[3] = (float32_t)PV_VOLT_IN_capture.totalInData / indata16_size;
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CHG_CURR_capture.IODataF[3] = (float32_t)CHG_CURR_capture.totalInData / indata16_size;
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// WORK_VOLT_capture.IODataF[3] = (float32_t)WORK_VOLT_capture.totalInData / indata16_size;
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// DSG_CURR_capture.IODataF[3] = (float32_t)DSG_CURR_capture.totalInData / indata16_size;
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// PV_VOLT_IN_capture.IODataF[3] = (float32_t)PV_VOLT_IN_capture.totalInData / indata16_size;
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// CHG_CURR_capture.IODataF[3] = (float32_t)CHG_CURR_capture.totalInData / indata16_size;
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// HAL_GPIO_TogglePin(POW_FF_CON_GPIO_Port, POW_FF_CON_Pin);
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HAL_GPIO_WritePin(POW_FF_CON_GPIO_Port, POW_FF_CON_Pin,GPIO_PIN_RESET);
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// HAL_GPIO_WritePin(POW_FF_CON_GPIO_Port, POW_FF_CON_Pin,GPIO_PIN_RESET);
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WORK_VOLT_capture.outData = (float32_t)(adcBuff[0] + adcBuff[4] + adcBuff[8] + adcBuff[12] + adcBuff[16]
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+ adcBuff[20] + adcBuff[24] + adcBuff[28] + adcBuff[32] + adcBuff[36]) / indata16_size;
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DSG_CURR_capture.outData = (float32_t)(adcBuff[1] + adcBuff[5] + adcBuff[9] + adcBuff[13] + adcBuff[17]
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+ adcBuff[21] + adcBuff[25] + adcBuff[29] + adcBuff[33] + adcBuff[37]) / indata16_size;
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CHG_CURR_capture.outData = (float32_t)(adcBuff[2] + adcBuff[6] + adcBuff[10] + adcBuff[14] + adcBuff[18]
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+ adcBuff[22] + adcBuff[26] + adcBuff[30] + adcBuff[34] + adcBuff[38]) / indata16_size;
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PV_VOLT_IN_capture.outData = (float32_t)(adcBuff[3] + adcBuff[7] + adcBuff[11] + adcBuff[15] + adcBuff[19]
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+ adcBuff[23] + adcBuff[27] + adcBuff[31] + adcBuff[35] + adcBuff[39]) / indata16_size;
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setSoftShortCircuit(DSG_CURR_capture.outData);
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chargControl();
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}
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}
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@ -579,15 +597,15 @@ void adcCaptureFir(void)
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// PV_VOLT_IN_capture.outData = 1;
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// CHG_CURR_capture.outData = 1;
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static float32_t outputf;
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arm_dot_prod_f32(WORK_VOLT_capture.IODataF, firLP, firLen, &outputf);
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WORK_VOLT_capture.outData = (int16_t)outputf;
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arm_dot_prod_f32(DSG_CURR_capture.IODataF, firLP, firLen, &outputf);
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DSG_CURR_capture.outData = (int16_t)outputf;
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arm_dot_prod_f32(PV_VOLT_IN_capture.IODataF, firLP, firLen, &outputf);
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PV_VOLT_IN_capture.outData = (int16_t)outputf;
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arm_dot_prod_f32(CHG_CURR_capture.IODataF, firLP, firLen, &outputf);
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CHG_CURR_capture.outData = (int16_t)outputf;
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// static float32_t outputf;
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// arm_dot_prod_f32(WORK_VOLT_capture.IODataF, firLP, firLen, &outputf);
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// WORK_VOLT_capture.outData = (int16_t)outputf;
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// arm_dot_prod_f32(DSG_CURR_capture.IODataF, firLP, firLen, &outputf);
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// DSG_CURR_capture.outData = (int16_t)outputf;
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// arm_dot_prod_f32(PV_VOLT_IN_capture.IODataF, firLP, firLen, &outputf);
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// PV_VOLT_IN_capture.outData = (int16_t)outputf;
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// arm_dot_prod_f32(CHG_CURR_capture.IODataF, firLP, firLen, &outputf);
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// CHG_CURR_capture.outData = (int16_t)outputf;
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}
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@ -8,16 +8,23 @@
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*/
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void Flash_Init(void)
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{
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// __HAL_RCC_GPIOA_CLK_ENABLE();
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__HAL_RCC_GPIOA_CLK_ENABLE();
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// HAL_GPIO_WritePin(FLASH_CS_GPIO_Port, FLASH_CS_Pin, GPIO_PIN_RESET);
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// GPIO_InitTypeDef GPIO_InitStruct = {0};
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HAL_GPIO_WritePin(FLASH_CS_GPIO_Port, FLASH_CS_Pin, GPIO_PIN_RESET);
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GPIO_InitTypeDef GPIO_InitStruct = {0};
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// // GPIO_InitStruct.Pin = FLASH_CS_Pin | FLASH_CLK_Pin | FLASH_MISO_Pin;
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// // GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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// // GPIO_InitStruct.Pull = GPIO_NOPULL;
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// // GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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// // HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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/*Configure GPIO pin : FLASH_CS_Pin */
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GPIO_InitStruct.Pin = FLASH_CS_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(FLASH_CS_GPIO_Port, &GPIO_InitStruct);
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// GPIO_InitStruct.Pin = FLASH_CS_Pin | FLASH_CLK_Pin | FLASH_MISO_Pin;
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// GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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// GPIO_InitStruct.Pull = GPIO_NOPULL;
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// GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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// HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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// // GPIO_InitStruct.Pin = FLASH_MOSI_Pin;
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// // GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
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@ -37,30 +44,30 @@ void Flash_Init(void)
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// GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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// HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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GPIO_InitTypeDef GPIO_InitStruct = {0};
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// GPIO_InitTypeDef GPIO_InitStruct = {0};
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__HAL_RCC_GPIOA_CLK_ENABLE();
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// __HAL_RCC_GPIOA_CLK_ENABLE();
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/*Configure GPIO pin Output Level */
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// HAL_GPIO_WritePin(GPIOA, FLASH_CS_Pin|FLASH_CLK_Pin|FLASH_MISO_Pin, GPIO_PIN_RESET);
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HAL_GPIO_WritePin(GPIOA, FLASH_CS_Pin|FLASH_CLK_Pin|FLASH_MOSI_Pin, GPIO_PIN_RESET);
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// /*Configure GPIO pin Output Level */
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// // HAL_GPIO_WritePin(GPIOA, FLASH_CS_Pin|FLASH_CLK_Pin|FLASH_MISO_Pin, GPIO_PIN_RESET);
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// HAL_GPIO_WritePin(GPIOA, FLASH_CS_Pin|FLASH_CLK_Pin|FLASH_MOSI_Pin, GPIO_PIN_RESET);
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/*Configure GPIO pins : FLASH_CS_Pin FLASH_CLK_Pin FLASH_MISO_Pin */
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// GPIO_InitStruct.Pin = FLASH_CS_Pin|FLASH_CLK_Pin|FLASH_MISO_Pin;
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GPIO_InitStruct.Pin = FLASH_CS_Pin|FLASH_CLK_Pin|FLASH_MOSI_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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// /*Configure GPIO pins : FLASH_CS_Pin FLASH_CLK_Pin FLASH_MISO_Pin */
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// // GPIO_InitStruct.Pin = FLASH_CS_Pin|FLASH_CLK_Pin|FLASH_MISO_Pin;
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// GPIO_InitStruct.Pin = FLASH_CS_Pin|FLASH_CLK_Pin|FLASH_MOSI_Pin;
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// GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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// GPIO_InitStruct.Pull = GPIO_NOPULL;
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// GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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// HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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/*Configure GPIO pin : FLASH_MOSI_Pin */
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GPIO_InitStruct.Pin = FLASH_MISO_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
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GPIO_InitStruct.Pull = GPIO_PULLUP;
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HAL_GPIO_Init(FLASH_MOSI_GPIO_Port, &GPIO_InitStruct);
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// /*Configure GPIO pin : FLASH_MOSI_Pin */
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// GPIO_InitStruct.Pin = FLASH_MISO_Pin;
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// GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
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||||
// GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||||
// HAL_GPIO_Init(FLASH_MOSI_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
Flash_GPIO_Init();
|
||||
// W25QXX_Init();
|
||||
// Flash_GPIO_Init();
|
||||
W25QXX_Init();
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -71,8 +78,8 @@ void Flash_Init(void)
|
|||
*/
|
||||
void read_Flash(uint8_t* pBuffer,uint32_t ReadAddr,uint16_t NumByteToRead)
|
||||
{
|
||||
// W25QXX_Read(pBuffer, ReadAddr, NumByteToRead);
|
||||
Flash_Read(pBuffer, ReadAddr, NumByteToRead);
|
||||
W25QXX_Read(pBuffer, ReadAddr, NumByteToRead);
|
||||
// Flash_Read(pBuffer, ReadAddr, NumByteToRead);
|
||||
|
||||
}
|
||||
|
||||
|
|
@ -84,7 +91,7 @@ void read_Flash(uint8_t* pBuffer,uint32_t ReadAddr,uint16_t NumByteToRead)
|
|||
*/
|
||||
void write_Flash(uint8_t* pBuffer,uint32_t WriteAddr,uint16_t NumByteToWrite)
|
||||
{
|
||||
// W25QXX_Write(pBuffer, WriteAddr, NumByteToWrite);
|
||||
W25QXX_Write(pBuffer, WriteAddr, NumByteToWrite);
|
||||
// Flash_Write_MorePage(pBuffer, WriteAddr, NumByteToWrite);
|
||||
W25Q128_Write(pBuffer, WriteAddr, NumByteToWrite);
|
||||
// W25Q128_Write(pBuffer, WriteAddr, NumByteToWrite);
|
||||
}
|
||||
|
|
@ -7,14 +7,14 @@
|
|||
/*******************************************************************************
|
||||
* 常量&宏定义 *
|
||||
*******************************************************************************/
|
||||
// #define FLASH_CS_GPIO_Port GPIOA
|
||||
// #define FLASH_CS_Pin FLASH_CS_Pin
|
||||
// #define FLASH_CLK_GPIO_Port GPIOA
|
||||
// #define FLASH_CLK_Pin FLASH_CLK_Pin
|
||||
// #define FLASH_MISO_GPIO_Port GPIOA
|
||||
// #define FLASH_MISO_Pin FLASH_MISO_Pin
|
||||
// #define FLASH_MOSI_GPIO_Port GPIOA
|
||||
// #define FLASH_MOSI_Pin FLASH_MOSI_Pin
|
||||
#define FLASH_CS_GPIO_Port GPIOA
|
||||
#define FLASH_CS_Pin FLASH_CS_Pin
|
||||
#define FLASH_CLK_GPIO_Port GPIOA
|
||||
#define FLASH_CLK_Pin FLASH_CLK_Pin
|
||||
#define FLASH_MISO_GPIO_Port GPIOA
|
||||
#define FLASH_MISO_Pin FLASH_MISO_Pin
|
||||
#define FLASH_MOSI_GPIO_Port GPIOA
|
||||
#define FLASH_MOSI_Pin FLASH_MOSI_Pin
|
||||
|
||||
#define FLASH_CS_ENABLE HAL_GPIO_WritePin(FLASH_CS_GPIO_Port, FLASH_CS_Pin, GPIO_PIN_RESET) /*片选使能*/
|
||||
#define FLASH_CS_DISABLE HAL_GPIO_WritePin(FLASH_CS_GPIO_Port, FLASH_CS_Pin, GPIO_PIN_SET) /*片选失能*/
|
||||
|
|
|
|||
|
|
@ -76,8 +76,8 @@ void Error_Handler(void);
|
|||
#define GW485_RX_GPIO_Port GPIOA
|
||||
#define FLASH_CS_Pin GPIO_PIN_4
|
||||
#define FLASH_CS_GPIO_Port GPIOA
|
||||
#define FLASH_CLK_Pin GPIO_PIN_5
|
||||
#define FLASH_CLK_GPIO_Port GPIOA
|
||||
#define FLASH_SCK_Pin GPIO_PIN_5
|
||||
#define FLASH_SCK_GPIO_Port GPIOA
|
||||
#define FLASH_MISO_Pin GPIO_PIN_6
|
||||
#define FLASH_MISO_GPIO_Port GPIOA
|
||||
#define FLASH_MOSI_Pin GPIO_PIN_7
|
||||
|
|
|
|||
|
|
@ -0,0 +1,52 @@
|
|||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file spi.h
|
||||
* @brief This file contains all the function prototypes for
|
||||
* the spi.c file
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2025 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __SPI_H__
|
||||
#define __SPI_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
extern SPI_HandleTypeDef hspi1;
|
||||
|
||||
/* USER CODE BEGIN Private defines */
|
||||
|
||||
/* USER CODE END Private defines */
|
||||
|
||||
void MX_SPI1_Init(void);
|
||||
|
||||
/* USER CODE BEGIN Prototypes */
|
||||
|
||||
/* USER CODE END Prototypes */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __SPI_H__ */
|
||||
|
||||
|
|
@ -60,7 +60,7 @@
|
|||
/*#define HAL_SAI_MODULE_ENABLED */
|
||||
/*#define HAL_SMARTCARD_MODULE_ENABLED */
|
||||
/*#define HAL_SMBUS_MODULE_ENABLED */
|
||||
/*#define HAL_SPI_MODULE_ENABLED */
|
||||
#define HAL_SPI_MODULE_ENABLED
|
||||
/*#define HAL_SRAM_MODULE_ENABLED */
|
||||
#define HAL_TIM_MODULE_ENABLED
|
||||
#define HAL_UART_MODULE_ENABLED
|
||||
|
|
|
|||
|
|
@ -51,7 +51,7 @@ void MX_GPIO_Init(void)
|
|||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(GPIOA, FLASH_CS_Pin|FLASH_CLK_Pin|FLASH_MISO_Pin, GPIO_PIN_RESET);
|
||||
HAL_GPIO_WritePin(FLASH_CS_GPIO_Port, FLASH_CS_Pin, GPIO_PIN_RESET);
|
||||
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(GPIOB, WDI_INPUT_Pin|RUN_LED_Pin|POW_FF_CON_Pin|POW_OUT_CON_Pin, GPIO_PIN_RESET);
|
||||
|
|
@ -65,18 +65,12 @@ void MX_GPIO_Init(void)
|
|||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||||
HAL_GPIO_Init(DSG_PROT_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pins : FLASH_CS_Pin FLASH_CLK_Pin FLASH_MISO_Pin */
|
||||
GPIO_InitStruct.Pin = FLASH_CS_Pin|FLASH_CLK_Pin|FLASH_MISO_Pin;
|
||||
/*Configure GPIO pin : FLASH_CS_Pin */
|
||||
GPIO_InitStruct.Pin = FLASH_CS_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pin : FLASH_MOSI_Pin */
|
||||
GPIO_InitStruct.Pin = FLASH_MOSI_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||||
HAL_GPIO_Init(FLASH_MOSI_GPIO_Port, &GPIO_InitStruct);
|
||||
HAL_GPIO_Init(FLASH_CS_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pins : WDI_INPUT_Pin RUN_LED_Pin POW_FF_CON_Pin POW_OUT_CON_Pin */
|
||||
GPIO_InitStruct.Pin = WDI_INPUT_Pin|RUN_LED_Pin|POW_FF_CON_Pin|POW_OUT_CON_Pin;
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@
|
|||
#include "adc.h"
|
||||
#include "dma.h"
|
||||
#include "rtc.h"
|
||||
#include "spi.h"
|
||||
#include "tim.h"
|
||||
#include "usart.h"
|
||||
#include "gpio.h"
|
||||
|
|
@ -94,19 +95,20 @@ int main(void)
|
|||
/* USER CODE END SysInit */
|
||||
|
||||
/* Initialize all configured peripherals */
|
||||
// MX_GPIO_Init();
|
||||
// MX_DMA_Init();
|
||||
// MX_ADC1_Init();
|
||||
// MX_ADC2_Init();
|
||||
// MX_TIM3_Init();
|
||||
// MX_TIM6_Init();
|
||||
// MX_UART4_Init();
|
||||
// MX_USART2_UART_Init();
|
||||
// MX_USART3_UART_Init();
|
||||
// MX_TIM7_Init();
|
||||
// MX_TIM16_Init();
|
||||
// MX_TIM15_Init();
|
||||
// MX_RTC_Init();
|
||||
// MX_GPIO_Init();
|
||||
// MX_DMA_Init();
|
||||
// MX_ADC1_Init();
|
||||
// MX_ADC2_Init();
|
||||
// MX_TIM3_Init();
|
||||
// MX_TIM6_Init();
|
||||
// MX_UART4_Init();
|
||||
// MX_USART2_UART_Init();
|
||||
// MX_USART3_UART_Init();
|
||||
// MX_TIM7_Init();
|
||||
// MX_TIM16_Init();
|
||||
// MX_TIM15_Init();
|
||||
// MX_RTC_Init();
|
||||
// MX_SPI1_Init();
|
||||
/* USER CODE BEGIN 2 */
|
||||
|
||||
start();
|
||||
|
|
|
|||
|
|
@ -0,0 +1,121 @@
|
|||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file spi.c
|
||||
* @brief This file provides code for the configuration
|
||||
* of the SPI instances.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2025 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "spi.h"
|
||||
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
SPI_HandleTypeDef hspi1;
|
||||
|
||||
/* SPI1 init function */
|
||||
void MX_SPI1_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN SPI1_Init 0 */
|
||||
|
||||
/* USER CODE END SPI1_Init 0 */
|
||||
|
||||
/* USER CODE BEGIN SPI1_Init 1 */
|
||||
|
||||
/* USER CODE END SPI1_Init 1 */
|
||||
hspi1.Instance = SPI1;
|
||||
hspi1.Init.Mode = SPI_MODE_MASTER;
|
||||
hspi1.Init.Direction = SPI_DIRECTION_2LINES;
|
||||
hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
|
||||
hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
|
||||
hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
|
||||
hspi1.Init.NSS = SPI_NSS_SOFT;
|
||||
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
|
||||
hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
|
||||
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
|
||||
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
|
||||
hspi1.Init.CRCPolynomial = 7;
|
||||
hspi1.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE;
|
||||
hspi1.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
|
||||
if (HAL_SPI_Init(&hspi1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN SPI1_Init 2 */
|
||||
|
||||
/* USER CODE END SPI1_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
|
||||
{
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(spiHandle->Instance==SPI1)
|
||||
{
|
||||
/* USER CODE BEGIN SPI1_MspInit 0 */
|
||||
|
||||
/* USER CODE END SPI1_MspInit 0 */
|
||||
/* SPI1 clock enable */
|
||||
__HAL_RCC_SPI1_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**SPI1 GPIO Configuration
|
||||
PA5 ------> SPI1_SCK
|
||||
PA6 ------> SPI1_MISO
|
||||
PA7 ------> SPI1_MOSI
|
||||
*/
|
||||
GPIO_InitStruct.Pin = FLASH_SCK_Pin|FLASH_MISO_Pin|FLASH_MOSI_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN SPI1_MspInit 1 */
|
||||
|
||||
/* USER CODE END SPI1_MspInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
void HAL_SPI_MspDeInit(SPI_HandleTypeDef* spiHandle)
|
||||
{
|
||||
|
||||
if(spiHandle->Instance==SPI1)
|
||||
{
|
||||
/* USER CODE BEGIN SPI1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END SPI1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_SPI1_CLK_DISABLE();
|
||||
|
||||
/**SPI1 GPIO Configuration
|
||||
PA5 ------> SPI1_SCK
|
||||
PA6 ------> SPI1_MISO
|
||||
PA7 ------> SPI1_MOSI
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOA, FLASH_SCK_Pin|FLASH_MISO_Pin|FLASH_MOSI_Pin);
|
||||
|
||||
/* USER CODE BEGIN SPI1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END SPI1_MspDeInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
|
@ -0,0 +1,855 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32g4xx_hal_spi.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of SPI HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32G4xx_HAL_SPI_H
|
||||
#define STM32G4xx_HAL_SPI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32g4xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32G4xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup SPI_Exported_Types SPI Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief SPI Configuration Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Mode; /*!< Specifies the SPI operating mode.
|
||||
This parameter can be a value of @ref SPI_Mode */
|
||||
|
||||
uint32_t Direction; /*!< Specifies the SPI bidirectional mode state.
|
||||
This parameter can be a value of @ref SPI_Direction */
|
||||
|
||||
uint32_t DataSize; /*!< Specifies the SPI data size.
|
||||
This parameter can be a value of @ref SPI_Data_Size */
|
||||
|
||||
uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
|
||||
This parameter can be a value of @ref SPI_Clock_Polarity */
|
||||
|
||||
uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
|
||||
This parameter can be a value of @ref SPI_Clock_Phase */
|
||||
|
||||
uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
|
||||
hardware (NSS pin) or by software using the SSI bit.
|
||||
This parameter can be a value of @ref SPI_Slave_Select_management */
|
||||
|
||||
uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
|
||||
used to configure the transmit and receive SCK clock.
|
||||
This parameter can be a value of @ref SPI_BaudRate_Prescaler
|
||||
@note The communication clock is derived from the master
|
||||
clock. The slave clock does not need to be set. */
|
||||
|
||||
uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
|
||||
This parameter can be a value of @ref SPI_MSB_LSB_transmission */
|
||||
|
||||
uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not.
|
||||
This parameter can be a value of @ref SPI_TI_mode */
|
||||
|
||||
uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
|
||||
This parameter can be a value of @ref SPI_CRC_Calculation */
|
||||
|
||||
uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
|
||||
This parameter must be an odd number between Min_Data = 1 and Max_Data = 65535 */
|
||||
|
||||
uint32_t CRCLength; /*!< Specifies the CRC Length used for the CRC calculation.
|
||||
CRC Length is only used with Data8 and Data16, not other data size
|
||||
This parameter can be a value of @ref SPI_CRC_length */
|
||||
|
||||
uint32_t NSSPMode; /*!< Specifies whether the NSSP signal is enabled or not .
|
||||
This parameter can be a value of @ref SPI_NSSP_Mode
|
||||
This mode is activated by the NSSP bit in the SPIx_CR2 register and
|
||||
it takes effect only if the SPI interface is configured as Motorola SPI
|
||||
master (FRF=0) with capture on the first edge (SPIx_CR1 CPHA = 0,
|
||||
CPOL setting is ignored).. */
|
||||
} SPI_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL SPI State structure definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_SPI_STATE_RESET = 0x00U, /*!< Peripheral not Initialized */
|
||||
HAL_SPI_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
|
||||
HAL_SPI_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
|
||||
HAL_SPI_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */
|
||||
HAL_SPI_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */
|
||||
HAL_SPI_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */
|
||||
HAL_SPI_STATE_ERROR = 0x06U, /*!< SPI error state */
|
||||
HAL_SPI_STATE_ABORT = 0x07U /*!< SPI abort is ongoing */
|
||||
} HAL_SPI_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief SPI handle Structure definition
|
||||
*/
|
||||
typedef struct __SPI_HandleTypeDef
|
||||
{
|
||||
SPI_TypeDef *Instance; /*!< SPI registers base address */
|
||||
|
||||
SPI_InitTypeDef Init; /*!< SPI communication parameters */
|
||||
|
||||
const uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */
|
||||
|
||||
uint16_t TxXferSize; /*!< SPI Tx Transfer size */
|
||||
|
||||
__IO uint16_t TxXferCount; /*!< SPI Tx Transfer Counter */
|
||||
|
||||
uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx transfer Buffer */
|
||||
|
||||
uint16_t RxXferSize; /*!< SPI Rx Transfer size */
|
||||
|
||||
__IO uint16_t RxXferCount; /*!< SPI Rx Transfer Counter */
|
||||
|
||||
uint32_t CRCSize; /*!< SPI CRC size used for the transfer */
|
||||
|
||||
void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Rx ISR */
|
||||
|
||||
void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Tx ISR */
|
||||
|
||||
DMA_HandleTypeDef *hdmatx; /*!< SPI Tx DMA Handle parameters */
|
||||
|
||||
DMA_HandleTypeDef *hdmarx; /*!< SPI Rx DMA Handle parameters */
|
||||
|
||||
HAL_LockTypeDef Lock; /*!< Locking object */
|
||||
|
||||
__IO HAL_SPI_StateTypeDef State; /*!< SPI communication state */
|
||||
|
||||
__IO uint32_t ErrorCode; /*!< SPI Error code */
|
||||
|
||||
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
|
||||
void (* TxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Completed callback */
|
||||
void (* RxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Completed callback */
|
||||
void (* TxRxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Completed callback */
|
||||
void (* TxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Half Completed callback */
|
||||
void (* RxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Half Completed callback */
|
||||
void (* TxRxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Half Completed callback */
|
||||
void (* ErrorCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Error callback */
|
||||
void (* AbortCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Abort callback */
|
||||
void (* MspInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp Init callback */
|
||||
void (* MspDeInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp DeInit callback */
|
||||
|
||||
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
||||
} SPI_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
|
||||
/**
|
||||
* @brief HAL SPI Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_SPI_TX_COMPLETE_CB_ID = 0x00U, /*!< SPI Tx Completed callback ID */
|
||||
HAL_SPI_RX_COMPLETE_CB_ID = 0x01U, /*!< SPI Rx Completed callback ID */
|
||||
HAL_SPI_TX_RX_COMPLETE_CB_ID = 0x02U, /*!< SPI TxRx Completed callback ID */
|
||||
HAL_SPI_TX_HALF_COMPLETE_CB_ID = 0x03U, /*!< SPI Tx Half Completed callback ID */
|
||||
HAL_SPI_RX_HALF_COMPLETE_CB_ID = 0x04U, /*!< SPI Rx Half Completed callback ID */
|
||||
HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID = 0x05U, /*!< SPI TxRx Half Completed callback ID */
|
||||
HAL_SPI_ERROR_CB_ID = 0x06U, /*!< SPI Error callback ID */
|
||||
HAL_SPI_ABORT_CB_ID = 0x07U, /*!< SPI Abort callback ID */
|
||||
HAL_SPI_MSPINIT_CB_ID = 0x08U, /*!< SPI Msp Init callback ID */
|
||||
HAL_SPI_MSPDEINIT_CB_ID = 0x09U /*!< SPI Msp DeInit callback ID */
|
||||
|
||||
} HAL_SPI_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL SPI Callback pointer definition
|
||||
*/
|
||||
typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to an SPI callback function */
|
||||
|
||||
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup SPI_Exported_Constants SPI Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Error_Code SPI Error Code
|
||||
* @{
|
||||
*/
|
||||
#define HAL_SPI_ERROR_NONE (0x00000000U) /*!< No error */
|
||||
#define HAL_SPI_ERROR_MODF (0x00000001U) /*!< MODF error */
|
||||
#define HAL_SPI_ERROR_CRC (0x00000002U) /*!< CRC error */
|
||||
#define HAL_SPI_ERROR_OVR (0x00000004U) /*!< OVR error */
|
||||
#define HAL_SPI_ERROR_FRE (0x00000008U) /*!< FRE error */
|
||||
#define HAL_SPI_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
|
||||
#define HAL_SPI_ERROR_FLAG (0x00000020U) /*!< Error on RXNE/TXE/BSY/FTLVL/FRLVL Flag */
|
||||
#define HAL_SPI_ERROR_ABORT (0x00000040U) /*!< Error during SPI Abort procedure */
|
||||
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
|
||||
#define HAL_SPI_ERROR_INVALID_CALLBACK (0x00000080U) /*!< Invalid Callback error */
|
||||
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Mode SPI Mode
|
||||
* @{
|
||||
*/
|
||||
#define SPI_MODE_SLAVE (0x00000000U)
|
||||
#define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Direction SPI Direction Mode
|
||||
* @{
|
||||
*/
|
||||
#define SPI_DIRECTION_2LINES (0x00000000U)
|
||||
#define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
|
||||
#define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Data_Size SPI Data Size
|
||||
* @{
|
||||
*/
|
||||
#define SPI_DATASIZE_4BIT (0x00000300U)
|
||||
#define SPI_DATASIZE_5BIT (0x00000400U)
|
||||
#define SPI_DATASIZE_6BIT (0x00000500U)
|
||||
#define SPI_DATASIZE_7BIT (0x00000600U)
|
||||
#define SPI_DATASIZE_8BIT (0x00000700U)
|
||||
#define SPI_DATASIZE_9BIT (0x00000800U)
|
||||
#define SPI_DATASIZE_10BIT (0x00000900U)
|
||||
#define SPI_DATASIZE_11BIT (0x00000A00U)
|
||||
#define SPI_DATASIZE_12BIT (0x00000B00U)
|
||||
#define SPI_DATASIZE_13BIT (0x00000C00U)
|
||||
#define SPI_DATASIZE_14BIT (0x00000D00U)
|
||||
#define SPI_DATASIZE_15BIT (0x00000E00U)
|
||||
#define SPI_DATASIZE_16BIT (0x00000F00U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Clock_Polarity SPI Clock Polarity
|
||||
* @{
|
||||
*/
|
||||
#define SPI_POLARITY_LOW (0x00000000U)
|
||||
#define SPI_POLARITY_HIGH SPI_CR1_CPOL
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Clock_Phase SPI Clock Phase
|
||||
* @{
|
||||
*/
|
||||
#define SPI_PHASE_1EDGE (0x00000000U)
|
||||
#define SPI_PHASE_2EDGE SPI_CR1_CPHA
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Slave_Select_management SPI Slave Select Management
|
||||
* @{
|
||||
*/
|
||||
#define SPI_NSS_SOFT SPI_CR1_SSM
|
||||
#define SPI_NSS_HARD_INPUT (0x00000000U)
|
||||
#define SPI_NSS_HARD_OUTPUT (SPI_CR2_SSOE << 16U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_NSSP_Mode SPI NSS Pulse Mode
|
||||
* @{
|
||||
*/
|
||||
#define SPI_NSS_PULSE_ENABLE SPI_CR2_NSSP
|
||||
#define SPI_NSS_PULSE_DISABLE (0x00000000U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
|
||||
* @{
|
||||
*/
|
||||
#define SPI_BAUDRATEPRESCALER_2 (0x00000000U)
|
||||
#define SPI_BAUDRATEPRESCALER_4 (SPI_CR1_BR_0)
|
||||
#define SPI_BAUDRATEPRESCALER_8 (SPI_CR1_BR_1)
|
||||
#define SPI_BAUDRATEPRESCALER_16 (SPI_CR1_BR_1 | SPI_CR1_BR_0)
|
||||
#define SPI_BAUDRATEPRESCALER_32 (SPI_CR1_BR_2)
|
||||
#define SPI_BAUDRATEPRESCALER_64 (SPI_CR1_BR_2 | SPI_CR1_BR_0)
|
||||
#define SPI_BAUDRATEPRESCALER_128 (SPI_CR1_BR_2 | SPI_CR1_BR_1)
|
||||
#define SPI_BAUDRATEPRESCALER_256 (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transmission
|
||||
* @{
|
||||
*/
|
||||
#define SPI_FIRSTBIT_MSB (0x00000000U)
|
||||
#define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_TI_mode SPI TI Mode
|
||||
* @{
|
||||
*/
|
||||
#define SPI_TIMODE_DISABLE (0x00000000U)
|
||||
#define SPI_TIMODE_ENABLE SPI_CR2_FRF
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_CRC_Calculation SPI CRC Calculation
|
||||
* @{
|
||||
*/
|
||||
#define SPI_CRCCALCULATION_DISABLE (0x00000000U)
|
||||
#define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_CRC_length SPI CRC Length
|
||||
* @{
|
||||
* This parameter can be one of the following values:
|
||||
* SPI_CRC_LENGTH_DATASIZE: aligned with the data size
|
||||
* SPI_CRC_LENGTH_8BIT : CRC 8bit
|
||||
* SPI_CRC_LENGTH_16BIT : CRC 16bit
|
||||
*/
|
||||
#define SPI_CRC_LENGTH_DATASIZE (0x00000000U)
|
||||
#define SPI_CRC_LENGTH_8BIT (0x00000001U)
|
||||
#define SPI_CRC_LENGTH_16BIT (0x00000002U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_FIFO_reception_threshold SPI FIFO Reception Threshold
|
||||
* @{
|
||||
* This parameter can be one of the following values:
|
||||
* SPI_RXFIFO_THRESHOLD or SPI_RXFIFO_THRESHOLD_QF :
|
||||
* RXNE event is generated if the FIFO
|
||||
* level is greater or equal to 1/4(8-bits).
|
||||
* SPI_RXFIFO_THRESHOLD_HF: RXNE event is generated if the FIFO
|
||||
* level is greater or equal to 1/2(16 bits). */
|
||||
#define SPI_RXFIFO_THRESHOLD SPI_CR2_FRXTH
|
||||
#define SPI_RXFIFO_THRESHOLD_QF SPI_CR2_FRXTH
|
||||
#define SPI_RXFIFO_THRESHOLD_HF (0x00000000U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Interrupt_definition SPI Interrupt Definition
|
||||
* @{
|
||||
*/
|
||||
#define SPI_IT_TXE SPI_CR2_TXEIE
|
||||
#define SPI_IT_RXNE SPI_CR2_RXNEIE
|
||||
#define SPI_IT_ERR SPI_CR2_ERRIE
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Flags_definition SPI Flags Definition
|
||||
* @{
|
||||
*/
|
||||
#define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */
|
||||
#define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */
|
||||
#define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */
|
||||
#define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */
|
||||
#define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */
|
||||
#define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */
|
||||
#define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */
|
||||
#define SPI_FLAG_FTLVL SPI_SR_FTLVL /* SPI fifo transmission level */
|
||||
#define SPI_FLAG_FRLVL SPI_SR_FRLVL /* SPI fifo reception level */
|
||||
#define SPI_FLAG_MASK (SPI_SR_RXNE | SPI_SR_TXE | SPI_SR_BSY | SPI_SR_CRCERR\
|
||||
| SPI_SR_MODF | SPI_SR_OVR | SPI_SR_FRE | SPI_SR_FTLVL | SPI_SR_FRLVL)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_transmission_fifo_status_level SPI Transmission FIFO Status Level
|
||||
* @{
|
||||
*/
|
||||
#define SPI_FTLVL_EMPTY (0x00000000U)
|
||||
#define SPI_FTLVL_QUARTER_FULL (0x00000800U)
|
||||
#define SPI_FTLVL_HALF_FULL (0x00001000U)
|
||||
#define SPI_FTLVL_FULL (0x00001800U)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_reception_fifo_status_level SPI Reception FIFO Status Level
|
||||
* @{
|
||||
*/
|
||||
#define SPI_FRLVL_EMPTY (0x00000000U)
|
||||
#define SPI_FRLVL_QUARTER_FULL (0x00000200U)
|
||||
#define SPI_FRLVL_HALF_FULL (0x00000400U)
|
||||
#define SPI_FRLVL_FULL (0x00000600U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
/** @defgroup SPI_Exported_Macros SPI Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Reset SPI handle state.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
|
||||
#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) \
|
||||
do{ \
|
||||
(__HANDLE__)->State = HAL_SPI_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0)
|
||||
#else
|
||||
#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
|
||||
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
||||
|
||||
/** @brief Enable the specified SPI interrupts.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @param __INTERRUPT__ specifies the interrupt source to enable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
|
||||
* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
|
||||
* @arg SPI_IT_ERR: Error interrupt enable
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
|
||||
|
||||
/** @brief Disable the specified SPI interrupts.
|
||||
* @param __HANDLE__ specifies the SPI handle.
|
||||
* This parameter can be SPIx where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @param __INTERRUPT__ specifies the interrupt source to disable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
|
||||
* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
|
||||
* @arg SPI_IT_ERR: Error interrupt enable
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
|
||||
|
||||
/** @brief Check whether the specified SPI interrupt source is enabled or not.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @param __INTERRUPT__ specifies the SPI interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
|
||||
* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
|
||||
* @arg SPI_IT_ERR: Error interrupt enable
|
||||
* @retval The new state of __IT__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\
|
||||
& (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||||
|
||||
/** @brief Check whether the specified SPI flag is set or not.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @param __FLAG__ specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_FLAG_RXNE: Receive buffer not empty flag
|
||||
* @arg SPI_FLAG_TXE: Transmit buffer empty flag
|
||||
* @arg SPI_FLAG_CRCERR: CRC error flag
|
||||
* @arg SPI_FLAG_MODF: Mode fault flag
|
||||
* @arg SPI_FLAG_OVR: Overrun flag
|
||||
* @arg SPI_FLAG_BSY: Busy flag
|
||||
* @arg SPI_FLAG_FRE: Frame format error flag
|
||||
* @arg SPI_FLAG_FTLVL: SPI fifo transmission level
|
||||
* @arg SPI_FLAG_FRLVL: SPI fifo reception level
|
||||
* @retval The new state of __FLAG__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
|
||||
|
||||
/** @brief Clear the SPI CRCERR pending flag.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR))
|
||||
|
||||
/** @brief Clear the SPI MODF pending flag.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \
|
||||
do{ \
|
||||
__IO uint32_t tmpreg_modf = 0x00U; \
|
||||
tmpreg_modf = (__HANDLE__)->Instance->SR; \
|
||||
CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE); \
|
||||
UNUSED(tmpreg_modf); \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Clear the SPI OVR pending flag.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \
|
||||
do{ \
|
||||
__IO uint32_t tmpreg_ovr = 0x00U; \
|
||||
tmpreg_ovr = (__HANDLE__)->Instance->DR; \
|
||||
tmpreg_ovr = (__HANDLE__)->Instance->SR; \
|
||||
UNUSED(tmpreg_ovr); \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Clear the SPI FRE pending flag.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \
|
||||
do{ \
|
||||
__IO uint32_t tmpreg_fre = 0x00U; \
|
||||
tmpreg_fre = (__HANDLE__)->Instance->SR; \
|
||||
UNUSED(tmpreg_fre); \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Enable the SPI peripheral.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)
|
||||
|
||||
/** @brief Disable the SPI peripheral.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup SPI_Private_Macros SPI Private Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Set the SPI transmit-only mode.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define SPI_1LINE_TX(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE)
|
||||
|
||||
/** @brief Set the SPI receive-only mode.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define SPI_1LINE_RX(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE)
|
||||
|
||||
/** @brief Reset the CRC calculation of the SPI.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define SPI_RESET_CRC(__HANDLE__) \
|
||||
do{ \
|
||||
CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN); \
|
||||
SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN); \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Check whether the specified SPI flag is set or not.
|
||||
* @param __SR__ copy of SPI SR register.
|
||||
* @param __FLAG__ specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_FLAG_RXNE: Receive buffer not empty flag
|
||||
* @arg SPI_FLAG_TXE: Transmit buffer empty flag
|
||||
* @arg SPI_FLAG_CRCERR: CRC error flag
|
||||
* @arg SPI_FLAG_MODF: Mode fault flag
|
||||
* @arg SPI_FLAG_OVR: Overrun flag
|
||||
* @arg SPI_FLAG_BSY: Busy flag
|
||||
* @arg SPI_FLAG_FRE: Frame format error flag
|
||||
* @arg SPI_FLAG_FTLVL: SPI fifo transmission level
|
||||
* @arg SPI_FLAG_FRLVL: SPI fifo reception level
|
||||
* @retval SET or RESET.
|
||||
*/
|
||||
#define SPI_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__) & ((__FLAG__) & SPI_FLAG_MASK)) == \
|
||||
((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET)
|
||||
|
||||
/** @brief Check whether the specified SPI Interrupt is set or not.
|
||||
* @param __CR2__ copy of SPI CR2 register.
|
||||
* @param __INTERRUPT__ specifies the SPI interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
|
||||
* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
|
||||
* @arg SPI_IT_ERR: Error interrupt enable
|
||||
* @retval SET or RESET.
|
||||
*/
|
||||
#define SPI_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__) & (__INTERRUPT__)) == \
|
||||
(__INTERRUPT__)) ? SET : RESET)
|
||||
|
||||
/** @brief Checks if SPI Mode parameter is in allowed range.
|
||||
* @param __MODE__ specifies the SPI Mode.
|
||||
* This parameter can be a value of @ref SPI_Mode
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_SLAVE) || \
|
||||
((__MODE__) == SPI_MODE_MASTER))
|
||||
|
||||
/** @brief Checks if SPI Direction Mode parameter is in allowed range.
|
||||
* @param __MODE__ specifies the SPI Direction Mode.
|
||||
* This parameter can be a value of @ref SPI_Direction
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DIRECTION(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \
|
||||
((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \
|
||||
((__MODE__) == SPI_DIRECTION_1LINE))
|
||||
|
||||
/** @brief Checks if SPI Direction Mode parameter is 2 lines.
|
||||
* @param __MODE__ specifies the SPI Direction Mode.
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES)
|
||||
|
||||
/** @brief Checks if SPI Direction Mode parameter is 1 or 2 lines.
|
||||
* @param __MODE__ specifies the SPI Direction Mode.
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \
|
||||
((__MODE__) == SPI_DIRECTION_1LINE))
|
||||
|
||||
/** @brief Checks if SPI Data Size parameter is in allowed range.
|
||||
* @param __DATASIZE__ specifies the SPI Data Size.
|
||||
* This parameter can be a value of @ref SPI_Data_Size
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) == SPI_DATASIZE_16BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_15BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_14BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_13BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_12BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_11BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_10BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_9BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_8BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_7BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_6BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_5BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_4BIT))
|
||||
|
||||
/** @brief Checks if SPI Serial clock steady state parameter is in allowed range.
|
||||
* @param __CPOL__ specifies the SPI serial clock steady state.
|
||||
* This parameter can be a value of @ref SPI_Clock_Polarity
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \
|
||||
((__CPOL__) == SPI_POLARITY_HIGH))
|
||||
|
||||
/** @brief Checks if SPI Clock Phase parameter is in allowed range.
|
||||
* @param __CPHA__ specifies the SPI Clock Phase.
|
||||
* This parameter can be a value of @ref SPI_Clock_Phase
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \
|
||||
((__CPHA__) == SPI_PHASE_2EDGE))
|
||||
|
||||
/** @brief Checks if SPI Slave Select parameter is in allowed range.
|
||||
* @param __NSS__ specifies the SPI Slave Select management parameter.
|
||||
* This parameter can be a value of @ref SPI_Slave_Select_management
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_NSS(__NSS__) (((__NSS__) == SPI_NSS_SOFT) || \
|
||||
((__NSS__) == SPI_NSS_HARD_INPUT) || \
|
||||
((__NSS__) == SPI_NSS_HARD_OUTPUT))
|
||||
|
||||
/** @brief Checks if SPI NSS Pulse parameter is in allowed range.
|
||||
* @param __NSSP__ specifies the SPI NSS Pulse Mode parameter.
|
||||
* This parameter can be a value of @ref SPI_NSSP_Mode
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_NSSP(__NSSP__) (((__NSSP__) == SPI_NSS_PULSE_ENABLE) || \
|
||||
((__NSSP__) == SPI_NSS_PULSE_DISABLE))
|
||||
|
||||
/** @brief Checks if SPI Baudrate prescaler parameter is in allowed range.
|
||||
* @param __PRESCALER__ specifies the SPI Baudrate prescaler.
|
||||
* This parameter can be a value of @ref SPI_BaudRate_Prescaler
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256))
|
||||
|
||||
/** @brief Checks if SPI MSB LSB transmission parameter is in allowed range.
|
||||
* @param __BIT__ specifies the SPI MSB LSB transmission (whether data transfer starts from MSB or LSB bit).
|
||||
* This parameter can be a value of @ref SPI_MSB_LSB_transmission
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_FIRST_BIT(__BIT__) (((__BIT__) == SPI_FIRSTBIT_MSB) || \
|
||||
((__BIT__) == SPI_FIRSTBIT_LSB))
|
||||
|
||||
/** @brief Checks if SPI TI mode parameter is in allowed range.
|
||||
* @param __MODE__ specifies the SPI TI mode.
|
||||
* This parameter can be a value of @ref SPI_TI_mode
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_TIMODE(__MODE__) (((__MODE__) == SPI_TIMODE_DISABLE) || \
|
||||
((__MODE__) == SPI_TIMODE_ENABLE))
|
||||
|
||||
/** @brief Checks if SPI CRC calculation enabled state is in allowed range.
|
||||
* @param __CALCULATION__ specifies the SPI CRC calculation enable state.
|
||||
* This parameter can be a value of @ref SPI_CRC_Calculation
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CRC_CALCULATION(__CALCULATION__) (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) || \
|
||||
((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE))
|
||||
|
||||
/** @brief Checks if SPI CRC length is in allowed range.
|
||||
* @param __LENGTH__ specifies the SPI CRC length.
|
||||
* This parameter can be a value of @ref SPI_CRC_length
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CRC_LENGTH(__LENGTH__) (((__LENGTH__) == SPI_CRC_LENGTH_DATASIZE) || \
|
||||
((__LENGTH__) == SPI_CRC_LENGTH_8BIT) || \
|
||||
((__LENGTH__) == SPI_CRC_LENGTH_16BIT))
|
||||
|
||||
/** @brief Checks if SPI polynomial value to be used for the CRC calculation, is in allowed range.
|
||||
* @param __POLYNOMIAL__ specifies the SPI polynomial value to be used for the CRC calculation.
|
||||
* This parameter must be a number between Min_Data = 0 and Max_Data = 65535
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1U) && \
|
||||
((__POLYNOMIAL__) <= 0xFFFFU) && \
|
||||
(((__POLYNOMIAL__)&0x1U) != 0U))
|
||||
|
||||
/** @brief Checks if DMA handle is valid.
|
||||
* @param __HANDLE__ specifies a DMA Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DMA_HANDLE(__HANDLE__) ((__HANDLE__) != NULL)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Include SPI HAL Extended module */
|
||||
#include "stm32g4xx_hal_spi_ex.h"
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup SPI_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
/* Initialization/de-initialization functions ********************************/
|
||||
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
|
||||
HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
|
||||
|
||||
/* Callbacks Register/UnRegister functions ***********************************/
|
||||
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
|
||||
HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID,
|
||||
pSPI_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID);
|
||||
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI_Exported_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
/* I/O operation functions ***************************************************/
|
||||
HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData,
|
||||
uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData,
|
||||
uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData,
|
||||
uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
|
||||
HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
|
||||
HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
|
||||
/* Transfer Abort functions */
|
||||
HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi);
|
||||
HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi);
|
||||
|
||||
void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI_Exported_Functions_Group3
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral State and Error functions ***************************************/
|
||||
HAL_SPI_StateTypeDef HAL_SPI_GetState(const SPI_HandleTypeDef *hspi);
|
||||
uint32_t HAL_SPI_GetError(const SPI_HandleTypeDef *hspi);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32G4xx_HAL_SPI_H */
|
||||
|
||||
|
|
@ -0,0 +1,73 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32g4xx_hal_spi_ex.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of SPI HAL Extended module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32G4xx_HAL_SPI_EX_H
|
||||
#define STM32G4xx_HAL_SPI_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32g4xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32G4xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup SPIEx
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup SPIEx_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Initialization and de-initialization functions ****************************/
|
||||
/* IO operation functions *****************************************************/
|
||||
/** @addtogroup SPIEx_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32G4xx_HAL_SPI_EX_H */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,112 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32g4xx_hal_spi_ex.c
|
||||
* @author MCD Application Team
|
||||
* @brief Extended SPI HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* SPI peripheral extended functionalities :
|
||||
* + IO operation functions
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32g4xx_hal.h"
|
||||
|
||||
/** @addtogroup STM32G4xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SPIEx SPIEx
|
||||
* @brief SPI Extended HAL module driver
|
||||
* @{
|
||||
*/
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private defines -----------------------------------------------------------*/
|
||||
/** @defgroup SPIEx_Private_Constants SPIEx Private Constants
|
||||
* @{
|
||||
*/
|
||||
#define SPI_FIFO_SIZE 4UL
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup SPIEx_Exported_Functions SPIEx Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SPIEx_Exported_Functions_Group1 IO operation functions
|
||||
* @brief Data transfers functions
|
||||
*
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### IO operation functions #####
|
||||
===============================================================================
|
||||
[..]
|
||||
This subsection provides a set of extended functions to manage the SPI
|
||||
data transfers.
|
||||
|
||||
(#) Rx data flush function:
|
||||
(++) HAL_SPIEx_FlushRxFifo()
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Flush the RX fifo.
|
||||
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified SPI module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi)
|
||||
{
|
||||
__IO uint32_t tmpreg;
|
||||
uint8_t count = 0U;
|
||||
while ((hspi->Instance->SR & SPI_FLAG_FRLVL) != SPI_FRLVL_EMPTY)
|
||||
{
|
||||
count++;
|
||||
tmpreg = hspi->Instance->DR;
|
||||
UNUSED(tmpreg); /* To avoid GCC warning */
|
||||
if (count == SPI_FIFO_SIZE)
|
||||
{
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
}
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -1512,7 +1512,7 @@
|
|||
<name>$PROJ_DIR$\..\APP\hardwareDriver\Src\HD_TIM.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\APP\hardwareDriver\Src\w25q256.c</name>
|
||||
<name>$PROJ_DIR$\..\APP\hardwareDriver\Src\w25qxx.c</name>
|
||||
</file>
|
||||
</group>
|
||||
</group>
|
||||
|
|
@ -1543,6 +1543,9 @@
|
|||
<file>
|
||||
<name>$PROJ_DIR$\..\Core\Src\rtc.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Core\Src\spi.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Core\Src\stm32g4xx_hal_msp.c</name>
|
||||
</file>
|
||||
|
|
@ -1619,6 +1622,12 @@
|
|||
<file>
|
||||
<name>$PROJ_DIR$\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rtc_ex.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_spi.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_spi_ex.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_tim.c</name>
|
||||
</file>
|
||||
|
|
|
|||
|
|
@ -67,20 +67,21 @@ Mcu.CPN=STM32G431RBT6
|
|||
Mcu.Family=STM32G4
|
||||
Mcu.IP0=ADC1
|
||||
Mcu.IP1=ADC2
|
||||
Mcu.IP10=TIM15
|
||||
Mcu.IP11=TIM16
|
||||
Mcu.IP12=UART4
|
||||
Mcu.IP13=USART2
|
||||
Mcu.IP14=USART3
|
||||
Mcu.IP10=TIM7
|
||||
Mcu.IP11=TIM15
|
||||
Mcu.IP12=TIM16
|
||||
Mcu.IP13=UART4
|
||||
Mcu.IP14=USART2
|
||||
Mcu.IP15=USART3
|
||||
Mcu.IP2=DMA
|
||||
Mcu.IP3=NVIC
|
||||
Mcu.IP4=RCC
|
||||
Mcu.IP5=RTC
|
||||
Mcu.IP6=SYS
|
||||
Mcu.IP7=TIM3
|
||||
Mcu.IP8=TIM6
|
||||
Mcu.IP9=TIM7
|
||||
Mcu.IPNb=15
|
||||
Mcu.IP6=SPI1
|
||||
Mcu.IP7=SYS
|
||||
Mcu.IP8=TIM3
|
||||
Mcu.IP9=TIM6
|
||||
Mcu.IPNb=16
|
||||
Mcu.Name=STM32G431R(6-8-B)Tx
|
||||
Mcu.Package=LQFP64
|
||||
Mcu.Pin0=PC13
|
||||
|
|
@ -199,20 +200,20 @@ PA4.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
|
|||
PA4.Locked=true
|
||||
PA4.Signal=GPIO_Output
|
||||
PA5.GPIOParameters=GPIO_Speed,GPIO_Label
|
||||
PA5.GPIO_Label=FLASH_CLK
|
||||
PA5.GPIO_Label=FLASH_SCK
|
||||
PA5.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
|
||||
PA5.Locked=true
|
||||
PA5.Signal=GPIO_Output
|
||||
PA5.Mode=Full_Duplex_Master
|
||||
PA5.Signal=SPI1_SCK
|
||||
PA6.GPIOParameters=GPIO_Speed,GPIO_Label
|
||||
PA6.GPIO_Label=FLASH_MISO
|
||||
PA6.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
|
||||
PA6.Locked=true
|
||||
PA6.Signal=GPIO_Output
|
||||
PA7.GPIOParameters=GPIO_PuPd,GPIO_Label
|
||||
PA6.Mode=Full_Duplex_Master
|
||||
PA6.Signal=SPI1_MISO
|
||||
PA7.GPIOParameters=GPIO_Speed,GPIO_Label
|
||||
PA7.GPIO_Label=FLASH_MOSI
|
||||
PA7.GPIO_PuPd=GPIO_PULLUP
|
||||
PA7.Locked=true
|
||||
PA7.Signal=GPIO_Input
|
||||
PA7.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
|
||||
PA7.Mode=Full_Duplex_Master
|
||||
PA7.Signal=SPI1_MOSI
|
||||
PB0.GPIOParameters=GPIO_Label
|
||||
PB0.GPIO_Label=PV_VOLT_IN
|
||||
PB0.Mode=IN15-Single-Ended
|
||||
|
|
@ -329,7 +330,7 @@ ProjectManager.ToolChainLocation=
|
|||
ProjectManager.UAScriptAfterPath=
|
||||
ProjectManager.UAScriptBeforePath=
|
||||
ProjectManager.UnderRoot=false
|
||||
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_ADC2_Init-ADC2-false-HAL-true,6-MX_SPI1_Init-SPI1-false-HAL-true,7-MX_TIM3_Init-TIM3-false-HAL-true,8-MX_TIM6_Init-TIM6-false-HAL-true,9-MX_UART4_Init-UART4-false-HAL-true,10-MX_USART2_UART_Init-USART2-false-HAL-true,11-MX_USART3_UART_Init-USART3-false-HAL-true,12-MX_TIM7_Init-TIM7-false-HAL-true,13-MX_TIM16_Init-TIM16-false-HAL-true,14-MX_TIM15_Init-TIM15-false-HAL-true,15-MX_RTC_Init-RTC-false-HAL-true
|
||||
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_ADC2_Init-ADC2-false-HAL-true,6-MX_TIM3_Init-TIM3-false-HAL-true,7-MX_TIM6_Init-TIM6-false-HAL-true,8-MX_UART4_Init-UART4-false-HAL-true,9-MX_USART2_UART_Init-USART2-false-HAL-true,10-MX_USART3_UART_Init-USART3-false-HAL-true,11-MX_TIM7_Init-TIM7-false-HAL-true,12-MX_TIM16_Init-TIM16-false-HAL-true,13-MX_TIM15_Init-TIM15-false-HAL-true,14-MX_RTC_Init-RTC-false-HAL-true
|
||||
RCC.ADC12Freq_Value=72000000
|
||||
RCC.AHBFreq_Value=72000000
|
||||
RCC.APB1Freq_Value=72000000
|
||||
|
|
@ -383,6 +384,12 @@ SH.GPXTI13.0=GPIO_EXTI13
|
|||
SH.GPXTI13.ConfNb=1
|
||||
SH.S_TIM3_CH4.0=TIM3_CH4,PWM Generation4 CH4
|
||||
SH.S_TIM3_CH4.ConfNb=1
|
||||
SPI1.CalculateBaudRate=36.0 MBits/s
|
||||
SPI1.DataSize=SPI_DATASIZE_8BIT
|
||||
SPI1.Direction=SPI_DIRECTION_2LINES
|
||||
SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,DataSize
|
||||
SPI1.Mode=SPI_MODE_MASTER
|
||||
SPI1.VirtualType=VM_MASTER
|
||||
STMicroelectronics.X-CUBE-ALGOBUILD.1.4.0.DSPOoLibraryJjLibrary_Checked=true
|
||||
STMicroelectronics.X-CUBE-ALGOBUILD.1.4.0.IPParameters=LibraryCcDSPOoLibraryJjDSPOoLibrary
|
||||
STMicroelectronics.X-CUBE-ALGOBUILD.1.4.0.LibraryCcDSPOoLibraryJjDSPOoLibrary=true
|
||||
|
|
|
|||
Loading…
Reference in New Issue