257 lines
12 KiB
C
257 lines
12 KiB
C
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/********************************** (C) COPYRIGHT *******************************
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* File Name : ch32v30x_sdio.h
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* Author : WCH
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* Version : V1.0.0
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* Date : 2021/06/06
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* Description : This file contains all the functions prototypes for the SDIO
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* firmware library.
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* Attention: This software (modified or not) and binary are used for
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* microcontroller manufactured by Nanjing Qinheng Microelectronics.
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*******************************************************************************/
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#ifndef __CH32V30x_SDIO_H
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#define __CH32V30x_SDIO_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "ch32v30x.h"
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/* SDIO Init structure definition */
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typedef struct
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{
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uint32_t SDIO_ClockEdge; /* Specifies the clock transition on which the bit capture is made.
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This parameter can be a value of @ref SDIO_Clock_Edge */
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uint32_t SDIO_ClockBypass; /* Specifies whether the SDIO Clock divider bypass is
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enabled or disabled.
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This parameter can be a value of @ref SDIO_Clock_Bypass */
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uint32_t SDIO_ClockPowerSave; /* Specifies whether SDIO Clock output is enabled or
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disabled when the bus is idle.
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This parameter can be a value of @ref SDIO_Clock_Power_Save */
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uint32_t SDIO_BusWide; /* Specifies the SDIO bus width.
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This parameter can be a value of @ref SDIO_Bus_Wide */
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uint32_t SDIO_HardwareFlowControl; /* Specifies whether the SDIO hardware flow control is enabled or disabled.
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This parameter can be a value of @ref SDIO_Hardware_Flow_Control */
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uint8_t SDIO_ClockDiv; /* Specifies the clock frequency of the SDIO controller.
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This parameter can be a value between 0x00 and 0xFF. */
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} SDIO_InitTypeDef;
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typedef struct
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{
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uint32_t SDIO_Argument; /* Specifies the SDIO command argument which is sent
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to a card as part of a command message. If a command
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contains an argument, it must be loaded into this register
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before writing the command to the command register */
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uint32_t SDIO_CmdIndex; /* Specifies the SDIO command index. It must be lower than 0x40. */
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uint32_t SDIO_Response; /* Specifies the SDIO response type.
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This parameter can be a value of @ref SDIO_Response_Type */
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uint32_t SDIO_Wait; /* Specifies whether SDIO wait-for-interrupt request is enabled or disabled.
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This parameter can be a value of @ref SDIO_Wait_Interrupt_State */
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uint32_t SDIO_CPSM; /* Specifies whether SDIO Command path state machine (CPSM)
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is enabled or disabled.
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This parameter can be a value of @ref SDIO_CPSM_State */
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} SDIO_CmdInitTypeDef;
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typedef struct
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{
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uint32_t SDIO_DataTimeOut; /* Specifies the data timeout period in card bus clock periods. */
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uint32_t SDIO_DataLength; /* Specifies the number of data bytes to be transferred. */
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uint32_t SDIO_DataBlockSize; /* Specifies the data block size for block transfer.
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This parameter can be a value of @ref SDIO_Data_Block_Size */
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uint32_t SDIO_TransferDir; /* Specifies the data transfer direction, whether the transfer
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is a read or write.
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This parameter can be a value of @ref SDIO_Transfer_Direction */
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uint32_t SDIO_TransferMode; /* Specifies whether data transfer is in stream or block mode.
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This parameter can be a value of @ref SDIO_Transfer_Type */
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uint32_t SDIO_DPSM; /* Specifies whether SDIO Data path state machine (DPSM)
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is enabled or disabled.
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This parameter can be a value of @ref SDIO_DPSM_State */
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} SDIO_DataInitTypeDef;
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/* SDIO_Clock_Edge */
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#define SDIO_ClockEdge_Rising ((uint32_t)0x00000000)
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#define SDIO_ClockEdge_Falling ((uint32_t)0x00002000)
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/* SDIO_Clock_Bypass */
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#define SDIO_ClockBypass_Disable ((uint32_t)0x00000000)
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#define SDIO_ClockBypass_Enable ((uint32_t)0x00000400)
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/* SDIO_Clock_Power_Save */
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#define SDIO_ClockPowerSave_Disable ((uint32_t)0x00000000)
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#define SDIO_ClockPowerSave_Enable ((uint32_t)0x00000200)
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/* SDIO_Bus_Wide */
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#define SDIO_BusWide_1b ((uint32_t)0x00000000)
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#define SDIO_BusWide_4b ((uint32_t)0x00000800)
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#define SDIO_BusWide_8b ((uint32_t)0x00001000)
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/* SDIO_Hardware_Flow_Control */
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#define SDIO_HardwareFlowControl_Disable ((uint32_t)0x00000000)
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#define SDIO_HardwareFlowControl_Enable ((uint32_t)0x00004000)
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/* SDIO_Power_State */
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#define SDIO_PowerState_OFF ((uint32_t)0x00000000)
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#define SDIO_PowerState_ON ((uint32_t)0x00000003)
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/* SDIO_Interrupt_sources */
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#define SDIO_IT_CCRCFAIL ((uint32_t)0x00000001)
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#define SDIO_IT_DCRCFAIL ((uint32_t)0x00000002)
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#define SDIO_IT_CTIMEOUT ((uint32_t)0x00000004)
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#define SDIO_IT_DTIMEOUT ((uint32_t)0x00000008)
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#define SDIO_IT_TXUNDERR ((uint32_t)0x00000010)
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#define SDIO_IT_RXOVERR ((uint32_t)0x00000020)
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#define SDIO_IT_CMDREND ((uint32_t)0x00000040)
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#define SDIO_IT_CMDSENT ((uint32_t)0x00000080)
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#define SDIO_IT_DATAEND ((uint32_t)0x00000100)
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#define SDIO_IT_STBITERR ((uint32_t)0x00000200)
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#define SDIO_IT_DBCKEND ((uint32_t)0x00000400)
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#define SDIO_IT_CMDACT ((uint32_t)0x00000800)
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#define SDIO_IT_TXACT ((uint32_t)0x00001000)
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#define SDIO_IT_RXACT ((uint32_t)0x00002000)
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#define SDIO_IT_TXFIFOHE ((uint32_t)0x00004000)
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#define SDIO_IT_RXFIFOHF ((uint32_t)0x00008000)
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#define SDIO_IT_TXFIFOF ((uint32_t)0x00010000)
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#define SDIO_IT_RXFIFOF ((uint32_t)0x00020000)
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#define SDIO_IT_TXFIFOE ((uint32_t)0x00040000)
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#define SDIO_IT_RXFIFOE ((uint32_t)0x00080000)
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#define SDIO_IT_TXDAVL ((uint32_t)0x00100000)
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#define SDIO_IT_RXDAVL ((uint32_t)0x00200000)
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#define SDIO_IT_SDIOIT ((uint32_t)0x00400000)
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#define SDIO_IT_CEATAEND ((uint32_t)0x00800000)
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/* SDIO_Response_Type */
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#define SDIO_Response_No ((uint32_t)0x00000000)
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#define SDIO_Response_Short ((uint32_t)0x00000040)
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#define SDIO_Response_Long ((uint32_t)0x000000C0)
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/* SDIO_Wait_Interrupt_State */
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#define SDIO_Wait_No ((uint32_t)0x00000000)
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#define SDIO_Wait_IT ((uint32_t)0x00000100)
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#define SDIO_Wait_Pend ((uint32_t)0x00000200)
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/* SDIO_CPSM_State */
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#define SDIO_CPSM_Disable ((uint32_t)0x00000000)
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#define SDIO_CPSM_Enable ((uint32_t)0x00000400)
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/* SDIO_Response_Registers */
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#define SDIO_RESP1 ((uint32_t)0x00000000)
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#define SDIO_RESP2 ((uint32_t)0x00000004)
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#define SDIO_RESP3 ((uint32_t)0x00000008)
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#define SDIO_RESP4 ((uint32_t)0x0000000C)
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/* SDIO_Data_Block_Size */
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#define SDIO_DataBlockSize_1b ((uint32_t)0x00000000)
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#define SDIO_DataBlockSize_2b ((uint32_t)0x00000010)
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#define SDIO_DataBlockSize_4b ((uint32_t)0x00000020)
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#define SDIO_DataBlockSize_8b ((uint32_t)0x00000030)
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#define SDIO_DataBlockSize_16b ((uint32_t)0x00000040)
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#define SDIO_DataBlockSize_32b ((uint32_t)0x00000050)
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#define SDIO_DataBlockSize_64b ((uint32_t)0x00000060)
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#define SDIO_DataBlockSize_128b ((uint32_t)0x00000070)
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#define SDIO_DataBlockSize_256b ((uint32_t)0x00000080)
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#define SDIO_DataBlockSize_512b ((uint32_t)0x00000090)
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#define SDIO_DataBlockSize_1024b ((uint32_t)0x000000A0)
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#define SDIO_DataBlockSize_2048b ((uint32_t)0x000000B0)
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#define SDIO_DataBlockSize_4096b ((uint32_t)0x000000C0)
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#define SDIO_DataBlockSize_8192b ((uint32_t)0x000000D0)
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#define SDIO_DataBlockSize_16384b ((uint32_t)0x000000E0)
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/* SDIO_Transfer_Direction */
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#define SDIO_TransferDir_ToCard ((uint32_t)0x00000000)
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#define SDIO_TransferDir_ToSDIO ((uint32_t)0x00000002)
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/* SDIO_Transfer_Type */
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#define SDIO_TransferMode_Block ((uint32_t)0x00000000)
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#define SDIO_TransferMode_Stream ((uint32_t)0x00000004)
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/* SDIO_DPSM_State */
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#define SDIO_DPSM_Disable ((uint32_t)0x00000000)
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#define SDIO_DPSM_Enable ((uint32_t)0x00000001)
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/* SDIO_Flags */
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#define SDIO_FLAG_CCRCFAIL ((uint32_t)0x00000001)
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#define SDIO_FLAG_DCRCFAIL ((uint32_t)0x00000002)
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#define SDIO_FLAG_CTIMEOUT ((uint32_t)0x00000004)
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#define SDIO_FLAG_DTIMEOUT ((uint32_t)0x00000008)
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#define SDIO_FLAG_TXUNDERR ((uint32_t)0x00000010)
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#define SDIO_FLAG_RXOVERR ((uint32_t)0x00000020)
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#define SDIO_FLAG_CMDREND ((uint32_t)0x00000040)
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#define SDIO_FLAG_CMDSENT ((uint32_t)0x00000080)
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#define SDIO_FLAG_DATAEND ((uint32_t)0x00000100)
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#define SDIO_FLAG_STBITERR ((uint32_t)0x00000200)
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#define SDIO_FLAG_DBCKEND ((uint32_t)0x00000400)
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#define SDIO_FLAG_CMDACT ((uint32_t)0x00000800)
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#define SDIO_FLAG_TXACT ((uint32_t)0x00001000)
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#define SDIO_FLAG_RXACT ((uint32_t)0x00002000)
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#define SDIO_FLAG_TXFIFOHE ((uint32_t)0x00004000)
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#define SDIO_FLAG_RXFIFOHF ((uint32_t)0x00008000)
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#define SDIO_FLAG_TXFIFOF ((uint32_t)0x00010000)
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#define SDIO_FLAG_RXFIFOF ((uint32_t)0x00020000)
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#define SDIO_FLAG_TXFIFOE ((uint32_t)0x00040000)
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#define SDIO_FLAG_RXFIFOE ((uint32_t)0x00080000)
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#define SDIO_FLAG_TXDAVL ((uint32_t)0x00100000)
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#define SDIO_FLAG_RXDAVL ((uint32_t)0x00200000)
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#define SDIO_FLAG_SDIOIT ((uint32_t)0x00400000)
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#define SDIO_FLAG_CEATAEND ((uint32_t)0x00800000)
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/* SDIO_Read_Wait_Mode */
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#define SDIO_ReadWaitMode_CLK ((uint32_t)0x00000001)
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#define SDIO_ReadWaitMode_DATA2 ((uint32_t)0x00000000)
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void SDIO_DeInit(void);
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void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct);
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void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct);
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void SDIO_ClockCmd(FunctionalState NewState);
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void SDIO_SetPowerState(uint32_t SDIO_PowerState);
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uint32_t SDIO_GetPowerState(void);
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void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState);
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void SDIO_DMACmd(FunctionalState NewState);
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void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct);
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void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct);
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uint8_t SDIO_GetCommandResponse(void);
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uint32_t SDIO_GetResponse(uint32_t SDIO_RESP);
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void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct);
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void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct);
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uint32_t SDIO_GetDataCounter(void);
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uint32_t SDIO_ReadData(void);
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void SDIO_WriteData(uint32_t Data);
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uint32_t SDIO_GetFIFOCount(void);
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void SDIO_StartSDIOReadWait(FunctionalState NewState);
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void SDIO_StopSDIOReadWait(FunctionalState NewState);
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void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode);
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void SDIO_SetSDIOOperation(FunctionalState NewState);
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void SDIO_SendSDIOSuspendCmd(FunctionalState NewState);
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void SDIO_CommandCompletionCmd(FunctionalState NewState);
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void SDIO_CEATAITCmd(FunctionalState NewState);
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void SDIO_SendCEATACmd(FunctionalState NewState);
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FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG);
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void SDIO_ClearFlag(uint32_t SDIO_FLAG);
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ITStatus SDIO_GetITStatus(uint32_t SDIO_IT);
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void SDIO_ClearITPendingBit(uint32_t SDIO_IT);
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#ifdef __cplusplus
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}
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#endif
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#endif
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