修改串口设备部分的初始化

Hardware/inc/LORA_UART.h

@@ -0,0 +1,14 @@
+/*
+ * LORA_UART.h
+ *
+ *  Created on: 2024年8月7日
+ *      Author: psx
+ */
+
+#ifndef HARDWARE_INC_LORA_UART_H_
+#define HARDWARE_INC_LORA_UART_H_
+
+#include "UART.h"
+
+
+#endif /* HARDWARE_INC_LORA_UART_H_ */

Hardware/inc/UART.h

@@ -35,7 +35,6 @@
 #define J4_USART UART8
 #define J5_0_USART USART3
 
-
 void USARTx_SendByte(USART_TypeDef* pUSARTx, uint8_t data);
 void USARTx_SendStr(USART_TypeDef* pUSARTx, char *str);
 void USARTx_SendByte_str(USART_TypeDef* pUSARTx, uint8_t data);

Hardware/inc/Upward_UART5.h

@@ -0,0 +1,15 @@
+/*
+ * Upward_UART5.h
+ *
+ *  Created on: 2024年8月7日
+ *      Author: psx
+ */
+
+#ifndef HARDWARE_INC_UPWARD_UART5_H_
+#define HARDWARE_INC_UPWARD_UART5_H_
+
+#include "UART.h"
+
+
+
+#endif /* HARDWARE_INC_UPWARD_UART5_H_ */

Hardware/inc/spi.h

@@ -1,18 +0,0 @@
-/*
- * spi.h
- *
- *  Created on: 2024年7月25日
- *      Author: psx
- */
-
-#ifndef HARDWARE_INC_SPI_H_
-#define HARDWARE_INC_SPI_H_
-
-
-
-
-
-
-
-
-#endif /* HARDWARE_INC_SPI_H_ */

Hardware/src/LORA_UART.c

@@ -0,0 +1,8 @@
+/*
+ * LORA_UART.c
+ *
+ *  Created on: 2024年8月7日
+ *      Author: psx
+ */
+
+#include "LORA_UART.h"

Hardware/src/Upward_UART5.c

@@ -0,0 +1,8 @@
+/*
+ * Upward_UART5.c
+ *
+ *  Created on: 2024年8月7日
+ *      Author: psx
+ */
+
+#include "Upward_UART5.h"

Hardware/src/spi.c

@@ -1,8 +0,0 @@
-/*
- * spi.c
- *
- *  Created on: 2024年7月25日
- *      Author: psx
- */
-
-

Software/inc/uart_dev.h

@@ -28,17 +28,14 @@ extern device_handle g_J2RS485_UART7_handle;
 extern device_handle g_J3RS485_USART2_handle;
 extern device_handle g_J4RS485_UART8_handle;
 extern device_handle g_J50RS485_USART3_handle;
-extern device_handle g_LORA_UART5_handle;
+extern device_handle g_LORA_UART4_handle;
-
+extern device_handle g_Upward_UART5_handle;
-//typedef enum{
-//   J1RS485_UART6 = UART6,
-//   J2RS485_UART7 = 7,
-//   J3RS485_USART2 = 2,
-//   J4RS485_UART8 = 8,
-//   J50RS485_USART3 = 3,
-//   LORA_UART5 = 5,
-//}uartIndex_e;
 
+/*
+ * 串口连接对应的连接的设备
+ * ONLYONE表示唯一
+ * 串口3，会分时复用，采用如下的方式确定在与谁通信
+ */
 typedef enum{
     ONLYONE = 1,
     J0RS485 = 0,
@@ -51,16 +48,17 @@ typedef enum{
 
 /* UART 驱动数据结构，对应一个uart设备 */
 typedef struct _uart_device_info{
-  uint8_t       init;
+  uint8_t       init;               /* 设备是否初始化 */
-  USART_TypeDef *uart_index;
+  USART_TypeDef *uart_index;        /* 对应的硬件串口 */
-  uint32_t      uart_baudrate;
+  uint32_t      uart_baudrate;      /* 波特率 */
-  RingQueue     uart_ring_queue;
+  RingQueue     uart_ring_queue;    /* 缓冲区 */
-  uartNum_e     uart_num;
+  uartNum_e     uart_num;           /* 对应输出的设备 */
 }uart_device_info;
 
 //device_handle uart_dev_init(uartIndex_e uart_index, uint8_t *buff, int buff_size);
 //device_handle uart_dev_init(uart_device_info *uart_device, uint8_t *buff, int buff_size);
-device_handle uart_dev_init(void);
+//device_handle uart_dev_init(void);
+uint8_t uart_all_dev_init(void);
 void uart_sendstr(device_handle device,char *str);
 void uart_dev_write(device_handle device, void *data, int len);
 int uart_dev_char_present(device_handle device);

Software/src/thread_communication.c

@@ -25,9 +25,9 @@ rt_mq_t mqSend = RT_NULL;
 rt_uint8_t Send_mq_Init(void)
 {
     mqSend = rt_mq_create("Send_mq",/* ÏûÏ¢¶ÓÁÐÃû×Ö */
-                100, /* 消息的最大长度 */
+                100,                /* 消息的最大长度 */
-                20, /* 消息队列的最大容量 */
+                20,                 /* 消息队列的最大容量 */
-                RT_IPC_FLAG_FIFO);/* 队列模式 FIFO(0x00)*/
+                RT_IPC_FLAG_FIFO);  /* 队列模式 FIFO(0x00)*/
     if (mqSend != RT_NULL)
         return 1;
     return 0;

Software/src/uart_dev.c

@@ -20,12 +20,13 @@
 static void uart_init(uart_device_info *uart_device, int baud);
 static uint8_t uart_putchar(device_handle device, char ch);
 
-device_handle g_J1RS485_UART6_handle;
+device_handle g_J1RS485_UART6_handle = 0;
-device_handle g_J2RS485_UART7_handle;
+device_handle g_J2RS485_UART7_handle = 0;
-device_handle g_J3RS485_USART2_handle;
+device_handle g_J3RS485_USART2_handle = 0;
-device_handle g_J4RS485_UART8_handle;
+device_handle g_J4RS485_UART8_handle = 0;
-device_handle g_J50RS485_USART3_handle;
+device_handle g_J50RS485_USART3_handle = 0;
-device_handle g_LORA_UART5_handle;
+device_handle g_LORA_UART4_handle = 0;
+device_handle g_Upward_UART5_handle = 0;
 
 #define IN_BUFF_SIZE 128
 static uint8_t J1RS485_in_buff[IN_BUFF_SIZE];
@@ -34,6 +35,7 @@ static uint8_t J3RS485_in_buff[IN_BUFF_SIZE];
 static uint8_t J4RS485_in_buff[IN_BUFF_SIZE];
 static uint8_t J50RS485_in_buff[IN_BUFF_SIZE];
 static uint8_t LORA_in_buff[IN_BUFF_SIZE];
+static uint8_t Upward_in_buff[IN_BUFF_SIZE];
 //uint8_t J1RS485_in_buff[IN_BUFF_SIZE];
 //uint8_t J2RS485_in_buff[IN_BUFF_SIZE];
 //uint8_t J3RS485_in_buff[IN_BUFF_SIZE];
@@ -54,31 +56,43 @@ uart_device_info uart_devices[]={
       .init          = 0,
       .uart_index    = UART6,
       .uart_num      = ONLYONE,
+      .uart_baudrate = 9600,
   },
   [1] = {
       .init          = 0,
       .uart_index    = UART7,
       .uart_num      = ONLYONE,
+      .uart_baudrate = 9600,
   },
   [2] = {
       .init          = 0,
       .uart_index    = USART2,
       .uart_num      = ONLYONE,
+      .uart_baudrate = 9600,
   },
   [3] = {
       .init          = 0,
       .uart_index    = UART8,
       .uart_num      = ONLYONE,
+      .uart_baudrate = 9600,
   },
   [4] = {
       .init          = 0,
       .uart_index    = USART3,
       .uart_num      = J0RS485,
+      .uart_baudrate = 9600,
   },
   [5] = {
+      .init          = 0,
+      .uart_index    = UART4,
+      .uart_num      = ONLYONE,
+      .uart_baudrate = 9600,
+  },
+  [6] = {
       .init          = 0,
       .uart_index    = UART5,
       .uart_num      = ONLYONE,
+      .uart_baudrate = 115200,
   },
 };
 
@@ -89,23 +103,24 @@ uart_device_info uart_devices[]={
   * @param  buff_size  串口循环buff对应大小
   * @retval 串口句柄
   */
-//#define ELEMENT_OF(x) (sizeof(x) / sizeof((x)[0]))
+#define ELEMENT_OF(x) (sizeof(x) / sizeof((x)[0]))
-//device_handle uart_dev_init(uartIndex_e uart_index, uint8_t *buff, int buff_size)
+device_handle uart_dev_init(USART_TypeDef *uart_index, uint8_t *buff, int buff_size)
-//{
+{
-//  int i = 0;
+  int i = 0;
-//  for(; i < ELEMENT_OF(uart_devices); i++){
+  for(; i < ELEMENT_OF(uart_devices); i++){
-//    if(uart_devices[i].uart_index == uart_index){
+    if(uart_devices[i].uart_index == uart_index){
-//      if(!uart_devices[i].init){
+      if(!uart_devices[i].init){
-//        InitRingQueue(&uart_devices[i].uart_ring_queue, buff, buff_size);
+        InitRingQueue(&uart_devices[i].uart_ring_queue, buff, buff_size);
-//        uart_init(uart_index, uart_devices[i].uart_baudrate);
+        uart_init(&uart_devices[i], uart_devices[i].uart_baudrate);
-//
+
-//        uart_devices[i].init = 1;
+        uart_devices[i].init = 1;
-//      }
+      }
-//      return (device_handle)(&uart_devices[i]);
+      return (device_handle)(&uart_devices[i]);
-//    }
+    }
-//  }
+  }
-//  return 0;
+  return 0;
-//}
+}
+
 //device_handle uart_dev_init(uart_device_info *uart_device, uint8_t *buff, int buff_size)
 //{
 //  int i = 0;
@@ -122,39 +137,67 @@ uart_device_info uart_devices[]={
 //  }
 //  return 0;
 //}
-device_handle uart_dev_init(void)
+
+
+//uint8_t uart_all_dev_init(void)
+//{
+//    InitRingQueue(&uart_devices[0].uart_ring_queue, J1RS485_in_buff, sizeof(J1RS485_in_buff));
+//    uart_init(&uart_devices[0], 9600);
+//    uart_devices[0].init = 1;
+//    g_J1RS485_UART6_handle = (device_handle)(&uart_devices[0]);
+//
+//    InitRingQueue(&uart_devices[1].uart_ring_queue, J2RS485_in_buff, sizeof(J2RS485_in_buff));
+//    uart_init(&uart_devices[1], 9600);
+//    uart_devices[1].init = 1;
+//    g_J2RS485_UART7_handle = (device_handle)(&uart_devices[1]);
+//
+//
+//    InitRingQueue(&uart_devices[2].uart_ring_queue, J3RS485_in_buff, sizeof(J3RS485_in_buff));
+//    uart_init(&uart_devices[2], 9600);
+//    uart_devices[2].init = 1;
+//    g_J3RS485_USART2_handle = (device_handle)(&uart_devices[2]);
+//
+//    InitRingQueue(&uart_devices[3].uart_ring_queue, J4RS485_in_buff, sizeof(J4RS485_in_buff));
+//    uart_init(&uart_devices[3], 9600);
+//    uart_devices[3].init = 1;
+//    g_J4RS485_UART8_handle = (device_handle)(&uart_devices[3]);
+//
+//
+//    InitRingQueue(&uart_devices[4].uart_ring_queue, J50RS485_in_buff, sizeof(J50RS485_in_buff));
+//    uart_init(&uart_devices[4], 9600);
+//    uart_devices[4].init = 1;
+//    g_J50RS485_USART3_handle = (device_handle)(&uart_devices[4]);
+//
+//    InitRingQueue(&uart_devices[5].uart_ring_queue, LORA_in_buff, sizeof(LORA_in_buff));
+//    uart_init(&uart_devices[5], 9600);
+//    uart_devices[5].init = 1;
+//    g_LORA_UART4_handle = (device_handle)(&uart_devices[5]);
+//
+//    return 0;
+//}
+
+uint8_t uart_all_dev_init(void)
 {
-    InitRingQueue(&uart_devices[0].uart_ring_queue, J1RS485_in_buff, sizeof(J1RS485_in_buff));
+    g_J1RS485_UART6_handle = uart_dev_init(uart_devices[0].uart_index,
-    uart_init(&uart_devices[0], 9600);
+            J1RS485_in_buff, sizeof(J1RS485_in_buff));
-    uart_devices[0].init = 1;
-    g_J1RS485_UART6_handle = (device_handle)(&uart_devices[0]);
 
-    InitRingQueue(&uart_devices[1].uart_ring_queue, J2RS485_in_buff, sizeof(J2RS485_in_buff));
+    g_J2RS485_UART7_handle = uart_dev_init(uart_devices[1].uart_index,
-    uart_init(&uart_devices[1], 9600);
+            J2RS485_in_buff, sizeof(J2RS485_in_buff));
-    uart_devices[1].init = 1;
-    g_J2RS485_UART7_handle = (device_handle)(&uart_devices[1]);
 
+    g_J3RS485_USART2_handle = uart_dev_init(uart_devices[2].uart_index,
+            J3RS485_in_buff, sizeof(J3RS485_in_buff));
 
-    InitRingQueue(&uart_devices[2].uart_ring_queue, J3RS485_in_buff, sizeof(J3RS485_in_buff));
+    g_J4RS485_UART8_handle = uart_dev_init(uart_devices[3].uart_index,
-    uart_init(&uart_devices[2], 9600);
+            J4RS485_in_buff, sizeof(J4RS485_in_buff));
-    uart_devices[2].init = 1;
-    g_J3RS485_USART2_handle = (device_handle)(&uart_devices[2]);
 
-    InitRingQueue(&uart_devices[3].uart_ring_queue, J4RS485_in_buff, sizeof(J4RS485_in_buff));
+    g_J50RS485_USART3_handle = uart_dev_init(uart_devices[4].uart_index,
-    uart_init(&uart_devices[3], 9600);
+            J50RS485_in_buff, sizeof(J50RS485_in_buff));
-    uart_devices[3].init = 1;
-    g_J4RS485_UART8_handle = (device_handle)(&uart_devices[3]);
 
+    g_LORA_UART4_handle = uart_dev_init(uart_devices[5].uart_index,
+            LORA_in_buff, sizeof(LORA_in_buff));
 
-    InitRingQueue(&uart_devices[4].uart_ring_queue, J50RS485_in_buff, sizeof(J50RS485_in_buff));
+    g_Upward_UART5_handle = uart_dev_init(uart_devices[6].uart_index,
-    uart_init(&uart_devices[4], 9600);
+            Upward_in_buff, sizeof(Upward_in_buff));
-    uart_devices[4].init = 1;
-    g_J50RS485_USART3_handle = (device_handle)(&uart_devices[4]);
-
-    InitRingQueue(&uart_devices[5].uart_ring_queue, LORA_in_buff, sizeof(LORA_in_buff));
-    uart_init(&uart_devices[5], 9600);
-    uart_devices[5].init = 1;
-    g_LORA_UART5_handle = (device_handle)(&uart_devices[5]);
 
     return 0;
 }
@@ -194,6 +237,8 @@ void uart_init(uart_device_info *uart_device, int baud)
         }
     } else if (uart_device->uart_index == UART5) {
         ;
+    } else if (uart_device->uart_index == UART4) {
+        ;
     }
 }
 

User/start.c

@@ -34,11 +34,13 @@ void hareware_init()
  */
 void software_init()
 {
-    uart_dev_init();
+    uart_all_dev_init();
     Send_mq_Init();
     Recv_thread_Init();
     Send_thread_Init();
+
     while (1);
+
 }
 
 /*

obj/Hardware/src/LORA_UART.d

@@ -0,0 +1,151 @@
+Hardware/src/LORA_UART.o: ../Hardware/src/LORA_UART.c \
+ D:\psx\su806\git\CH32V303_V0.1\Hardware\inc/LORA_UART.h \
+ D:\psx\su806\git\CH32V303_V0.1\Hardware\inc/UART.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x.h \
+ D:\psx\su806\git\CH32V303_V0.1\Core/core_riscv.h \
+ D:\psx\su806\git\CH32V303_V0.1\User/system_ch32v30x.h \
+ D:\psx\su806\git\CH32V303_V0.1\User/ch32v30x_conf.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_adc.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_bkp.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_can.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_crc.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_dac.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_dbgmcu.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_dma.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_exti.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_flash.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_fsmc.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_gpio.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_i2c.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_iwdg.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_pwr.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_rcc.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_rtc.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_sdio.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_spi.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_tim.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_usart.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_wwdg.h \
+ D:\psx\su806\git\CH32V303_V0.1\User/ch32v30x_it.h \
+ D:\psx\su806\git\CH32V303_V0.1\Debug/debug.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_misc.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rtthread.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread/rtconfig.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rtdebug.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rtdef.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rtservice.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rtm.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\finsh/finsh_api.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rthw.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/drivers/pin.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/rtdevice.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/ringbuffer.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/completion.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/dataqueue.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/workqueue.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/waitqueue.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/pipe.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/poll.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/drivers/serial.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/drivers/pin.h
+
+D:\psx\su806\git\CH32V303_V0.1\Hardware\inc/LORA_UART.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Hardware\inc/UART.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Core/core_riscv.h:
+
+D:\psx\su806\git\CH32V303_V0.1\User/system_ch32v30x.h:
+
+D:\psx\su806\git\CH32V303_V0.1\User/ch32v30x_conf.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_adc.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_bkp.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_can.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_crc.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_dac.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_dbgmcu.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_dma.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_exti.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_flash.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_fsmc.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_gpio.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_i2c.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_iwdg.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_pwr.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_rcc.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_rtc.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_sdio.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_spi.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_tim.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_usart.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_wwdg.h:
+
+D:\psx\su806\git\CH32V303_V0.1\User/ch32v30x_it.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Debug/debug.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_misc.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rtthread.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread/rtconfig.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rtdebug.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rtdef.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rtservice.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rtm.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\finsh/finsh_api.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rthw.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/drivers/pin.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/rtdevice.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/ringbuffer.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/completion.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/dataqueue.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/workqueue.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/waitqueue.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/pipe.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/poll.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/drivers/serial.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/drivers/pin.h:

obj/Hardware/src/Upward_UART5.d

@@ -0,0 +1,151 @@
+Hardware/src/Upward_UART5.o: ../Hardware/src/Upward_UART5.c \
+ D:\psx\su806\git\CH32V303_V0.1\Hardware\inc/Upward_UART5.h \
+ D:\psx\su806\git\CH32V303_V0.1\Hardware\inc/UART.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x.h \
+ D:\psx\su806\git\CH32V303_V0.1\Core/core_riscv.h \
+ D:\psx\su806\git\CH32V303_V0.1\User/system_ch32v30x.h \
+ D:\psx\su806\git\CH32V303_V0.1\User/ch32v30x_conf.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_adc.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_bkp.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_can.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_crc.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_dac.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_dbgmcu.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_dma.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_exti.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_flash.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_fsmc.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_gpio.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_i2c.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_iwdg.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_pwr.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_rcc.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_rtc.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_sdio.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_spi.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_tim.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_usart.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_wwdg.h \
+ D:\psx\su806\git\CH32V303_V0.1\User/ch32v30x_it.h \
+ D:\psx\su806\git\CH32V303_V0.1\Debug/debug.h \
+ D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_misc.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rtthread.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread/rtconfig.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rtdebug.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rtdef.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rtservice.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rtm.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\finsh/finsh_api.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rthw.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/drivers/pin.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/rtdevice.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/ringbuffer.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/completion.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/dataqueue.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/workqueue.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/waitqueue.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/pipe.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/poll.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/drivers/serial.h \
+ D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/drivers/pin.h
+
+D:\psx\su806\git\CH32V303_V0.1\Hardware\inc/Upward_UART5.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Hardware\inc/UART.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Core/core_riscv.h:
+
+D:\psx\su806\git\CH32V303_V0.1\User/system_ch32v30x.h:
+
+D:\psx\su806\git\CH32V303_V0.1\User/ch32v30x_conf.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_adc.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_bkp.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_can.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_crc.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_dac.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_dbgmcu.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_dma.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_exti.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_flash.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_fsmc.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_gpio.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_i2c.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_iwdg.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_pwr.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_rcc.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_rtc.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_sdio.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_spi.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_tim.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_usart.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_wwdg.h:
+
+D:\psx\su806\git\CH32V303_V0.1\User/ch32v30x_it.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Debug/debug.h:
+
+D:\psx\su806\git\CH32V303_V0.1\Peripheral\inc/ch32v30x_misc.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rtthread.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread/rtconfig.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rtdebug.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rtdef.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rtservice.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rtm.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\finsh/finsh_api.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\include/rthw.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/drivers/pin.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/rtdevice.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/ringbuffer.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/completion.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/dataqueue.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/workqueue.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/waitqueue.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/pipe.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/ipc/poll.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/drivers/serial.h:
+
+D:\psx\su806\git\CH32V303_V0.1\rtthread\components\drivers\include/drivers/pin.h:

obj/Hardware/src/spi.d

@@ -1 +0,0 @@
-Hardware/src/spi.o: ../Hardware/src/spi.c

obj/Hardware/src/subdir.mk

@@ -12,8 +12,9 @@ C_SRCS += \
 ../Hardware/src/J3_USART2.c \
 ../Hardware/src/J4_UART8.c \
 ../Hardware/src/J5-0_USART3.c \
+../Hardware/src/LORA_UART.c \
 ../Hardware/src/UART.c \
-../Hardware/src/spi.c 
+../Hardware/src/Upward_UART5.c 
 
 OBJS += \
 ./Hardware/src/Android.o \
@@ -23,8 +24,9 @@ OBJS += \
 ./Hardware/src/J3_USART2.o \
 ./Hardware/src/J4_UART8.o \
 ./Hardware/src/J5-0_USART3.o \
+./Hardware/src/LORA_UART.o \
 ./Hardware/src/UART.o \
-./Hardware/src/spi.o 
+./Hardware/src/Upward_UART5.o 
 
 C_DEPS += \
 ./Hardware/src/Android.d \
@@ -34,8 +36,9 @@ C_DEPS += \
 ./Hardware/src/J3_USART2.d \
 ./Hardware/src/J4_UART8.d \
 ./Hardware/src/J5-0_USART3.d \
+./Hardware/src/LORA_UART.d \
 ./Hardware/src/UART.d \
-./Hardware/src/spi.d 
+./Hardware/src/Upward_UART5.d 
 
 
 # Each subdirectory must supply rules for building sources it contributes