94 lines
3.9 KiB
C
94 lines
3.9 KiB
C
/********************************** (C) COPYRIGHT *******************************
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* File Name : ch32v30x_misc.h
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* Author : WCH
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* Version : V1.0.0
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* Date : 2024/03/06
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* Description : This file contains all the functions prototypes for the
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* miscellaneous firmware library functions.
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* Attention: This software (modified or not) and binary are used for
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* microcontroller manufactured by Nanjing Qinheng Microelectronics.
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*******************************************************************************/
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#ifndef __CH32V30X_MISC_H
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#define __CH32V30X_MISC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "ch32v30x.h"
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/* CSR_INTSYSCR_INEST_definition */
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#define INTSYSCR_INEST_NoEN 0x00 /* interrupt nesting disable(CSR-0x804 bit1 = 0) */
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#define INTSYSCR_INEST_EN_2Level 0x01 /* interrupt nesting enable-2 Level(CSR-0x804 bit1 = 1 bit[3:2] = 1) */
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#define INTSYSCR_INEST_EN_4Level 0x02 /* interrupt nesting enable-4 Level(CSR-0x804 bit1 = 1 bit[3:2] = 2) */
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#define INTSYSCR_INEST_EN_8Level 0x03 /* interrupt nesting enable-8 Level(CSR-0x804 bit1 = 1 bit[3:2] = 3) */
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/* Check the configuration of CSR(0x804) in the startup file(.S)
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* interrupt nesting enable-8 Level(CSR-0x804 bit1 = 1 bit[3:2] = 3)
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* priority - bit[7:5] - Preemption Priority
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* bit[4:0] - Reserve
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* interrupt nesting enable-4 Level(CSR-0x804 bit1 = 1 bit[3:2] = 2)
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* priority - bit[7:6] - Preemption Priority
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* bit[5] - Sub priority
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* bit[4:0] - Reserve
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* interrupt nesting enable-2 Level(CSR-0x804 bit1 = 1 bit[3:2] = 1)
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* priority - bit[7] - Preemption Priority
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* bit[6:5] - Sub priority
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* bit[4:0] - Reserve
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* interrupt nesting disable(CSR-0x804 bit1 = 0)
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* priority - bit[7:5] - Sub priority
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* bit[4:0] - Reserve
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*/
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#ifndef INTSYSCR_INEST
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#define INTSYSCR_INEST INTSYSCR_INEST_EN_4Level
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#endif
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/* NVIC Init Structure definition
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* interrupt nesting disable(CSR-0x804 bit1 = 0)
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* NVIC_IRQChannelPreemptionPriority - range is 0.
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* NVIC_IRQChannelSubPriority - range from 0 to 7.
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*
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* interrupt nesting enable-2 Level(CSR-0x804 bit1 = 1 bit[3:2] = 1)
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* NVIC_IRQChannelPreemptionPriority - range from 0 to 1.
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* NVIC_IRQChannelSubPriority - range from 0 to 3.
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*
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* interrupt nesting enable-4 Level(CSR-0x804 bit1 = 1 bit[3:2] = 2)
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* NVIC_IRQChannelPreemptionPriority - range from 0 to 3.
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* NVIC_IRQChannelSubPriority - range from 0 to 1.
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*
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* interrupt nesting enable-8 Level(CSR-0x804 bit1 = 1 bit[3:2] = 3)
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* NVIC_IRQChannelPreemptionPriority - range from 0 to 7.
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* NVIC_IRQChannelSubPriority - range range is 0.
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*/
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typedef struct
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{
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uint8_t NVIC_IRQChannel;
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uint8_t NVIC_IRQChannelPreemptionPriority;
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uint8_t NVIC_IRQChannelSubPriority;
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FunctionalState NVIC_IRQChannelCmd;
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} NVIC_InitTypeDef;
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/* Preemption_Priority_Group */
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#if (INTSYSCR_INEST == INTSYSCR_INEST_NoEN)
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#define NVIC_PriorityGroup_0 ((uint32_t)0x00) /* interrupt nesting disable(CSR-0x804 bit1 = 0) */
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#elif (INTSYSCR_INEST == INTSYSCR_INEST_EN_2Level)
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#define NVIC_PriorityGroup_1 ((uint32_t)0x01) /* interrupt nesting enable-2 Level(CSR-0x804 bit1 = 1 bit[3:2] = 1) */
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#elif (INTSYSCR_INEST == INTSYSCR_INEST_EN_8Level)
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#define NVIC_PriorityGroup_3 ((uint32_t)0x03) /* interrupt nesting enable-8 Level(CSR-0x804 bit1 = 1 bit[3:2] = 3) */
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#else
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#define NVIC_PriorityGroup_2 ((uint32_t)0x02) /* interrupt nesting enable-4 Level(CSR-0x804 bit1 = 1 bit[3:2] = 2) */
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#endif
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void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup);
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void NVIC_Init(NVIC_InitTypeDef *NVIC_InitStruct);
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#ifdef __cplusplus
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}
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#endif
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#endif
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