673 lines
21 KiB
C
673 lines
21 KiB
C
/********************************** (C) COPYRIGHT *******************************
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* File Name : ch32v30x_SDIO.c
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* Author : WCH
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* Version : V1.0.0
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* Date : 2021/06/06
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* Description : This file provides all the SDIO firmware functions.
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* Attention: This software (modified or not) and binary are used for
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* microcontroller manufactured by Nanjing Qinheng Microelectronics.
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*******************************************************************************/
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#include "ch32v30x_sdio.h"
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#include "ch32v30x_rcc.h"
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#define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE)
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/* CLKCR register clear mask */
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#define CLKCR_CLEAR_MASK ((uint32_t)0xFFFF8100)
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/* SDIO PWRCTRL Mask */
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#define PWR_PWRCTRL_MASK ((uint32_t)0xFFFFFFFC)
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/* SDIO DCTRL Clear Mask */
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#define DCTRL_CLEAR_MASK ((uint32_t)0xFFFFFF08)
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/* CMD Register clear mask */
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#define CMD_CLEAR_MASK ((uint32_t)0xFFFFF800)
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/* SDIO RESP Registers Address */
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#define SDIO_RESP_ADDR ((uint32_t)(SDIO_BASE + 0x14))
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/*********************************************************************
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* @fn SDIO_DeInit
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*
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* @brief Deinitializes the SDIO peripheral registers to their default
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* reset values.
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*
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* @return RTC counter value
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*/
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void SDIO_DeInit(void)
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{
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SDIO->POWER = 0x00000000;
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SDIO->CLKCR = 0x00000000;
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SDIO->ARG = 0x00000000;
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SDIO->CMD = 0x00000000;
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SDIO->DTIMER = 0x00000000;
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SDIO->DLEN = 0x00000000;
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SDIO->DCTRL = 0x00000000;
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SDIO->ICR = 0x00C007FF;
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SDIO->MASK = 0x00000000;
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}
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/*********************************************************************
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* @fn SDIO_Init
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*
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* @brief Initializes the SDIO peripheral according to the specified
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* parameters in the SDIO_InitStruct.
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*
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* @param SDIO_InitStruct - pointer to a SDIO_InitTypeDef structure
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* that contains the configuration information for the SDIO peripheral.
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*
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* @return None
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*/
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void SDIO_Init(SDIO_InitTypeDef *SDIO_InitStruct)
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{
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uint32_t tmpreg = 0;
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tmpreg = SDIO->CLKCR;
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tmpreg &= CLKCR_CLEAR_MASK;
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tmpreg |= (SDIO_InitStruct->SDIO_ClockDiv | SDIO_InitStruct->SDIO_ClockPowerSave |
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SDIO_InitStruct->SDIO_ClockBypass | SDIO_InitStruct->SDIO_BusWide |
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SDIO_InitStruct->SDIO_ClockEdge | SDIO_InitStruct->SDIO_HardwareFlowControl);
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SDIO->CLKCR = tmpreg;
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}
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/*********************************************************************
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* @fn SDIO_StructInit
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*
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* @brief Fills each SDIO_InitStruct member with its default value.
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*
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* @param SDIO_InitStruct - pointer to an SDIO_InitTypeDef structure which
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* will be initialized.
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*
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* @return none
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*/
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void SDIO_StructInit(SDIO_InitTypeDef *SDIO_InitStruct)
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{
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SDIO_InitStruct->SDIO_ClockDiv = 0x00;
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SDIO_InitStruct->SDIO_ClockEdge = SDIO_ClockEdge_Rising;
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SDIO_InitStruct->SDIO_ClockBypass = SDIO_ClockBypass_Disable;
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SDIO_InitStruct->SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable;
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SDIO_InitStruct->SDIO_BusWide = SDIO_BusWide_1b;
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SDIO_InitStruct->SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable;
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}
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/*********************************************************************
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* @fn SDIO_ClockCmd
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*
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* @brief Enables or disables the SDIO Clock.
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*
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* @param SDIO_InitStruct - pointer to an SDIO_InitTypeDef structure which
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* will be initialized.
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*
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* @return none
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*/
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void SDIO_ClockCmd(FunctionalState NewState)
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{
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if(NewState)
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SDIO->CLKCR |= (1 << 8);
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else
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SDIO->CLKCR &= ~(1 << 8);
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}
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/*********************************************************************
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* @fn SDIO_SetPowerState
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*
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* @brief Sets the power status of the controller.
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*
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* @param SDIO_PowerState - new state of the Power state.
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* SDIO_PowerState_OFF
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* SDIO_PowerState_ON
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*
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* @return none
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*/
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void SDIO_SetPowerState(uint32_t SDIO_PowerState)
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{
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SDIO->POWER &= PWR_PWRCTRL_MASK;
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SDIO->POWER |= SDIO_PowerState;
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}
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/*********************************************************************
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* @fn SDIO_GetPowerState
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*
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* @brief Gets the power status of the controller.
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*
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* @param CounterValue - RTC counter new value.
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*
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* @return power state -
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* 0x00 - Power OFF
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* 0x02 - Power UP
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* 0x03 - Power ON
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*/
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uint32_t SDIO_GetPowerState(void)
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{
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return (SDIO->POWER & (~PWR_PWRCTRL_MASK));
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}
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/*********************************************************************
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* @fn SDIO_ITConfig
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*
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* @brief Enables or disables the SDIO interrupts.
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*
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* @param DIO_IT - specifies the SDIO interrupt sources to be enabled or disabled.
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* SDIO_IT_CCRCFAIL
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* SDIO_IT_DCRCFAIL
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* SDIO_IT_CTIMEOUT
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* SDIO_IT_DTIMEOUT
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* SDIO_IT_TXUNDERR
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* SDIO_IT_RXOVERR
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* SDIO_IT_CMDREND
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* SDIO_IT_CMDSENT
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* SDIO_IT_DATAEND
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* SDIO_IT_STBITERR
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* SDIO_IT_DBCKEND
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* SDIO_IT_CMDACT
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* SDIO_IT_TXACT
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* SDIO_IT_RXACT
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* SDIO_IT_TXFIFOHE
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* SDIO_IT_RXFIFOHF
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* SDIO_IT_TXFIFOF
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* SDIO_IT_RXFIFOF
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* SDIO_IT_TXFIFOE
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* SDIO_IT_RXFIFOE
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* SDIO_IT_TXDAVL
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* SDIO_IT_RXDAVL
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* SDIO_IT_SDIOIT
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* SDIO_IT_CEATAEND
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* NewState - ENABLE or DISABLE.
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*
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* @return none
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*/
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void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState)
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{
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if(NewState != DISABLE)
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{
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SDIO->MASK |= SDIO_IT;
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}
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else
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{
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SDIO->MASK &= ~SDIO_IT;
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}
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}
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/*********************************************************************
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* @fn SDIO_DMACmd
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*
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* @brief Enables or disables the SDIO DMA request.
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*
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* @param NewState - ENABLE or DISABLE.
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*
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* @return none
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*/
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void SDIO_DMACmd(FunctionalState NewState)
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{
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if(NewState)
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SDIO->DCTRL |= (1 << 3);
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else
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SDIO->DCTRL &= ~(1 << 3);
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}
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/*********************************************************************
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* @fn SDIO_SendCommand
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*
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* @brief Initializes the SDIO Command according to the specified
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* parameters in the SDIO_CmdInitStruct and send the command.
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* @param SDIO_CmdInitStruct - pointer to a SDIO_CmdInitTypeDef
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* structure that contains the configuration information for
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* ddthe SDIO command.
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*
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* @return none
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*/
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void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct)
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{
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uint32_t tmpreg = 0;
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SDIO->ARG = SDIO_CmdInitStruct->SDIO_Argument;
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tmpreg = SDIO->CMD;
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tmpreg &= CMD_CLEAR_MASK;
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tmpreg |= (uint32_t)SDIO_CmdInitStruct->SDIO_CmdIndex | SDIO_CmdInitStruct->SDIO_Response | SDIO_CmdInitStruct->SDIO_Wait | SDIO_CmdInitStruct->SDIO_CPSM;
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SDIO->CMD = tmpreg;
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}
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/*********************************************************************
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* @fn SDIO_CmdStructInit
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*
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* @brief Fills each SDIO_CmdInitStruct member with its default value.
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*
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* @param SDIO_CmdInitStruct - pointer to an SDIO_CmdInitTypeDef
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* structure which will be initialized.
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*
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* @return none
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*/
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void SDIO_CmdStructInit(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct)
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{
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SDIO_CmdInitStruct->SDIO_Argument = 0x00;
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SDIO_CmdInitStruct->SDIO_CmdIndex = 0x00;
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SDIO_CmdInitStruct->SDIO_Response = SDIO_Response_No;
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SDIO_CmdInitStruct->SDIO_Wait = SDIO_Wait_No;
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SDIO_CmdInitStruct->SDIO_CPSM = SDIO_CPSM_Disable;
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}
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/*********************************************************************
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* @fn SDIO_GetCommandResponse
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*
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* @brief Returns command index of last command for which response received.
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*
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* @return Returns the command index of the last command response received.
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*/
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uint8_t SDIO_GetCommandResponse(void)
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{
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return (uint8_t)(SDIO->RESPCMD);
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}
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/*********************************************************************
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* @fn SDIO_GetResponse
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*
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* @brief Returns response received from the card for the last command.
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*
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* @param SDIO_RESP - Specifies the SDIO response register.
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* SDIO_RESP1 - Response Register 1
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* SDIO_RESP2 - Response Register 2
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* SDIO_RESP3 - Response Register 3
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* SDIO_RESP4 - Response Register 4
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*
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* @return Returns the command index of the last command response received.
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*/
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uint32_t SDIO_GetResponse(uint32_t SDIO_RESP)
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{
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__IO uint32_t tmp = 0;
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tmp = SDIO_RESP_ADDR + SDIO_RESP;
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return (*(__IO uint32_t *)tmp);
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}
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/*********************************************************************
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* @fn SDIO_DataConfig
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*
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* @brief Initializes the SDIO data path according to the specified
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*
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* @param SDIO_DataInitStruct - pointer to a SDIO_DataInitTypeDef structure that
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* contains the configuration information for the SDIO command.
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*
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* @return none
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*/
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void SDIO_DataConfig(SDIO_DataInitTypeDef *SDIO_DataInitStruct)
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{
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uint32_t tmpreg = 0;
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SDIO->DTIMER = SDIO_DataInitStruct->SDIO_DataTimeOut;
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SDIO->DLEN = SDIO_DataInitStruct->SDIO_DataLength;
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tmpreg = SDIO->DCTRL;
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tmpreg &= DCTRL_CLEAR_MASK;
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tmpreg |= (uint32_t)SDIO_DataInitStruct->SDIO_DataBlockSize | SDIO_DataInitStruct->SDIO_TransferDir | SDIO_DataInitStruct->SDIO_TransferMode | SDIO_DataInitStruct->SDIO_DPSM;
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SDIO->DCTRL = tmpreg;
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}
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/*********************************************************************
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* @fn SDIO_DataStructInit
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*
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* @brief Fills each SDIO_DataInitStruct member with its default value.
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*
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* @param SDIO_DataInitStruct - pointer to an SDIO_DataInitTypeDef
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* structure which will be initialized.
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*
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* @return RTC counter value
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*/
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void SDIO_DataStructInit(SDIO_DataInitTypeDef *SDIO_DataInitStruct)
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{
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SDIO_DataInitStruct->SDIO_DataTimeOut = 0xFFFFFFFF;
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SDIO_DataInitStruct->SDIO_DataLength = 0x00;
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SDIO_DataInitStruct->SDIO_DataBlockSize = SDIO_DataBlockSize_1b;
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SDIO_DataInitStruct->SDIO_TransferDir = SDIO_TransferDir_ToCard;
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SDIO_DataInitStruct->SDIO_TransferMode = SDIO_TransferMode_Block;
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SDIO_DataInitStruct->SDIO_DPSM = SDIO_DPSM_Disable;
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}
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/*********************************************************************
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* @fn SDIO_GetDataCounter
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*
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* @brief Returns number of remaining data bytes to be transferred.
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*
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* @return Number of remaining data bytes to be transferred
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*/
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uint32_t SDIO_GetDataCounter(void)
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{
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return SDIO->DCOUNT;
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}
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/*********************************************************************
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* @fn SDIO_ReadData
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*
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* @brief Read one data word from Rx FIFO.
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*
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* @return Data received
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*/
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uint32_t SDIO_ReadData(void)
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{
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return SDIO->FIFO;
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}
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/*********************************************************************
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* @fn SDIO_WriteData
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*
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* @brief Write one data word to Tx FIFO.
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*
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* @param Data - 32-bit data word to write.
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*
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* @return RTC counter value
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*/
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void SDIO_WriteData(uint32_t Data)
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{
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SDIO->FIFO = Data;
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}
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/*********************************************************************
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* @fn SDIO_GetFIFOCount
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*
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* @brief Returns the number of words left to be written to or read from FIFO.
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*
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* @return Remaining number of words.
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*/
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uint32_t SDIO_GetFIFOCount(void)
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{
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return SDIO->FIFOCNT;
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}
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/*********************************************************************
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* @fn SDIO_StartSDIOReadWait
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*
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* @brief Starts the SD I/O Read Wait operation.
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*
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* @param NewState - ENABLE or DISABLE.
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*
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* @return none
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*/
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void SDIO_StartSDIOReadWait(FunctionalState NewState)
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{
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if(NewState)
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SDIO->DCTRL |= (1 << 8);
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else
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SDIO->DCTRL &= ~(1 << 8);
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}
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/*********************************************************************
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* @fn SDIO_StopSDIOReadWait
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*
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* @brief Stops the SD I/O Read Wait operation.
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*
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* @param NewState - ENABLE or DISABLE.
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*
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* @return none
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*/
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void SDIO_StopSDIOReadWait(FunctionalState NewState)
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{
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if(NewState)
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SDIO->DCTRL |= (1 << 9);
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else
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SDIO->DCTRL &= ~(1 << 9);
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}
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/*********************************************************************
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* @fn SDIO_SetSDIOReadWaitMode
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*
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* @brief Sets one of the two options of inserting read wait interval.
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*
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* @param SDIO_ReadWaitMode - SD I/O Read Wait operation mode.
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* SDIO_ReadWaitMode_CLK - Read Wait control by stopping SDIOCLK
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* SDIO_ReadWaitMode_DATA2 - Read Wait control using SDIO_DATA2
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*
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* @return none
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*/
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void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode)
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{
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if(SDIO_ReadWaitMode)
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SDIO->DCTRL |= (1 << 10);
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else
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SDIO->DCTRL &= ~(1 << 10);
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}
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/*********************************************************************
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* @fn SDIO_SetSDIOOperation
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*
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* @brief Enables or disables the SD I/O Mode Operation.
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*
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* @param NewState: ENABLE or DISABLE.
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*
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* @return none
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*/
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void SDIO_SetSDIOOperation(FunctionalState NewState)
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{
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if(NewState)
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SDIO->DCTRL |= (1 << 11);
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else
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SDIO->DCTRL &= ~(1 << 11);
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}
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/*********************************************************************
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* @fn SDIO_SendSDIOSuspendCmd
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*
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* @brief Enables or disables the SD I/O Mode suspend command sending.
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*
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* @param NewState - ENABLE or DISABLE.
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*
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* @return none
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*/
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void SDIO_SendSDIOSuspendCmd(FunctionalState NewState)
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{
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if(NewState)
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SDIO->CMD |= (1 << 11);
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else
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SDIO->CMD &= ~(1 << 11);
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}
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/*********************************************************************
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* @fn SDIO_CommandCompletionCmd
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*
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* @brief Enables or disables the command completion signal.
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*
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* @param NewState - ENABLE or DISABLE.
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*
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* @return none
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*/
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void SDIO_CommandCompletionCmd(FunctionalState NewState)
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{
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if(NewState)
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SDIO->CMD |= (1 << 12);
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else
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SDIO->CMD &= ~(1 << 12);
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}
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/*********************************************************************
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* @fn SDIO_CEATAITCmd
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*
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* @brief Enables or disables the CE-ATA interrupt.
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*
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* @param NewState - ENABLE or DISABLE.
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*
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* @return none
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*/
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void SDIO_CEATAITCmd(FunctionalState NewState)
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{
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if(NewState)
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SDIO->CMD |= (1 << 13);
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else
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SDIO->CMD &= ~(1 << 13);
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}
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/*********************************************************************
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* @fn SDIO_SendCEATACmd
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*
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* @brief Sends CE-ATA command (CMD61).
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*
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* @param NewState - ENABLE or DISABLE.
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*
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* @return RTC counter value
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*/
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void SDIO_SendCEATACmd(FunctionalState NewState)
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{
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if(NewState)
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SDIO->CMD |= (1 << 14);
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else
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SDIO->CMD &= ~(1 << 14);
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}
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/*********************************************************************
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* @fn SDIO_GetFlagStatus
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*
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* @brief Checks whether the specified SDIO flag is set or not.
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*
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* @param SDIO_FLAG - specifies the flag to check.
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* SDIO_FLAG_CCRCFAIL - Command response received (CRC check failed)
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* SDIO_FLAG_DCRCFAIL - Data block sent/received (CRC check failed)
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* SDIO_FLAG_CTIMEOUT - Command response timeout
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* SDIO_FLAG_DTIMEOUT - Data timeout
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* SDIO_FLAG_TXUNDERR - Transmit FIFO underrun error
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* SDIO_FLAG_RXOVERR - Received FIFO overrun error
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* SDIO_FLAG_CMDREND - Command response received (CRC check passed)
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* SDIO_FLAG_CMDSENT - Command sent (no response required)
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* SDIO_FLAG_DATAEND - Data end (data counter, SDIDCOUNT, is zero)
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* SDIO_FLAG_STBITERR - Start bit not detected on all data signals
|
|
* in wide bus mode.
|
|
* SDIO_FLAG_DBCKEND - Data block sent/received (CRC check passed)
|
|
* SDIO_FLAG_CMDACT - Command transfer in progress
|
|
* SDIO_FLAG_TXACT - Data transmit in progress
|
|
* SDIO_FLAG_RXACT - Data receive in progress
|
|
* SDIO_FLAG_TXFIFOHE - Transmit FIFO Half Empty
|
|
* SDIO_FLAG_RXFIFOHF - Receive FIFO Half Full
|
|
* SDIO_FLAG_TXFIFOF - Transmit FIFO full
|
|
* SDIO_FLAG_RXFIFOF - Receive FIFO full
|
|
* SDIO_FLAG_TXFIFOE - Transmit FIFO empty
|
|
* SDIO_FLAG_RXFIFOE - Receive FIFO empty
|
|
* SDIO_FLAG_TXDAVL - Data available in transmit FIFO
|
|
* SDIO_FLAG_RXDAVL - Data available in receive FIFO
|
|
* SDIO_FLAG_SDIOIT - SD I/O interrupt received
|
|
* SDIO_FLAG_CEATAEND - CE-ATA command completion signal received
|
|
* for CMD61
|
|
*
|
|
* @return ITStatus - SET or RESET
|
|
*/
|
|
FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG)
|
|
{
|
|
FlagStatus bitstatus = RESET;
|
|
|
|
if((SDIO->STA & SDIO_FLAG) != (uint32_t)RESET)
|
|
{
|
|
bitstatus = SET;
|
|
}
|
|
else
|
|
{
|
|
bitstatus = RESET;
|
|
}
|
|
return bitstatus;
|
|
}
|
|
|
|
/*********************************************************************
|
|
* @fn SDIO_ClearFlag
|
|
*
|
|
* @brief Clears the SDIO's pending flags.
|
|
*
|
|
* @param SDIO_FLAG - specifies the flag to clear.
|
|
* SDIO_FLAG_CCRCFAIL - Command response received (CRC check failed)
|
|
* SDIO_FLAG_DCRCFAIL - Data block sent/received (CRC check failed)
|
|
* SDIO_FLAG_CTIMEOUT - Command response timeout
|
|
* SDIO_FLAG_DTIMEOUT - Data timeout
|
|
* SDIO_FLAG_TXUNDERR - Transmit FIFO underrun error
|
|
* SDIO_FLAG_RXOVERR - Received FIFO overrun error
|
|
* SDIO_FLAG_CMDREND - Command response received (CRC check passed)
|
|
* SDIO_FLAG_CMDSENT - Command sent (no response required)
|
|
* SDIO_FLAG_DATAEND - Data end (data counter, SDIDCOUNT, is zero)
|
|
* SDIO_FLAG_STBITERR - Start bit not detected on all data signals
|
|
* in wide bus mode
|
|
* SDIO_FLAG_DBCKEND - Data block sent/received (CRC check passed)
|
|
* SDIO_FLAG_SDIOIT - SD I/O interrupt received
|
|
* SDIO_FLAG_CEATAEND - CE-ATA command completion signal received for CMD61
|
|
*
|
|
* @return none
|
|
*/
|
|
void SDIO_ClearFlag(uint32_t SDIO_FLAG)
|
|
{
|
|
SDIO->ICR = SDIO_FLAG;
|
|
}
|
|
|
|
/*********************************************************************
|
|
* @fn SDIO_GetITStatus
|
|
*
|
|
* @brief Checks whether the specified SDIO interrupt has occurred or not.
|
|
*
|
|
* @param SDIO_IT: specifies the SDIO interrupt source to check.
|
|
* SDIO_IT_CCRCFAIL - Command response received (CRC check failed) interrupt
|
|
* SDIO_IT_DCRCFAIL - Data block sent/received (CRC check failed) interrupt
|
|
* SDIO_IT_CTIMEOUT - Command response timeout interrupt
|
|
* SDIO_IT_DTIMEOUT - Data timeout interrupt
|
|
* SDIO_IT_TXUNDERR - Transmit FIFO underrun error interrupt
|
|
* SDIO_IT_RXOVERR - Received FIFO overrun error interrupt
|
|
* SDIO_IT_CMDREND - Command response received (CRC check passed) interrupt
|
|
* SDIO_IT_CMDSENT - Command sent (no response required) interrupt
|
|
* SDIO_IT_DATAEND - Data end (data counter, SDIDCOUNT, is zero) interrupt
|
|
* SDIO_IT_STBITERR - Start bit not detected on all data signals in wide
|
|
* bus mode interrupt
|
|
* SDIO_IT_DBCKEND - Data block sent/received (CRC check passed) interrupt
|
|
* SDIO_IT_CMDACT - Command transfer in progress interrupt
|
|
* SDIO_IT_TXACT - Data transmit in progress interrupt
|
|
* SDIO_IT_RXACT - Data receive in progress interrupt
|
|
* SDIO_IT_TXFIFOHE - Transmit FIFO Half Empty interrupt
|
|
* SDIO_IT_RXFIFOHF - Receive FIFO Half Full interrupt
|
|
* SDIO_IT_TXFIFOF - Transmit FIFO full interrupt
|
|
* SDIO_IT_RXFIFOF - Receive FIFO full interrupt
|
|
* SDIO_IT_TXFIFOE - Transmit FIFO empty interrupt
|
|
* SDIO_IT_RXFIFOE - Receive FIFO empty interrupt
|
|
* SDIO_IT_TXDAVL - Data available in transmit FIFO interrupt
|
|
* SDIO_IT_RXDAVL - Data available in receive FIFO interrupt
|
|
* SDIO_IT_SDIOIT - SD I/O interrupt received interrupt
|
|
* SDIO_IT_CEATAEND - CE-ATA command completion signal received for CMD61 interrupt
|
|
*
|
|
* @return ITStatus:SET or RESET
|
|
*/
|
|
ITStatus SDIO_GetITStatus(uint32_t SDIO_IT)
|
|
{
|
|
ITStatus bitstatus = RESET;
|
|
|
|
if((SDIO->STA & SDIO_IT) != (uint32_t)RESET)
|
|
{
|
|
bitstatus = SET;
|
|
}
|
|
else
|
|
{
|
|
bitstatus = RESET;
|
|
}
|
|
return bitstatus;
|
|
}
|
|
|
|
/*********************************************************************
|
|
* @fn SDIO_ClearITPendingBit
|
|
*
|
|
* @brief Clears the SDIO's interrupt pending bits.
|
|
*
|
|
* @param SDIO_IT - specifies the interrupt pending bit to clear.
|
|
* SDIO_IT_CCRCFAIL - Command response received (CRC check failed) interrupt
|
|
* SDIO_IT_DCRCFAIL - Data block sent/received (CRC check failed) interrupt
|
|
* SDIO_IT_CTIMEOUT - Command response timeout interrupt
|
|
* SDIO_IT_DTIMEOUT - Data timeout interrupt
|
|
* SDIO_IT_TXUNDERR - Transmit FIFO underrun error interrupt
|
|
* SDIO_IT_RXOVERR - Received FIFO overrun error interrupt
|
|
* SDIO_IT_CMDREND - Command response received (CRC check passed) interrupt
|
|
* SDIO_IT_CMDSENT - Command sent (no response required) interrupt
|
|
* SDIO_IT_DATAEND - Data end (data counter, SDIDCOUNT, is zero) interrupt
|
|
* SDIO_IT_STBITERR - Start bit not detected on all data signals in wide
|
|
* bus mode interrupt
|
|
* SDIO_IT_SDIOIT - SD I/O interrupt received interrupt
|
|
* SDIO_IT_CEATAEND - CE-ATA command completion signal received for CMD61
|
|
*
|
|
* @return RTC counter value
|
|
*/
|
|
void SDIO_ClearITPendingBit(uint32_t SDIO_IT)
|
|
{
|
|
SDIO->ICR = SDIO_IT;
|
|
}
|