diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..e68c7dd
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1,7 @@
+#
+
+obj/
+
+*.o
+*.elf
+*.hex
\ No newline at end of file
diff --git a/CH32V303-FreeRTOS/.cproject b/CH32V303-FreeRTOS/.cproject
index e496c79..3f7b7cc 100644
--- a/CH32V303-FreeRTOS/.cproject
+++ b/CH32V303-FreeRTOS/.cproject
@@ -109,6 +109,8 @@
+
+
@@ -136,6 +138,11 @@
+
+
+
+
+
diff --git a/CH32V303-FreeRTOS/.mrs/launch.json b/CH32V303-FreeRTOS/.mrs/launch.json
new file mode 100644
index 0000000..247b8ac
--- /dev/null
+++ b/CH32V303-FreeRTOS/.mrs/launch.json
@@ -0,0 +1,65 @@
+{
+ "version": "0.2.0",
+ "configurations": [
+ {
+ "type": "mrs-debugger",
+ "request": "launch",
+ "name": "CH32V303-FreeRTOS",
+ "cwd": "d:\\psx\\su806\\2.software\\mcu_git\\CH32V303-FreeRTOS",
+ "openOCDCfg": {
+ "useLocalOpenOCD": true,
+ "executable": "c:/MounRiver/MounRiver_Studio2/resources/app/resources/win32/components/WCH/OpenOCD/OpenOCD/bin/openocd.exe",
+ "configOptions": [
+ "-f \"c:/MounRiver/MounRiver_Studio2/resources/app/resources/win32/components/WCH/OpenOCD/OpenOCD/bin/wch-riscv.cfg\" -c \"chip_id CH32V30x\""
+ ],
+ "gdbport": 3333,
+ "telnetport": 4444,
+ "tclport": 6666,
+ "host": "localhost",
+ "port": 3333,
+ "skipDownloadBeforeDebug": false,
+ "enablePageEraser": false,
+ "enableNoZeroWaitingAreaFlash": false
+ },
+ "gdbCfg": {
+ "executable": "c:/MounRiver/MounRiver_Studio2/resources/app/resources/win32/components/WCH/Toolchain/RISC-V Embedded GCC/bin/riscv-none-embed-gdb.exe",
+ "commands": [
+ "set mem inaccessible-by-default off",
+ "set architecture riscv:rv32",
+ "set remotetimeout unlimited",
+ "set disassembler-options xw"
+ ],
+ "options": []
+ },
+ "startup": {
+ "initCommands": {
+ "initReset": true,
+ "initResetType": "init",
+ "armSemihosting": false,
+ "additionalCommands": []
+ },
+ "loadedFiles": {
+ "executableFile": "d:\\psx\\su806\\2.software\\mcu_git\\CH32V303-FreeRTOS\\obj\\CH32V303-FreeRTOS.elf",
+ "symbolFile": "d:\\psx\\su806\\2.software\\mcu_git\\CH32V303-FreeRTOS\\obj\\CH32V303-FreeRTOS.elf",
+ "executableFileOffset": 0,
+ "symbolFileOffset": 0
+ },
+ "runCommands": {
+ "runReset": true,
+ "runResetType": "halt",
+ "additionalCommands": [],
+ "setBreakAt": "handle_reset",
+ "continue": true,
+ "setProgramCounterAt": 0
+ },
+ "debugInRAM": false
+ },
+ "svdpath": "c:\\MounRiver\\MounRiver_Studio2\\resources\\app\\resources\\win32\\components\\WCH\\SDK\\default/RISC-V/CH32V307/NoneOS/CH32V307xx.svd",
+ "output": {
+ "showDebugGDBTrace": true,
+ "saveDebugOutputToFile": false,
+ "showDebugOutputTimestamps": true
+ }
+ }
+ ]
+}
\ No newline at end of file
diff --git a/CH32V303-FreeRTOS/.mrs/preferredEncoding.json b/CH32V303-FreeRTOS/.mrs/preferredEncoding.json
new file mode 100644
index 0000000..8d898b2
--- /dev/null
+++ b/CH32V303-FreeRTOS/.mrs/preferredEncoding.json
@@ -0,0 +1,8 @@
+{
+ "details": [
+ {
+ "file": "App/hardwareDriver/Inc/HD_GPIO.h",
+ "encoding": "gbk"
+ }
+ ]
+}
\ No newline at end of file
diff --git a/CH32V303-FreeRTOS/App/application/Inc/freerotsTask.h b/CH32V303-FreeRTOS/App/application/Inc/freerotsTask.h
new file mode 100644
index 0000000..1c41881
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/application/Inc/freerotsTask.h
@@ -0,0 +1,11 @@
+#ifndef APP_FREERTOS_TASK_H_
+#define APP_FREERTOS_TASK_H_
+
+#include "pDebug.h"
+#include "FreeRTOS.h"
+#include "task.h"
+
+void startApp(void);
+
+
+#endif
diff --git a/CH32V303-FreeRTOS/App/application/Src/freerotsTask.c b/CH32V303-FreeRTOS/App/application/Src/freerotsTask.c
new file mode 100644
index 0000000..f3220d8
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/application/Src/freerotsTask.c
@@ -0,0 +1,53 @@
+
+#include "freerotsTask.h"
+
+
+#include "uart_dev.h"
+#include "HD_UART.h"
+#include "FM_GPIO.h"
+#include "FM_ADC.h"
+
+#define TASK1_TASK_PRIO 5
+#define TASK1_STK_SIZE 256
+
+TaskHandle_t Task1Task_Handler;
+uint8_t data[20] = "hello world\n";
+
+void task1_task(void *pvParameters)
+{
+ writePwrCtrlState(Android_PwrCtrl, PwrCtrlOpen);
+ proportionalInt();
+ while(1) {
+ // printf("task1 entry\r\n");
+ printf_adc_data();
+ USART_ITConfig(UART5, USART_IT_TXE, ENABLE);
+ uartInterruptSend(g_Upward_uart5_handle, data, 12);
+ vTaskDelay(1000);
+ }
+}
+
+
+/**
+ * @brief
+ * @param
+ * @retval
+ */
+void startApp(void)
+{
+ Init_Upward_uart(115200);
+ FM_GPIO_Init();
+ FM_ADC_Init();
+
+ /* create task */
+ xTaskCreate((TaskFunction_t )task1_task,
+ (const char* )"task1",
+ (uint16_t )TASK1_STK_SIZE,
+ (void* )NULL,
+ (UBaseType_t )TASK1_TASK_PRIO,
+ (TaskHandle_t* )&Task1Task_Handler);
+ vTaskStartScheduler();
+}
+
+
+
+
diff --git a/CH32V303-FreeRTOS/App/functionalModule/Inc/FM_ADC.h b/CH32V303-FreeRTOS/App/functionalModule/Inc/FM_ADC.h
new file mode 100644
index 0000000..0db2bdb
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/functionalModule/Inc/FM_ADC.h
@@ -0,0 +1,13 @@
+#ifndef FM_ADC_H_
+#define FM_ADC_H_
+
+#include "HD_ADC.h"
+
+void FM_ADC_Init(void);
+void printf_adc_data(void);
+void proportionalInt(void);
+float getSOCPwrOnVoltage(void);
+float getInCurrent(void);
+float getInVoltage(void);
+
+#endif
\ No newline at end of file
diff --git a/CH32V303-FreeRTOS/App/functionalModule/Inc/FM_GPIO.h b/CH32V303-FreeRTOS/App/functionalModule/Inc/FM_GPIO.h
new file mode 100644
index 0000000..95fe421
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/functionalModule/Inc/FM_GPIO.h
@@ -0,0 +1,32 @@
+#ifndef FM_GPIO_H_
+#define FM_GPIO_H_
+
+#include "HD_GPIO.h"
+#include "stdio.h"
+
+typedef enum _pwrCtrl{
+ J1_PwrCtrl = 1,
+ J2_PwrCtrl,
+ J3_PwrCtrl,
+ J4_PwrCtrl,
+ J5_PwrCtrl,
+ J6_PwrCtrl,
+ J7_PwrCtrl,
+ J8_PwrCtrl,
+ J9_PwrCtrl,
+ Android_PwrCtrl,
+}pwrCtrl;
+
+typedef enum _pwrCtrlState{
+ PwrCtrlClose = 0,
+ PwrCtrlOpen
+}pwrCtrlState;
+
+void FM_GPIO_Init(void);
+void feedDog(void);
+void writePwrCtrlState(uint8_t type, uint8_t State);
+uint8_t readPwrCtrlState(uint8_t type);
+void startResetAndroidModule(void);
+void stopResetAndroidModule(void);
+
+#endif
\ No newline at end of file
diff --git a/CH32V303-FreeRTOS/App/functionalModule/Inc/flash.h b/CH32V303-FreeRTOS/App/functionalModule/Inc/flash.h
new file mode 100644
index 0000000..5ee758f
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/functionalModule/Inc/flash.h
@@ -0,0 +1,16 @@
+
+#ifndef FM_FLASH_H_
+#define FM_FLASH_H_
+
+#include "ch32v30x.h"
+#include "HD_Flash.h"
+// #include "w25q256.h"
+
+void Flash_Init(void);
+void read_Flash(uint8_t* pBuffer,uint32_t ReadAddr,uint16_t NumByteToRead);
+void write_Flash(uint8_t* pBuffer,uint32_t WriteAddr,uint16_t NumByteToWrite);
+void erase_Sector_Flash(uint32_t secpos);
+
+
+
+#endif
\ No newline at end of file
diff --git a/CH32V303-FreeRTOS/App/functionalModule/Inc/uart_dev.h b/CH32V303-FreeRTOS/App/functionalModule/Inc/uart_dev.h
new file mode 100644
index 0000000..8e810e1
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/functionalModule/Inc/uart_dev.h
@@ -0,0 +1,66 @@
+#ifndef FM_UART_DEV_H_
+#define FM_UART_DEV_H_
+
+#include "ch32v30x.h"
+#include "HD_UART.h"
+#include "comm_types.h"
+#include "ring_queue.h"
+
+/* 是否使用中断发送，后期可能改为DMA发送 */
+#define UARTINTERRUPTSEND
+
+#define ASCII_CHAR_BACKSPACE 0x08 /* '\b' */
+#define ASCII_CHAR_CHARACTER_TABULATION 0x09 /* '\t' */
+#define ASCII_CHAR_LINE_FEED 0x0A /* '\n' */
+#define ASCII_CHAR_LINE_TABULATION 0x0B /* '\v' */
+#define ASCII_CHAR_FORM_FEED 0x0C /* '\f' */
+#define ASCII_CHAR_CARRIAGE_RETURN 0x0D /* '\r' */
+
+typedef enum{
+ J1_485_INDEX = 6,
+ J2_485_INDEX = 7,
+ J3_485_INDEX = 2,
+ J4_485_INDEX = 8,
+ J5_0_485_INDEX = 3,
+ Upward_UART_INDEX = 5,
+}uartIndex_e;
+
+typedef struct _uartSendInfo {
+ uint8_t *data; //指向数据
+#ifdef UARTINTERRUPTSEND
+ uint16_t count; //已经发送数据字节个数
+ uint16_t len; //数据长度
+#endif
+}uartSendInfo;
+
+/* UART 驱动数据结构，对应一个uart设备 */
+typedef struct _uart_device_info{
+ uint8_t init;
+ uartIndex_e uart_index;
+ uint32_t uart_baudrate;
+ RingQueue uart_ring_queue;
+ uartSendInfo uart_send_data;
+}uart_device_info;
+
+typedef uint32_t device_handle;
+extern device_handle g_J1_uart6_handle;
+extern device_handle g_J2_uart7_handle;
+extern device_handle g_J3_usart2_handle;
+extern device_handle g_J4_uart8_handle;
+extern device_handle g_J5_0_usart3_handle;
+extern device_handle g_Upward_uart5_handle;
+
+uint8_t uart_dev_in_char(device_handle device);
+int uart_dev_char_present(device_handle device);
+void Init_J1_485(uint32_t baud);
+void Init_J2_485(uint32_t baud);
+void Init_J3_485(uint32_t baud);
+void Init_J4_485(uint32_t baud);
+void Init_J5_0_485(uint32_t baud);
+void Init_Upward_uart(uint32_t baud);
+
+#ifdef UARTINTERRUPTSEND
+uint8_t uartInterruptSend(device_handle device, uint8_t *data, uint16_t len);
+#endif
+
+#endif
diff --git a/CH32V303-FreeRTOS/App/functionalModule/Src/FM_ADC.c b/CH32V303-FreeRTOS/App/functionalModule/Src/FM_ADC.c
new file mode 100644
index 0000000..51d7ae8
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/functionalModule/Src/FM_ADC.c
@@ -0,0 +1,94 @@
+
+#include "FM_ADC.h"
+
+/* adcɼתı */
+/* ϵͳѹ */
+static float P_PwrOn_Voltage;
+/* صĵѹ */
+static float P_In_Voltage;
+/* صĵ */
+static float P_In_Current;
+
+/* οѹĴС */
+#define referenceVoltage 3.3f
+
+/**
+ * @brief ɼadcУ
+ * @param val ɼadc
+ * @retval Уadc
+ */
+static uint16_t Get_ConversionVal(int16_t val)
+{
+ if((val + Calibrattion_Val) < 0 || val == 0)
+ return 0;
+ if((Calibrattion_Val + val) > 4095 || val == 4095)
+ return 4095;
+ return (val + Calibrattion_Val);
+}
+
+/**
+ * @brief ʼadc
+ * @param
+ * @retval
+ */
+void FM_ADC_Init(void)
+{
+ HD_ADC_InIt();
+ ADC_DMA_Init();
+ startAdcCapture();
+}
+
+/**
+ * @brief ӡadcɵ
+ * @param
+ * @retval
+ */
+void printf_adc_data(void)
+{
+ printf("adc : %d, %d, %d\n", adcData[0], adcData[1], adcData[2]);
+ printf("getSOCPwrOnVoltage: %d\n", (int)(getSOCPwrOnVoltage() * 1000.0f));
+ printf("getInCurrent: %d\n", (int)(getInCurrent() * 1000.0f));
+ printf("getInVoltage: %d\n", (int)(getInVoltage() * 1000.0f));
+}
+
+/**
+ * @brief ʼתı
+ * @param
+ * @retval
+ */
+void proportionalInt(void)
+{
+ P_PwrOn_Voltage = referenceVoltage / 4095.0f;
+ P_In_Voltage = ((100.0f + 10.0f) / 10.0f) * referenceVoltage / 4095.0f;
+ P_In_Current = ((1.0f / 50.0f) / (0.01f)) * referenceVoltage / 4095.0f;
+}
+
+/**
+ * @brief õsocѹ
+ * @param
+ * @retval
+ */
+float getSOCPwrOnVoltage(void)
+{
+ return (Get_ConversionVal(adcData[0]) * P_PwrOn_Voltage);
+}
+
+/**
+ * @brief õغӵĵ
+ * @param
+ * @retval
+ */
+float getInCurrent(void)
+{
+ return (Get_ConversionVal(adcData[1]) * P_In_Current);
+}
+
+/**
+ * @brief õغӵĵѹ
+ * @param
+ * @retval
+ */
+float getInVoltage(void)
+{
+ return (Get_ConversionVal(adcData[2]) * P_In_Voltage);
+}
\ No newline at end of file
diff --git a/CH32V303-FreeRTOS/App/functionalModule/Src/FM_GPIO.c b/CH32V303-FreeRTOS/App/functionalModule/Src/FM_GPIO.c
new file mode 100644
index 0000000..6bca8de
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/functionalModule/Src/FM_GPIO.c
@@ -0,0 +1,108 @@
+#include "FM_GPIO.h"
+
+
+/**
+ * @brief ʼGPIO
+ * @param
+ * @retval
+ */
+void FM_GPIO_Init(void)
+{
+ HD_GPIO_Init();
+}
+
+/**
+ * @brief ι
+ * @param
+ * @retval
+ */
+void feedDog(void)
+{
+ HD_GPIO_Write(WDI_GPIO_PROT, WDI_GPIO_PIN, GPIO_RESET);
+ HD_GPIO_Write(WDI_GPIO_PROT, WDI_GPIO_PIN, GPIO_SET);
+}
+
+/**
+ * @brief Դ״̬
+ * @param type Դӿ
+ state ״̬
+ * @retval
+ */
+void writePwrCtrlState(uint8_t type, uint8_t State)
+{
+ if (type == J1_PwrCtrl) {
+ HD_GPIO_Write(J1_PwrCtrl_GPIO_PROT, J1_PwrCtrl_GPIO_PIN, State);
+ } else if (type == J2_PwrCtrl) {
+ HD_GPIO_Write(J2_PwrCtrl_GPIO_PROT, J2_PwrCtrl_GPIO_PIN, State);
+ } else if (type == J3_PwrCtrl) {
+ HD_GPIO_Write(J3_PwrCtrl_GPIO_PROT, J3_PwrCtrl_GPIO_PIN, State);
+ } else if (type == J4_PwrCtrl) {
+ HD_GPIO_Write(J4_PwrCtrl_GPIO_PROT, J4_PwrCtrl_GPIO_PIN, State);
+ } else if (type == J5_PwrCtrl) {
+ HD_GPIO_Write(J5_PwrCtrl_GPIO_PROT, J5_PwrCtrl_GPIO_PIN, State);
+ } else if (type == J6_PwrCtrl) {
+ HD_GPIO_Write(J6_PwrCtrl_GPIO_PROT, J6_PwrCtrl_GPIO_PIN, State);
+ } else if (type == J7_PwrCtrl) {
+ HD_GPIO_Write(J7_PwrCtrl_GPIO_PROT, J7_PwrCtrl_GPIO_PIN, State);
+ } else if (type == J8_PwrCtrl) {
+ HD_GPIO_Write(J8_PwrCtrl_GPIO_PROT, J8_PwrCtrl_GPIO_PIN, State);
+ } else if (type == J9_PwrCtrl) {
+ HD_GPIO_Write(J9_PwrCtrl_GPIO_PROT, J9_PwrCtrl_GPIO_PIN, State);
+ } else if (type == Android_PwrCtrl) {
+ HD_GPIO_Write(GPIO_PwrCtrl_GPIO_PROT, GPIO_PwrCtrl_GPIO_PIN, State);
+ }
+}
+
+/**
+ * @brief ȡԴ״̬
+ * @param type Դӿ
+ * @retval state ״̬
+ 0xFF ʹ
+ PwrCtrlClose ر״̬
+ PwrCtrlOpen ״̬
+ */
+uint8_t readPwrCtrlState(uint8_t type)
+{
+ if (type == J1_PwrCtrl) {
+ return HD_OutputGPIO_Read(J1_PwrCtrl_GPIO_PROT, J1_PwrCtrl_GPIO_PIN);
+ } else if (type == J2_PwrCtrl) {
+ return HD_OutputGPIO_Read(J2_PwrCtrl_GPIO_PROT, J2_PwrCtrl_GPIO_PIN);
+ } else if (type == J3_PwrCtrl) {
+ return HD_OutputGPIO_Read(J3_PwrCtrl_GPIO_PROT, J3_PwrCtrl_GPIO_PIN);
+ } else if (type == J4_PwrCtrl) {
+ return HD_OutputGPIO_Read(J4_PwrCtrl_GPIO_PROT, J4_PwrCtrl_GPIO_PIN);
+ } else if (type == J5_PwrCtrl) {
+ return HD_OutputGPIO_Read(J5_PwrCtrl_GPIO_PROT, J5_PwrCtrl_GPIO_PIN);
+ } else if (type == J6_PwrCtrl) {
+ return HD_OutputGPIO_Read(J6_PwrCtrl_GPIO_PROT, J6_PwrCtrl_GPIO_PIN);
+ } else if (type == J7_PwrCtrl) {
+ return HD_OutputGPIO_Read(J7_PwrCtrl_GPIO_PROT, J7_PwrCtrl_GPIO_PIN);
+ } else if (type == J8_PwrCtrl) {
+ return HD_OutputGPIO_Read(J8_PwrCtrl_GPIO_PROT, J8_PwrCtrl_GPIO_PIN);
+ } else if (type == J9_PwrCtrl) {
+ return HD_OutputGPIO_Read(J9_PwrCtrl_GPIO_PROT, J9_PwrCtrl_GPIO_PIN);
+ } else if (type == Android_PwrCtrl) {
+ return HD_OutputGPIO_Read(GPIO_PwrCtrl_GPIO_PROT, GPIO_PwrCtrl_GPIO_PIN);
+ }
+ return 0xFF;
+}
+
+/**
+ * @brief ʼλģ飬7-10SģḴλ
+ * @param
+ * @retval
+ */
+void startResetAndroidModule(void)
+{
+ HD_GPIO_Write(GPIO_PwrKey_GPIO_PROT, GPIO_PwrKey_GPIO_PIN, GPIO_SET);
+}
+
+/**
+ * @brief ֹͣλģ飬ʹÿʼλģ麯7-10Sģ鸴λʹøú
+ * @param
+ * @retval
+ */
+void stopResetAndroidModule(void)
+{
+ HD_GPIO_Write(GPIO_PwrKey_GPIO_PROT, GPIO_PwrKey_GPIO_PIN, GPIO_RESET);
+}
diff --git a/CH32V303-FreeRTOS/App/functionalModule/Src/flash.c b/CH32V303-FreeRTOS/App/functionalModule/Src/flash.c
new file mode 100644
index 0000000..9b54d38
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/functionalModule/Src/flash.c
@@ -0,0 +1,42 @@
+#include "flash.h"
+
+/**
+ * @brief flash初始化
+ * @param
+ */
+void Flash_Init(void)
+{
+ SPI_Flash_Init();
+}
+
+/**
+ * @brief 读取flash中的数据
+ * @param pBuffer 保存读取的数据
+ * @param ReadAddr 读取数据的位置
+ * @param NumByteToRead 读取数据的长度
+ */
+void read_Flash(uint8_t* pBuffer,uint32_t ReadAddr,uint16_t NumByteToRead)
+{
+ SPI_Flash_Read(pBuffer, ReadAddr, NumByteToRead);
+}
+
+/**
+ * @brief 将数据写入到flash中
+ * @param pBuffer 要写入的数据
+ * @param ReadAddr 要写入数据的位置
+ * @param NumByteToRead 要写入数据的长度
+ */
+void write_Flash(uint8_t* pBuffer,uint32_t WriteAddr,uint16_t NumByteToWrite)
+{
+ SPI_Flash_Write(pBuffer, WriteAddr, NumByteToWrite);
+}
+
+
+/**
+ * @brief 清除flash中secpos扇区的数据
+ *
+ */
+void erase_Sector_Flash(uint32_t secpos)
+{
+ SPI_Flash_Erase_Sector(secpos);
+}
diff --git a/CH32V303-FreeRTOS/App/functionalModule/Src/uart_dev.c b/CH32V303-FreeRTOS/App/functionalModule/Src/uart_dev.c
new file mode 100644
index 0000000..3e7124b
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/functionalModule/Src/uart_dev.c
@@ -0,0 +1,646 @@
+#include "uart_dev.h"
+#include
+#include
+#include
+#include "pDebug.h"
+
+device_handle g_J1_uart6_handle;
+device_handle g_J2_uart7_handle;
+device_handle g_J3_usart2_handle;
+device_handle g_J4_uart8_handle;
+device_handle g_J5_0_usart3_handle;
+device_handle g_Upward_uart5_handle;
+
+/* 接收缓冲区数组 */
+uint8_t J1_Rbuffer[1] = {0x00};
+uint8_t J2_Rbuffer[1] = {0x00};
+uint8_t J3_Rbuffer[1] = {0x00};
+uint8_t J4_Rbuffer[1] = {0x00};
+uint8_t J5_0_Rbuffer[1] = {0x00};
+uint8_t Upward_Rbuffer[1] = {0x00};
+
+/* 环形buff */
+#define J485BuffLen 256
+uint8_t J1_inBuff[J485BuffLen];
+uint8_t J2_inBuff[J485BuffLen];
+uint8_t J3_inBuff[J485BuffLen];
+uint8_t J4_inBuff[J485BuffLen];
+uint8_t J5_0_inBuff[J485BuffLen];
+#define UpwardBuffLen 1024
+uint8_t Upward_inBuff[UpwardBuffLen];
+
+/* 用于当做发送时的标志位 8个位，分别对应各个串口 */
+#define J1_485_Send 0x01
+#define J2_485_Send 0x02
+#define J3_485_Send 0x04
+#define J4_485_Send 0x08
+#define J5_0_485_Send 0x20
+#define Upward_uart_Send 0x40
+static uint8_t uartInterruptSendFlag = 0;
+
+// static uint8_t getJ1_485_SendState(void);
+static void setJ1_485_SendState(uint8_t state);
+// static uint8_t getJ2_485_SendState(void);
+static void setJ2_485_SendState(uint8_t state);
+// static uint8_t getJ3_485_SendState(void);
+static void setJ3_485_SendState(uint8_t state);
+// static uint8_t getJ4_485_SendState(void);
+static void setJ4_485_SendState(uint8_t state);
+// static uint8_t getJ5_0_485_SendState(void);
+static void setJ5_0_485_SendState(uint8_t state);
+// static uint8_t getUpward_uart_SendState(void);
+static void setUpward_uart_SendState(uint8_t state);
+
+
+/**
+ * @brief 串口信息初始化，串口号及波特率.
+ * @param uart_index 对应的硬件串口号
+ * @param uart_baudrate 波特率
+ */
+uart_device_info uart_devices[]={
+ [0] = {
+ .init = 0,
+ .uart_index = J1_485_INDEX,
+ .uart_baudrate = 9600,
+ },
+ [1] = {
+ .init = 0,
+ .uart_index = J2_485_INDEX,
+ .uart_baudrate = 9600,
+ },
+ [2] = {
+ .init = 0,
+ .uart_index = J3_485_INDEX,
+ .uart_baudrate = 9600,
+ },
+ [3] = {
+ .init = 0,
+ .uart_index = J4_485_INDEX,
+ .uart_baudrate = 9600,
+ },
+ [4] = {
+ .init = 0,
+ .uart_index = J5_0_485_INDEX,
+ .uart_baudrate = 9600,
+ },
+ [5] = {
+ .init = 0,
+ .uart_index = Upward_UART_INDEX,
+ .uart_baudrate = 115200,
+ },
+};
+
+static device_handle uart_dev_init(uartIndex_e uart_index, uint8_t *buff, int buff_size);
+static void uart_init(uartIndex_e uart_index, uint32_t baud);
+
+
+/**
+ * @brief 初始化串口设备.
+ * @param uart_index 初始化串口号
+ * @param buff 串口循环buff地址
+ * @param buff_size 串口循环buff对应大小
+ * @retval 串口句柄
+ */
+device_handle uart_dev_init(uartIndex_e uart_index, uint8_t *buff, int buff_size)
+{
+ int i = 0;
+ for (; i < ELEMENT_OF(uart_devices); i++) {
+ if (uart_devices[i].uart_index == uart_index) {
+ if (!uart_devices[i].init) {
+ InitRingQueue(&uart_devices[i].uart_ring_queue, buff, buff_size);
+ uart_init(uart_index, uart_devices[i].uart_baudrate);
+
+ uart_devices[i].init = 1;
+ }
+ return (device_handle)(&uart_devices[i]);
+ }
+ }
+ return 0;
+}
+
+/**
+ * @brief 串口硬件初始化.
+ * @param uart_index 串口号
+ * @param baud 波特率
+ * @retval None
+ */
+void uart_init(uartIndex_e uart_index, uint32_t baud)
+{
+ if (uart_index == J1_485_INDEX) {
+ J1_485_Init(baud);
+ } else if (uart_index == J2_485_INDEX) {
+ J2_485_Init(baud);
+ } else if (uart_index == J3_485_INDEX) {
+ J3_485_Init(baud);
+ } else if (uart_index == J4_485_INDEX) {
+ J4_485_Init(baud);
+ } else if (uart_index == J5_0_485_INDEX) {
+ J5_0_485_Init(baud);
+ } else if (uart_index == Upward_UART_INDEX) {
+ Upward_UART5_Init(baud);
+ }
+}
+
+/**
+ * @brief 从串口设备循环buff读取一个数据.
+ * @param device 串口句柄
+ * @retval 读取到的字符
+ */
+uint8_t uart_dev_in_char(device_handle device)
+{
+ uart_device_info *device_info = (uart_device_info *)device;
+ char c = 0;
+
+ if (uart_dev_char_present(device))
+ OutRingQueue(&device_info->uart_ring_queue, (u_int8_t*)&c);
+ return c;
+}
+
+/**
+ * @brief 判断串口设备循环buff是否有数据.
+ * @param device 串口句柄
+ * @retval 0 空 1有数据
+ */
+int uart_dev_char_present(device_handle device)
+{
+ uart_device_info *device_info = (uart_device_info *)device;
+
+ if((!device) || (!device_info->init))
+ return 0;
+
+ return !RingQueueEmpty(&device_info->uart_ring_queue);
+}
+
+/* 初始化 */
+void Init_J1_485(uint32_t baud)
+{
+ uart_devices[0].uart_baudrate = baud;
+ g_J1_uart6_handle = uart_dev_init(J1_485_INDEX, J1_inBuff, J485BuffLen);
+}
+
+void Init_J2_485(uint32_t baud)
+{
+ uart_devices[1].uart_baudrate = baud;
+ g_J2_uart7_handle = uart_dev_init(J2_485_INDEX, J2_inBuff, J485BuffLen);
+}
+
+void Init_J3_485(uint32_t baud)
+{
+ uart_devices[2].uart_baudrate = baud;
+ g_J3_usart2_handle = uart_dev_init(J3_485_INDEX, J3_inBuff, J485BuffLen);
+}
+
+void Init_J4_485(uint32_t baud)
+{
+ uart_devices[3].uart_baudrate = baud;
+ g_J4_uart8_handle = uart_dev_init(J4_485_INDEX, J4_inBuff, J485BuffLen);
+}
+
+void Init_J5_0_485(uint32_t baud)
+{
+ uart_devices[4].uart_baudrate = baud;
+ g_J5_0_usart3_handle = uart_dev_init(J5_0_485_INDEX, J5_0_inBuff, J485BuffLen);
+}
+
+void Init_Upward_uart(uint32_t baud)
+{
+ uart_devices[5].uart_baudrate = baud;
+ g_Upward_uart5_handle = uart_dev_init(Upward_UART_INDEX, Upward_inBuff, UpwardBuffLen);
+}
+
+/**
+ * @brief 得到串口的发送状态
+ * @param device 设备
+ * @retval 0：发生完成 1：发送中 0xFF：错误
+ */
+uint8_t getUartSendState(device_handle device)
+{
+ if (device == g_J1_uart6_handle) {
+ return uartInterruptSendFlag & J1_485_Send;
+ }
+ else if (device == g_J2_uart7_handle) {
+ return uartInterruptSendFlag & J2_485_Send;
+ }
+ else if (device == g_J3_usart2_handle) {
+ return uartInterruptSendFlag & J3_485_Send;
+ }
+ else if (device == g_J4_uart8_handle) {
+ return uartInterruptSendFlag & J4_485_Send;
+ }
+ else if (device == g_J5_0_usart3_handle) {
+ return uartInterruptSendFlag & J5_0_485_Send;
+ }
+ else if (device == g_Upward_uart5_handle) {
+ return uartInterruptSendFlag & Upward_uart_Send;
+ }
+ else {
+ return 0xFF;
+ }
+}
+
+// /**
+// * @brief 设置设备的发送状态
+// * @param
+// state 0：发生完成 1：发送中
+// * @retval
+// */
+// void setUartSendState(device_handle device, uint8_t state)
+// {
+// if (device == g_J1_uart6_handle) {
+// if (state == 1) {
+// uartInterruptSendFlag |= J1_485_Send;
+// }
+// else if (state == 0) {
+// uartInterruptSendFlag &= (~J1_485_Send);
+// }
+// }
+// else if (device == g_J2_uart7_handle) {
+// if (state == 1) {
+// uartInterruptSendFlag |= J2_485_Send;
+// }
+// else if (state == 0) {
+// uartInterruptSendFlag &= (~J2_485_Send);
+// }
+// }
+// else if (device == g_J3_usart2_handle) {
+// if (state == 1) {
+// uartInterruptSendFlag |= J3_485_Send;
+// }
+// else if (state == 0) {
+// uartInterruptSendFlag &= (~J3_485_Send);
+// }
+// }
+// else if (device == g_J4_uart8_handle) {
+// if (state == 1) {
+// uartInterruptSendFlag |= J4_485_Send;
+// }
+// else if (state == 0) {
+// uartInterruptSendFlag &= (~J4_485_Send);
+// }
+// }
+// else if (device == g_J5_0_usart3_handle) {
+// if (state == 1) {
+// uartInterruptSendFlag |= J5_0_485_Send;
+// }
+// else if (state == 0) {
+// uartInterruptSendFlag &= (~J5_0_485_Send);
+// }
+// }
+// else if (device == g_Upward_uart5_handle) {
+// if (state == 1) {
+// uartInterruptSendFlag |= Upward_uart_Send;
+// }
+// else if (state == 0) {
+// uartInterruptSendFlag &= (~Upward_uart_Send);
+// }
+// }
+// }
+
+/**
+ * @brief 得到J2_485的发送状态
+ * @param
+ * @retval 0：发生完成 1：发送中
+ */
+uint8_t getJ1_485_SendState(void)
+{
+ return uartInterruptSendFlag & J1_485_Send;
+}
+
+/**
+ * @brief 设置J2_485的发送状态
+ * @param 0：发生完成 1：发送中
+ * @retval
+ */
+void setJ1_485_SendState(uint8_t state)
+{
+ if (state == 1) {
+ uartInterruptSendFlag |= J1_485_Send;
+ }
+ else if (state == 0) {
+ uartInterruptSendFlag &= (~J1_485_Send);
+ }
+}
+
+/**
+ * @brief 得到J2_485的发送状态
+ * @param
+ * @retval 0：发生完成 1：发送中
+ */
+uint8_t getJ2_485_SendState(void)
+{
+ return uartInterruptSendFlag & J2_485_Send;
+}
+
+/**
+ * @brief 设置J2_485的发送状态
+ * @param 0：发生完成 1：发送中
+ * @retval
+ */
+void setJ2_485_SendState(uint8_t state)
+{
+ if (state == 1) {
+ uartInterruptSendFlag |= J2_485_Send;
+ }
+ else if (state == 0) {
+ uartInterruptSendFlag &= (~J2_485_Send);
+ }
+}
+
+/**
+ * @brief 得到J3_485的发送状态
+ * @param
+ * @retval 0：发生完成 1：发送中
+ */
+uint8_t getJ3_485_SendState(void)
+{
+ return uartInterruptSendFlag & J3_485_Send;
+}
+
+/**
+ * @brief 设置J3_485的发送状态
+ * @param 0：发生完成 1：发送中
+ * @retval
+ */
+void setJ3_485_SendState(uint8_t state)
+{
+ if (state == 1) {
+ uartInterruptSendFlag |= J3_485_Send;
+ }
+ else if (state == 0) {
+ uartInterruptSendFlag &= (~J3_485_Send);
+ }
+}
+
+/**
+ * @brief 得到J4_485的发送状态
+ * @param
+ * @retval 0：发生完成 1：发送中
+ */
+uint8_t getJ4_485_SendState(void)
+{
+ return uartInterruptSendFlag & J4_485_Send;
+}
+
+/**
+ * @brief 设置J4_485的发送状态
+ * @param 0：发生完成 1：发送中
+ * @retval
+ */
+void setJ4_485_SendState(uint8_t state)
+{
+ if (state == 1) {
+ uartInterruptSendFlag |= J4_485_Send;
+ }
+ else if (state == 0) {
+ uartInterruptSendFlag &= (~J4_485_Send);
+ }
+}
+
+/**
+ * @brief 得到J5_0_485的发送状态
+ * @param
+ * @retval 0：发生完成 1：发送中
+ */
+uint8_t getJ5_0_485_SendState(void)
+{
+ return uartInterruptSendFlag & J5_0_485_Send;
+}
+
+/**
+ * @brief 设置J1_485的发送状态
+ * @param 0：发生完成 1：发送中
+ * @retval
+ */
+void setJ5_0_485_SendState(uint8_t state)
+{
+ if (state == 1) {
+ uartInterruptSendFlag |= J5_0_485_Send;
+ }
+ else if (state == 0) {
+ uartInterruptSendFlag &= (~J5_0_485_Send);
+ }
+}
+
+/**
+ * @brief 得到Upward_uart的发送状态
+ * @param
+ * @retval 0：发生完成 1：发送中
+ */
+uint8_t getUpward_uart_SendState(void)
+{
+ return uartInterruptSendFlag & Upward_uart_Send;
+}
+
+/**
+ * @brief 设置Upward_uart的发送状态
+ * @param 0：发生完成 1：发送中
+ * @retval
+ */
+void setUpward_uart_SendState(uint8_t state)
+{
+ if (state == 1) {
+ uartInterruptSendFlag |= Upward_uart_Send;
+ }
+ else if (state == 0) {
+ uartInterruptSendFlag &= (~Upward_uart_Send);
+ }
+}
+
+/* 串口中断处理函数 */
+void J3_Interrupt()
+{
+ /* 数据接收中断 */
+ if (USART_GetITStatus(J3_USART, USART_IT_RXNE) != RESET) {
+ J3_Rbuffer[0] = USART_ReceiveData(J3_USART); //接收数据
+ uart_device_info *dev = (uart_device_info *)g_J3_usart2_handle;
+ if(!RingQueueFull(&dev->uart_ring_queue))
+ InRingQueue(&dev->uart_ring_queue, J3_Rbuffer[0]);
+ }
+
+#ifdef UARTINTERRUPTSEND
+ /* 数据发送中断 */
+ if (USART_GetITStatus(J3_USART, USART_IT_TXE) != RESET) {
+ uart_device_info *dev = (uart_device_info *)g_J3_usart2_handle;
+ if (dev->uart_send_data.count >= dev->uart_send_data.len) {
+ USART_ITConfig(J3_USART, USART_IT_TXE, DISABLE);
+ setJ3_485_SendState(0);
+ return;
+ }
+ USART_SendData(J3_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+#endif
+}
+
+void J5_0_Interrupt()
+{
+ /* 数据接收中断 */
+ if (USART_GetITStatus(J5_0_USART, USART_IT_RXNE) != RESET) { //中断产生
+ J5_0_Rbuffer[0] = USART_ReceiveData(J5_0_USART); //接收数据
+ uart_device_info *dev = (uart_device_info *)g_J5_0_usart3_handle;
+ if(!RingQueueFull(&dev->uart_ring_queue))
+ InRingQueue(&dev->uart_ring_queue, J5_0_Rbuffer[0]);
+ }
+
+#ifdef UARTINTERRUPTSEND
+ /* 数据发送中断 */
+ if (USART_GetITStatus(J5_0_USART, USART_IT_TXE) != RESET) {
+ uart_device_info *dev = (uart_device_info *)g_J5_0_usart3_handle;
+ if (dev->uart_send_data.count >= dev->uart_send_data.len) {
+ USART_ITConfig(J5_0_USART, USART_IT_TXE, DISABLE);
+ setJ5_0_485_SendState(0);
+ return;
+ }
+ USART_SendData(J5_0_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+#endif
+}
+
+void Upward_Interrupt()
+{
+ /* 数据接收中断 */
+ if (USART_GetITStatus(Upward_USART, USART_IT_RXNE) != RESET) { //中断产生
+ Upward_Rbuffer[0] = USART_ReceiveData(Upward_USART); //接收数据
+ uart_device_info *dev = (uart_device_info *)g_Upward_uart5_handle;
+ if(!RingQueueFull(&dev->uart_ring_queue))
+ InRingQueue(&dev->uart_ring_queue, Upward_Rbuffer[0]);
+ }
+
+#ifdef UARTINTERRUPTSEND
+ /* 数据发送中断 */
+ if (USART_GetITStatus(Upward_USART, USART_IT_TXE) != RESET) {
+ uart_device_info *dev = (uart_device_info *)g_Upward_uart5_handle;
+ // log_info("%d \n", dev->uart_send_data.count);
+ if (dev->uart_send_data.count >= dev->uart_send_data.len) {
+ USART_ITConfig(Upward_USART, USART_IT_TXE, DISABLE);
+ setUpward_uart_SendState(0);
+ return;
+ }
+ USART_SendData(Upward_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+#endif
+}
+
+void J1_Interrupt()
+{
+ /* 数据接收中断 */
+ if (USART_GetITStatus(J1_USART, USART_IT_RXNE) != RESET) { //中断产生
+ J1_Rbuffer[0] = USART_ReceiveData(J1_USART); //接收数据
+ uart_device_info *dev = (uart_device_info *)g_J1_uart6_handle;
+ if(!RingQueueFull(&dev->uart_ring_queue))
+ InRingQueue(&dev->uart_ring_queue, J1_Rbuffer[0]);
+ }
+
+#ifdef UARTINTERRUPTSEND
+ /* 数据发送中断 */
+ if (USART_GetITStatus(J1_USART, USART_IT_TXE) != RESET) {
+ uart_device_info *dev = (uart_device_info *)g_J1_uart6_handle;
+ if (dev->uart_send_data.count >= dev->uart_send_data.len) {
+ USART_ITConfig(J1_USART, USART_IT_TXE, DISABLE);
+ setJ1_485_SendState(0);
+ return;
+ }
+ USART_SendData(J1_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+#endif
+}
+
+void J2_Interrupt()
+{
+ /* 数据接收中断 */
+ if (USART_GetITStatus(J2_USART, USART_IT_RXNE) != RESET) { //中断产生
+ J2_Rbuffer[0] = USART_ReceiveData(J2_USART); //接收数据
+ uart_device_info *dev = (uart_device_info *)g_J2_uart7_handle;
+ if(!RingQueueFull(&dev->uart_ring_queue))
+ InRingQueue(&dev->uart_ring_queue, J2_Rbuffer[0]);
+ }
+
+#ifdef UARTINTERRUPTSEND
+ /* 数据发送中断 */
+ if (USART_GetITStatus(J2_USART, USART_IT_TXE) != RESET) {
+ uart_device_info *dev = (uart_device_info *)g_J2_uart7_handle;
+ if (dev->uart_send_data.count >= dev->uart_send_data.len) {
+ USART_ITConfig(J2_USART, USART_IT_TXE, DISABLE);
+ setJ2_485_SendState(0);
+ return;
+ }
+ USART_SendData(J2_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+#endif
+}
+
+void J4_Interrupt()
+{
+ /* 数据接收中断 */
+ if (USART_GetITStatus(J4_USART, USART_IT_RXNE) != RESET) { //中断产生
+ J4_Rbuffer[0] = USART_ReceiveData(J4_USART); //接收数据
+ uart_device_info *dev = (uart_device_info *)g_J4_uart8_handle;
+ if(!RingQueueFull(&dev->uart_ring_queue))
+ InRingQueue(&dev->uart_ring_queue, J4_Rbuffer[0]);
+ }
+
+#ifdef UARTINTERRUPTSEND
+ /* 数据发送中断 */
+ if (USART_GetITStatus(J4_USART, USART_IT_TXE) != RESET) {
+ uart_device_info *dev = (uart_device_info *)g_J4_uart8_handle;
+ if (dev->uart_send_data.count >= dev->uart_send_data.len) {
+ USART_ITConfig(J4_USART, USART_IT_TXE, DISABLE);
+ setJ4_485_SendState(0);
+ return;
+ }
+ USART_SendData(J4_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+#endif
+}
+
+#ifdef UARTINTERRUPTSEND
+/**
+ * @brief 通过中断发送
+ * @param device 设备
+ data 指向数据的指针
+ len 数据长度
+ * @retval 0：成功
+ 1：上次数据还未发送完成
+ 0xFF：错误
+ */
+uint8_t uartInterruptSend(device_handle device,uint8_t *data, uint16_t len)
+{
+ /* 上次未发送完，或设备不存在 */
+ if (getUartSendState(device)) {
+ return getUartSendState(device);
+ }
+
+ /* 指向数据 */
+ uart_device_info *dev = (uart_device_info *)device;
+ dev->uart_send_data.data = data;
+ dev->uart_send_data.count = 0;
+ dev->uart_send_data.len = len;
+
+ /* 开始发送 */
+ if (device == g_J1_uart6_handle) {
+ USART_ITConfig(J1_USART, USART_IT_TXE, ENABLE);
+ USART_SendData(J1_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+ else if (device == g_J2_uart7_handle) {
+ USART_ITConfig(J2_USART, USART_IT_TXE, ENABLE);
+ USART_SendData(J2_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+ else if (device == g_J3_usart2_handle) {
+ USART_ITConfig(J3_USART, USART_IT_TXE, ENABLE);
+ USART_SendData(J3_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+ else if (device == g_J4_uart8_handle) {
+ USART_ITConfig(J4_USART, USART_IT_TXE, ENABLE);
+ USART_SendData(J4_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+ else if (device == g_J5_0_usart3_handle) {
+ USART_ITConfig(J5_0_USART, USART_IT_TXE, ENABLE);
+ USART_SendData(J5_0_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+ else if (device == g_Upward_uart5_handle) {
+ USART_ITConfig(Upward_USART, USART_IT_TXE, ENABLE);
+ USART_SendData(Upward_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+
+ return 0;
+}
+#endif
diff --git a/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_ADC.h b/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_ADC.h
new file mode 100644
index 0000000..dc3e8e0
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_ADC.h
@@ -0,0 +1,19 @@
+#ifndef HD_ADC_H_
+#define HD_ADC_H_
+
+#include "ch32v30x.h"
+
+extern uint16_t adcData[];
+extern int16_t Calibrattion_Val;
+
+/* adcɼݵӦ */
+#define PwrOnNum 0
+#define CurrentNum 1
+#define VoltageNum 2
+
+void HD_ADC_InIt(void);
+void ADC_DMA_Init(void);
+void startAdcCapture(void);
+
+
+#endif
\ No newline at end of file
diff --git a/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_Flash.h b/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_Flash.h
new file mode 100644
index 0000000..9897169
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_Flash.h
@@ -0,0 +1,98 @@
+/*
+ * Flash.h
+ *
+ * Created on: 2024516
+ * Author: 34509
+ */
+
+#ifndef HARDWARE_SPI_FLASH_H_
+#define HARDWARE_SPI_FLASH_H_
+
+#include "ch32v30x.h"
+
+
+/*****************************************
+
+*@Note
+
+ Winbond W25Qxx SPIFLASH
+
+pins:
+
+ CS PA15(SPI3_NSS)
+
+ DO PB4(SPI3_MISO)
+
+ WP 3.3V
+
+ DI PB5(SPI3_MOSI)
+
+ CLK PB3(SPI3_SCK)
+
+ HOLD 3.3V
+
+*******************************************/
+#define RCC_APB2Periph_GPIOX RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB
+#define RCC_APB1Periph_SPIX RCC_APB1Periph_SPI3
+
+#define CS_PIN GPIO_Pin_15
+#define CS_GPIO GPIOA
+
+#define DO_PIN GPIO_Pin_4
+#define DO_GPIO GPIOB
+
+#define DI_PIN GPIO_Pin_5
+#define DI_GPIO GPIOB
+
+#define CLK_PIN GPIO_Pin_3
+#define CLK_GPIO GPIOB
+
+#define SPIX SPI3
+
+/* Winbond SPI Falsh ID */
+#define W25Q80 0XEF13
+#define W25Q16 0XEF14
+#define W25Q32 0XEF15
+#define W25Q64 0XEF16
+#define W25Q128 0XEF17
+
+
+
+/* Winbond SPIFalsh Instruction List ָ */
+#define W25X_WriteEnable 0x06
+#define W25X_WriteDisable 0x04
+#define W25X_ReadStatusReg 0x05
+#define W25X_WriteStatusReg 0x01
+#define W25X_ReadData 0x03
+#define W25X_FastReadData 0x0B
+#define W25X_FastReadDual 0x3B
+#define W25X_PageProgram 0x02
+#define W25X_BlockErase 0xD8
+#define W25X_SectorErase 0x20
+#define W25X_ChipErase 0xC7
+#define W25X_PowerDown 0xB9
+#define W25X_ReleasePowerDown 0xAB
+#define W25X_DeviceID 0xAB
+#define W25X_ManufactDeviceID 0x90
+#define W25X_JedecDeviceID 0x9F
+
+void SPI_Flash_Init(void);
+u8 SPI_ReadWriteByte(u8 TxData);
+u8 SPI_Flash_ReadSR(void);
+void SPI_FLASH_Write_SR(u8 sr);
+void SPI_Flash_Wait_Busy(void);
+void SPI_FLASH_Write_Enable(void);
+void SPI_FLASH_Write_Disable(void);
+u16 SPI_Flash_ReadID(void);
+void SPI_Flash_Erase_Sector(u32 Dst_Addr);
+void SPI_Flash_Read(u8* pBuffer,u32 ReadAddr,u16 size);
+void SPI_Flash_Write_Page(u8* pBuffer,u32 WriteAddr,u16 size);
+void SPI_Flash_Write_NoCheck(u8* pBuffer,u32 WriteAddr,u16 size);
+void SPI_Flash_Write(u8* pBuffer,u32 WriteAddr,u16 size);
+void SPI_Flash_Erase_Chip(void);
+void SPI_Flash_PowerDown(void);
+void SPI_Flash_WAKEUP(void);
+
+void SPI_Flash_TEST(void);
+
+#endif /* HARDWARE_SPI_FLASH_H_ */
diff --git a/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_GPIO.h b/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_GPIO.h
new file mode 100644
index 0000000..7c6d9fe
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_GPIO.h
@@ -0,0 +1,54 @@
+#ifndef HD_GPIO_H_
+#define HD_GPIO_H_
+
+#include "ch32v30x.h"
+
+/* Դ */
+#define J1_PwrCtrl_GPIO_PROT GPIOE
+#define J1_PwrCtrl_GPIO_PIN GPIO_Pin_7
+#define J2_PwrCtrl_GPIO_PROT GPIOE
+#define J2_PwrCtrl_GPIO_PIN GPIO_Pin_8
+#define J3_PwrCtrl_GPIO_PROT GPIOE
+#define J3_PwrCtrl_GPIO_PIN GPIO_Pin_9
+#define J4_PwrCtrl_GPIO_PROT GPIOE
+#define J4_PwrCtrl_GPIO_PIN GPIO_Pin_10
+#define J5_PwrCtrl_GPIO_PROT GPIOE
+#define J5_PwrCtrl_GPIO_PIN GPIO_Pin_11
+#define J6_PwrCtrl_GPIO_PROT GPIOE
+#define J6_PwrCtrl_GPIO_PIN GPIO_Pin_12
+#define J7_PwrCtrl_GPIO_PROT GPIOE
+#define J7_PwrCtrl_GPIO_PIN GPIO_Pin_13
+#define J8_PwrCtrl_GPIO_PROT GPIOE
+#define J8_PwrCtrl_GPIO_PIN GPIO_Pin_14
+#define J9_PwrCtrl_GPIO_PROT GPIOE
+#define J9_PwrCtrl_GPIO_PIN GPIO_Pin_15
+
+/* ģ鹩ʹ */
+#define GPIO_PwrCtrl_GPIO_PROT GPIOE
+#define GPIO_PwrCtrl_GPIO_PIN GPIO_Pin_3
+
+/* ģλ */
+#define GPIO_PwrKey_GPIO_PROT GPIOE
+#define GPIO_PwrKey_GPIO_PIN GPIO_Pin_2
+
+/* ι */
+#define WDI_GPIO_PROT GPIOC
+#define WDI_GPIO_PIN GPIO_Pin_13
+
+#define GPIOTypeDef GPIO_TypeDef
+#define GPIOPin uint16_t
+
+/* Bit_SET and Bit_RESET enumeration */
+typedef enum {
+ GPIO_RESET = 0,
+ GPIO_SET
+}BitOperation;
+
+
+
+void HD_GPIO_Init(void);
+void HD_GPIO_Write(GPIOTypeDef *GPIOx, GPIOPin GPIO_Pin, BitOperation BitVal);
+uint8_t HD_InputGPIO_Read(GPIOTypeDef *GPIOx, GPIOPin GPIO_Pin);
+uint8_t HD_OutputGPIO_Read(GPIOTypeDef *GPIOx, GPIOPin GPIO_Pin);
+
+#endif
diff --git a/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_UART.h b/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_UART.h
new file mode 100644
index 0000000..9727f4c
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_UART.h
@@ -0,0 +1,103 @@
+#ifndef HARDWARE_RS485_UART_H_
+#define HARDWARE_RS485_UART_H_
+
+#include "ch32v30x.h"
+
+// #define uart4_enable
+
+
+#define J1_USART UART6
+#define J2_USART UART7
+#define J3_USART USART2
+#define J4_USART UART8
+#define J5_0_USART USART3
+#define Upward_USART UART5
+
+/* 6 PE5 */
+#define J1_DE_PROT GPIOE
+#define J1_DE_PIN GPIO_Pin_5
+
+/* 7 PE6 */
+#define J2_DE_PROT GPIOE
+#define J2_DE_PIN GPIO_Pin_6
+
+/* 2 PA1 */
+#define J3_DE_PROT GPIOA
+#define J3_DE_PIN GPIO_Pin_1
+
+/* 8 PE5 */
+#define J4_DE_PROT GPIOB
+#define J4_DE_PIN GPIO_Pin_0
+
+/* 3 ʱ */
+/*
+| A - B - C - YX |
+| 0 - 0 - 0 - J0 |
+| 0 - 0 - 1 - J5 |
+| 0 - 1 - 0 - J6 |
+| 0 - 1 - 1 - J7 |
+| 1 - 0 - 0 - J8 |
+| 1 - 0 - 1 - J9 |
+*/
+#define J5_0_DE_PROT GPIOD
+#define J5_0_DE_PIN GPIO_Pin_8
+#define J5_0_A_PROT GPIOD
+#define J5_0_A_PIN GPIO_Pin_9
+#define J5_0_B_PROT GPIOD
+#define J5_0_B_PIN GPIO_Pin_10
+#define J5_0_C_PROT GPIOD
+#define J5_0_C_PIN GPIO_Pin_11
+
+#define write485 Bit_SET
+#define read485 Bit_RESET
+
+/* J1_UART6 */
+void J1_485_Init(uint32_t baud);
+#define readJ1_485 GPIO_WriteBit(J1_DE_PROT, J1_DE_PIN, read485);
+#define writeJ1_485 GPIO_WriteBit(J1_DE_PROT, J1_DE_PIN, write485);
+
+/* J2_UART7 */
+void J2_485_Init(uint32_t baud);
+#define readJ2_485 GPIO_WriteBit(J2_DE_PROT, J2_DE_PIN, read485);
+#define writeJ2_485 GPIO_WriteBit(J2_DE_PROT, J2_DE_PIN, write485);
+
+/* J3_USART2 */
+void J3_485_Init(uint32_t baud);
+#define readJ3_485 GPIO_WriteBit(J3_DE_PROT, J3_DE_PIN, read485);
+#define writeJ3_485 GPIO_WriteBit(J3_DE_PROT, J3_DE_PIN, write485);
+
+/* J4_UART8 */
+void J4_485_Init(uint32_t baud);
+#define readJ4_485 GPIO_WriteBit(J4_DE_PROT, J4_DE_PIN, read485);
+#define writeJ4_485 GPIO_WriteBit(J4_DE_PROT, J4_DE_PIN, write485);
+
+/* J0-5_USART3 */
+void J5_0_485_Init(uint32_t baud);
+#define readJ5_0_485 GPIO_WriteBit(J5_0_DE_PROT, J5_0_DE_PIN, read485);
+#define writeJ5_0_485 GPIO_WriteBit(J5_0_DE_PROT, J5_0_DE_PIN, write485);
+void USART_CONNET_J0(void);
+void USART_CONNET_J5(void);
+void USART_CONNET_J6(void);
+void USART_CONNET_J7(void);
+void USART_CONNET_J8(void);
+void USART_CONNET_J9(void);
+
+#ifdef uart4_enable
+/* LORA_UART4 */
+void LORA_UART4_Init(uint32_t baud);
+#endif
+
+/* Upward_UART5 */
+void Upward_UART5_Init(uint32_t baud);
+
+extern void J3_Interrupt();
+extern void J5_0_Interrupt();
+extern void Upward_Interrupt();
+extern void J1_Interrupt();
+extern void J2_Interrupt();
+extern void J4_Interrupt();
+
+void USARTx_SendByte(USART_TypeDef* pUSARTx, uint8_t data);
+void USARTx_SendStr_Len(USART_TypeDef* pUSARTx, char *str, int len);
+
+#endif /* HARDWARE_RS485_UART_H_ */
diff --git a/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_ADC.c b/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_ADC.c
new file mode 100644
index 0000000..7bb5272
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_ADC.c
@@ -0,0 +1,100 @@
+
+#include "HD_ADC.h"
+
+/* adcУֵ */
+int16_t Calibrattion_Val = 0;
+#define adcNum 3
+/* ͨdmaadcɼݴ */
+uint16_t adcData[adcNum] = {0};
+
+/**
+ * @brief ʼadc
+ * @param
+ * @retval
+ */
+void HD_ADC_InIt(void)
+{
+ ADC_InitTypeDef ADC_InitStructure={0};
+ GPIO_InitTypeDef GPIO_InitStructure={0};
+
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE );
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE );
+ RCC_ADCCLKConfig(RCC_PCLK2_Div4);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN;
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN;
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN;
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+
+ ADC_DeInit(ADC1);
+ ADC_InitStructure.ADC_Mode = ADC_Mode_Independent;
+ ADC_InitStructure.ADC_ScanConvMode = ENABLE;
+ ADC_InitStructure.ADC_ContinuousConvMode = ENABLE;
+ ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_None;
+ ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
+ ADC_InitStructure.ADC_NbrOfChannel = adcNum;
+ ADC_Init(ADC1, &ADC_InitStructure);
+
+ ADC_DMACmd(ADC1, ENABLE);
+ ADC_Cmd(ADC1, ENABLE);
+
+ ADC_BufferCmd(ADC1, DISABLE); //disable buffer
+ ADC_ResetCalibration(ADC1);
+ while(ADC_GetResetCalibrationStatus(ADC1));
+ ADC_StartCalibration(ADC1);
+ while(ADC_GetCalibrationStatus(ADC1));
+ Calibrattion_Val = Get_CalibrationValue(ADC1);
+}
+
+/**
+ * @brief ʼadcdma
+ * @param
+ * @retval
+ */
+void ADC_DMA_Init(void)
+{
+ DMA_InitTypeDef DMA_InitStructure={0};
+
+ RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
+
+ DMA_DeInit(DMA1_Channel1);
+ DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&ADC1->RDATAR;
+ DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)adcData;
+ DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
+ DMA_InitStructure.DMA_BufferSize = adcNum;
+ DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
+ DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
+ DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
+ DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
+ DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
+ DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
+ DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
+ DMA_Init(DMA1_Channel1, &DMA_InitStructure);
+}
+
+/**
+ * @brief adcɼ
+ * @param
+ * @retval
+ */
+void startAdcCapture(void)
+{
+ /* ʹadcͨ */
+ DMA_Cmd(DMA1_Channel1 , ENABLE);
+
+ /* ת˳ */
+ ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 1, ADC_SampleTime_239Cycles5);
+ ADC_RegularChannelConfig(ADC1, ADC_Channel_4, 2, ADC_SampleTime_239Cycles5);
+ ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 3, ADC_SampleTime_239Cycles5);
+
+ /* ʹADCdma */
+ ADC_DMACmd(ADC1, ENABLE);
+
+ /* adc */
+ ADC_SoftwareStartConvCmd(ADC1, ENABLE);
+}
diff --git a/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_Flash.c b/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_Flash.c
new file mode 100644
index 0000000..969344c
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_Flash.c
@@ -0,0 +1,456 @@
+/*
+ * Flash.c
+ *
+ * Created on: 2024516
+ * Author: 34509
+ */
+#include "HD_Flash.h"
+#include "pDebug.h"
+
+/* Global Variable */
+uint8_t SPI_FLASH_BUF[4096];
+
+void delay_us(uint32_t us) {
+ volatile uint32_t cycles = us * SystemCoreClock / 4000000; // ʵ
+ while (cycles--) {
+ __asm__ volatile ("nop"); // ֹѭŻ
+ }
+}
+
+/*******************************************************************************
+* Function Name : SPI_Flash_Init
+* Description : Configuring the SPI for operation flash.
+* Input : None
+* Return : None
+*******************************************************************************/
+void SPI_Flash_Init(void)
+{
+ GPIO_InitTypeDef GPIO_InitStructure;
+ SPI_InitTypeDef SPI_InitStructure;
+
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOX, ENABLE );
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPIX, ENABLE );
+
+ GPIO_InitStructure.GPIO_Pin = CS_PIN;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; //
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_Init(CS_GPIO, &GPIO_InitStructure);
+ GPIO_SetBits(CS_GPIO, CS_PIN); //CSPA15øߵƽ
+
+ GPIO_InitStructure.GPIO_Pin = CLK_PIN;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_Init(CLK_GPIO, &GPIO_InitStructure );
+
+ GPIO_InitStructure.GPIO_Pin = DO_PIN;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; //
+ GPIO_Init(DO_GPIO, &GPIO_InitStructure );
+
+ GPIO_InitStructure.GPIO_Pin = DI_PIN;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_Init(DI_GPIO, &GPIO_InitStructure );
+
+ SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; //SPIͨѶΪ˫ȫ˫ʽ
+ SPI_InitStructure.SPI_Mode = SPI_Mode_Master; //SPIΪģʽ
+ SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; //SPIͨѶ֡СΪ8λ
+ SPI_InitStructure.SPI_CPOL = SPI_CPOL_High; //SPIʱӼΪߵƽ
+ SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge; //SPIʱλΪSCKżزɼ
+ SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; //NSSţƬѡţʹģʽΪģʽ
+ SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4; //òʷƵΪ4Ƶ
+ SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; //ݴΪλǰ
+ SPI_InitStructure.SPI_CRCPolynomial = 7; //SPICRCУжʽֵ
+ SPI_Init(SPIX, &SPI_InitStructure); //ʼSPI
+
+ SPI_Cmd(SPIX, ENABLE); //ʹSPI3
+}
+
+/*******************************************************************************
+* Function Name : SPIX_ReadWriteByte
+* Description : SPIX read or write one byte.
+* Input : TxData: write one byte data.
+* Return : Read one byte data.
+*******************************************************************************/
+u8 SPI_ReadWriteByte(u8 TxData)
+{
+ u8 i=0;
+ while (SPI_I2S_GetFlagStatus(SPIX, SPI_I2S_FLAG_TXE) == RESET) //ȴͻΪգTXE¼
+ {
+ i++;
+ if(i>200)return 0;
+ }
+ SPI_I2S_SendData(SPIX, TxData); //дݼĴҪдд뷢ͻͨSPI1һ
+ i=0;
+ while (SPI_I2S_GetFlagStatus(SPIX, SPI_I2S_FLAG_RXNE) == RESET) //ȴջǿգRXNE¼
+ {
+ i++;
+ if(i>200)return 0;
+ }
+ return SPI_I2S_ReceiveData(SPIX); //ȡݼĴȡջݣSPI1յ
+}
+
+/*******************************************************************************
+* Function Name : SPI_Flash_ReadSR
+* Description : Read W25Qxx status register.
+* BIT7 6 5 4 3 2 1 0
+* SPR RV TB BP2 BP1 BP0 WEL BUSY
+* Input : None
+* Return : byte: status register value.
+*******************************************************************************/
+u8 SPI_Flash_ReadSR(void)
+{
+ u8 byte=0;
+
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 0); //PA2=0,ʹƬѡź
+ SPI_ReadWriteByte(W25X_ReadStatusReg); //Ͷ״̬Ĵ
+ byte=SPI_ReadWriteByte(0Xff); //ȡһֽ
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 1); //ȡƬѡź
+
+ return byte;
+}
+
+/*******************************************************************************
+* Function Name : SPI_FLASH_Write_SR
+* Description : Write W25Qxx status register.
+* Input : sr:status register value.
+* Return : None
+*******************************************************************************/
+void SPI_FLASH_Write_SR(u8 sr)
+{
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 0);
+ SPI_ReadWriteByte(W25X_WriteStatusReg); //д״̬Ĵ
+ SPI_ReadWriteByte(sr); //дһֽ
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 1);
+}
+
+/*******************************************************************************
+* Function Name : SPI_Flash_Wait_Busy
+* Description : Wait flash free.
+* Input : None
+* Return : None
+*******************************************************************************/
+void SPI_Flash_Wait_Busy(void)
+{
+ while((SPI_Flash_ReadSR()&0x01)==0x01); //ȴFLASH
+}
+
+/*******************************************************************************
+* Function Name : SPI_FLASH_Write_Enable
+* Description : Enable flash write.
+* Input : None
+* Return : None
+*******************************************************************************/
+void SPI_FLASH_Write_Enable(void)
+{
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 0);
+ SPI_ReadWriteByte(W25X_WriteEnable); //дʹ
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 1);
+}
+
+/*******************************************************************************
+* Function Name : SPI_FLASH_Write_Disable
+* Description : Disable flash write.
+* Input : None
+* Return : None
+*******************************************************************************/
+void SPI_FLASH_Write_Disable(void)
+{
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 0);
+ SPI_ReadWriteByte(W25X_WriteDisable); //дָֹ
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 1);
+}
+
+/*******************************************************************************
+* Function Name : SPI_Flash_ReadID
+* Description : Read flash ID.
+* Input : None
+* Return : Temp: FLASH ID.
+*******************************************************************************/
+u16 SPI_Flash_ReadID(void)
+{
+ u16 Temp = 0;
+
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 0);
+ SPI_ReadWriteByte(W25X_ManufactDeviceID); //ͶȡID
+ SPI_ReadWriteByte(0x00);
+ SPI_ReadWriteByte(0x00);
+ SPI_ReadWriteByte(0x00);
+ Temp|=SPI_ReadWriteByte(0xFF)<<8;
+ Temp|=SPI_ReadWriteByte(0xFF);
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 1);
+
+ return Temp;
+}
+
+/*******************************************************************************
+* Function Name : SPI_Flash_Erase_Sector
+* Description : Erase one sector(4Kbyte).
+* Input : Dst_Addr: 0 2047
+* Return : None
+*******************************************************************************/
+void SPI_Flash_Erase_Sector(u32 Dst_Addr)
+{
+ Dst_Addr*=4096;
+ SPI_FLASH_Write_Enable();
+ SPI_Flash_Wait_Busy();
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 0);
+ SPI_ReadWriteByte(W25X_SectorErase); //ָ
+ SPI_ReadWriteByte((u8)((Dst_Addr)>>16)); //24bitַ
+ SPI_ReadWriteByte((u8)((Dst_Addr)>>8));
+ SPI_ReadWriteByte((u8)Dst_Addr);
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 1);
+ SPI_Flash_Wait_Busy(); //ȴ
+}
+
+/*******************************************************************************
+* Function Name : SPI_Flash_Read
+* Description : Read data from flash.
+* Input : pBuffer:
+* ReadAddr:Initial address(24bit).
+* size: Data length.
+* Return : None
+*******************************************************************************/
+void SPI_Flash_Read(u8* pBuffer,u32 ReadAddr,u16 size)
+{
+ u16 i;
+
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 0);
+ SPI_ReadWriteByte(W25X_ReadData); //Ͷȡ
+ SPI_ReadWriteByte((u8)((ReadAddr)>>16)); //24bitַ
+ SPI_ReadWriteByte((u8)((ReadAddr)>>8));
+ SPI_ReadWriteByte((u8)ReadAddr);
+
+ for(i=0;i>16)); //24bitַ
+ SPI_ReadWriteByte((u8)((WriteAddr)>>8));
+ SPI_ReadWriteByte((u8)WriteAddr);
+
+ for(i=0;i256)pageremain=256; //һοд256ֽ
+ else pageremain=size; //256ֽ
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name : SPI_Flash_Write
+* Description : Write data to flash.(no need Erase)
+* Input : pBuffer:
+* WriteAddr: Initial address(24bit).
+* size: Data length.
+* Return : None
+*******************************************************************************/
+void SPI_Flash_Write(u8* pBuffer,u32 WriteAddr,u16 size)
+{
+ u32 secpos;
+ u16 secoff;
+ u16 secremain;
+ u16 i;
+
+ secpos=WriteAddr/4096; //ַ
+ secoff=WriteAddr%4096; //ڵı
+ secremain=4096-secoff; //ʣռС
+
+ if(size<=secremain)secremain=size; //4096ֽ
+
+ while(1)
+ {
+ SPI_Flash_Read(SPI_FLASH_BUF,secpos*4096,4096); //
+
+ for(i=0;i4096)
+ {
+ secremain=4096; //һд
+ }
+ else
+ {
+ secremain=size; //һд
+ }
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name : SPI_Flash_Erase_Chip
+* Description : Erase all FLASH pages.
+* Input : None
+* Return : None
+*******************************************************************************/
+void SPI_Flash_Erase_Chip(void)
+{
+ SPI_FLASH_Write_Enable();
+ SPI_Flash_Wait_Busy();
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 0);
+ SPI_ReadWriteByte(W25X_ChipErase); //Ƭָ
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 1);
+ SPI_Flash_Wait_Busy();
+}
+
+/*******************************************************************************
+* Function Name : SPI_Flash_PowerDown
+* Description : Enter power down mode.
+* Input : None
+* Return : None
+*******************************************************************************/
+void SPI_Flash_PowerDown(void)
+{
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 0);
+ SPI_ReadWriteByte(W25X_PowerDown); //ͽϵģʽ֮
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 1);
+ delay_us(3);
+}
+
+/*******************************************************************************
+* Function Name : SPI_Flash_WAKEUP
+* Description : Power down wake up.
+* Input : None
+* Return : None
+*******************************************************************************/
+void SPI_Flash_WAKEUP(void)
+{
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 0);
+ SPI_ReadWriteByte(W25X_ReleasePowerDown); //Ͷϵ绽ָ
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 1);
+ delay_us(3);
+}
+
+void SPI_Flash_TEST(void)
+{
+ const int SIZE = 100;
+ u8 TEXT_Buf[100] = "hello world \n";
+ u8 datap[SIZE];
+ u16 Flash_Model;
+ SPI_Flash_Init();
+ Flash_Model = SPI_Flash_ReadID();
+ log_info("SPI_Flash_ReadID = %x \n", Flash_Model);
+ switch(Flash_Model)
+ {
+ case W25Q80:
+ log_info("W25Q80 OK!\r\n");
+ break;
+ case W25Q16:
+ log_info("W25Q16 OK!\r\n");
+ break;
+ case W25Q32:
+ log_info("W25Q32 OK!\r\n");
+ break;
+ case W25Q64:
+ log_info("W25Q64 OK!\r\n");
+ break;
+ case W25Q128:
+ log_info("W25Q128 OK!\r\n");
+ break;
+ default:
+ log_info("Fail!\r\n");
+ break;
+ }
+
+ log_info("Start Erase W25Qxx....\r\n");
+ SPI_Flash_Erase_Sector(0);
+ log_info("W25Qxx Erase Finished!\r\n");
+
+ delay_us(500);
+ log_info("Start Write W25Qxx....\r\n");
+ SPI_Flash_Write((u8*)TEXT_Buf,0,SIZE);
+ log_info("W25Qxx Write Finished!\r\n");
+
+ delay_us(500);
+ log_info("Start Read W25Qxx....\r\n");
+ SPI_Flash_Read(datap,0x0,SIZE);
+ log_info("READ:%s\r\n", datap );
+}
diff --git a/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_GPIO.c b/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_GPIO.c
new file mode 100644
index 0000000..f0df871
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_GPIO.c
@@ -0,0 +1,95 @@
+#include "HD_GPIO.h"
+
+void HD_GPIO_Init(void)
+{
+ GPIO_InitTypeDef GPIO_InitStructure;
+
+ /* ģԴʹţĬϲʹ */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOE, ENABLE);
+ GPIO_InitStructure.GPIO_Pin = GPIO_PwrCtrl_GPIO_PIN;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_10MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+ GPIO_Init(GPIO_PwrCtrl_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(GPIO_PwrCtrl_GPIO_PROT, GPIO_PwrCtrl_GPIO_PIN, Bit_RESET);
+
+ /* λģţĬϵ͵ƽ */
+ GPIO_InitStructure.GPIO_Pin = GPIO_PwrKey_GPIO_PIN;
+ GPIO_Init(GPIO_PwrKey_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(GPIO_PwrKey_GPIO_PROT, GPIO_PwrKey_GPIO_PIN, Bit_RESET);
+
+ /* ԴţĬϲԴ */
+ GPIO_InitStructure.GPIO_Pin = J1_PwrCtrl_GPIO_PIN;
+ GPIO_Init(J1_PwrCtrl_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(J1_PwrCtrl_GPIO_PROT, J1_PwrCtrl_GPIO_PIN, Bit_RESET);
+
+ GPIO_InitStructure.GPIO_Pin = J2_PwrCtrl_GPIO_PIN;
+ GPIO_Init(J2_PwrCtrl_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(J2_PwrCtrl_GPIO_PROT, J2_PwrCtrl_GPIO_PIN, Bit_RESET);
+
+ GPIO_InitStructure.GPIO_Pin = J3_PwrCtrl_GPIO_PIN;
+ GPIO_Init(J3_PwrCtrl_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(J3_PwrCtrl_GPIO_PROT, J3_PwrCtrl_GPIO_PIN, Bit_RESET);
+
+ GPIO_InitStructure.GPIO_Pin = J4_PwrCtrl_GPIO_PIN;
+ GPIO_Init(J4_PwrCtrl_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(J4_PwrCtrl_GPIO_PROT, J4_PwrCtrl_GPIO_PIN, Bit_RESET);
+
+ GPIO_InitStructure.GPIO_Pin = J5_PwrCtrl_GPIO_PIN;
+ GPIO_Init(J5_PwrCtrl_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(J5_PwrCtrl_GPIO_PROT, J5_PwrCtrl_GPIO_PIN, Bit_RESET);
+
+ GPIO_InitStructure.GPIO_Pin = J6_PwrCtrl_GPIO_PIN;
+ GPIO_Init(J6_PwrCtrl_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(J6_PwrCtrl_GPIO_PROT, J6_PwrCtrl_GPIO_PIN, Bit_RESET);
+
+ GPIO_InitStructure.GPIO_Pin = J7_PwrCtrl_GPIO_PIN;
+ GPIO_Init(J7_PwrCtrl_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(J7_PwrCtrl_GPIO_PROT, J7_PwrCtrl_GPIO_PIN, Bit_RESET);
+
+ GPIO_InitStructure.GPIO_Pin = J8_PwrCtrl_GPIO_PIN;
+ GPIO_Init(J8_PwrCtrl_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(J8_PwrCtrl_GPIO_PROT, J8_PwrCtrl_GPIO_PIN, Bit_RESET);
+
+ GPIO_InitStructure.GPIO_Pin = J9_PwrCtrl_GPIO_PIN;
+ GPIO_Init(J9_PwrCtrl_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(J9_PwrCtrl_GPIO_PROT, J9_PwrCtrl_GPIO_PIN, Bit_RESET);
+
+ /* ι */
+ GPIO_InitStructure.GPIO_Pin = WDI_GPIO_PIN;
+ GPIO_Init(WDI_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(WDI_GPIO_PROT, WDI_GPIO_PIN, Bit_SET);
+}
+
+/**
+ * @brief IOƽ
+ * @param GPIOx
+ GPIO_Pin
+ BitVal
+ * @retval
+ */
+void HD_GPIO_Write(GPIOTypeDef *GPIOx, GPIOPin GPIO_Pin, BitOperation BitVal)
+{
+ GPIO_WriteBit(GPIOx, GPIO_Pin, BitVal);
+}
+
+/**
+ * @brief õIOƽ
+ * @param GPIOx
+ GPIO_Pin
+ * @retval
+ */
+uint8_t HD_InputGPIO_Read(GPIOTypeDef *GPIOx, GPIOPin GPIO_Pin)
+{
+ return GPIO_ReadInputDataBit(GPIOx, GPIO_Pin);
+}
+
+/**
+ * @brief õIOƽ
+ * @param GPIOx
+ GPIO_Pin
+ * @retval
+ */
+uint8_t HD_OutputGPIO_Read(GPIOTypeDef *GPIOx, GPIOPin GPIO_Pin)
+{
+ return GPIO_ReadOutputDataBit(GPIOx, GPIO_Pin);
+}
diff --git a/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_UART.c b/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_UART.c
new file mode 100644
index 0000000..2f0ebfe
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_UART.c
@@ -0,0 +1,562 @@
+#include "HD_UART.h"
+
+void USART2_IRQHandler(void) __attribute__((interrupt()));
+void USART3_IRQHandler(void) __attribute__((interrupt()));
+#ifdef uart4_enable
+// void UART4_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
+void UART4_IRQHandler(void) __attribute__((interrupt()));
+#endif
+void UART5_IRQHandler(void) __attribute__((interrupt()));
+void UART6_IRQHandler(void) __attribute__((interrupt()));
+void UART7_IRQHandler(void) __attribute__((interrupt()));
+void UART8_IRQHandler(void) __attribute__((interrupt()));
+
+#define write Bit_SET
+#define read Bit_RESET
+
+/*
+ * @brief ʼUART6ӦJ1_485,ĬΪ
+ * @param baud
+ * @retval
+ *
+ */
+void J1_485_Init(uint32_t baud)
+{
+ /* ʼDE */
+ GPIO_InitTypeDef GPIO_InitStructure;
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOE, ENABLE);
+ GPIO_InitStructure.GPIO_Pin = J1_DE_PIN;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+ GPIO_InitStructure.GPIO_Speed=GPIO_Speed_50MHz;
+ GPIO_Init(J1_DE_PROT, &GPIO_InitStructure);
+ readJ1_485;
+
+ USART_InitTypeDef USART_InitStructure;
+ NVIC_InitTypeDef NVIC_InitStructure;
+
+ /* UART6 TX --> PC0 RX --> PC1 */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART6, ENABLE);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //PC0Ϊ
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; //PC1Ϊ
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+ USART_InitStructure.USART_BaudRate = baud;
+ USART_InitStructure.USART_WordLength = USART_WordLength_8b;
+ USART_InitStructure.USART_StopBits = USART_StopBits_1;
+ USART_InitStructure.USART_Parity = USART_Parity_No;
+ USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
+ USART_InitStructure.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
+ USART_Init(UART6, &USART_InitStructure);
+
+ NVIC_InitStructure.NVIC_IRQChannel = UART6_IRQn;
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority=3; //ռȼΪ3
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; //ȼΪ3
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //IRQͨʹ
+ NVIC_Init(&NVIC_InitStructure); //жȼʼ
+
+ USART_ITConfig(UART6, USART_IT_RXNE, ENABLE);
+
+ USART_Cmd(UART6,ENABLE);
+}
+
+
+/*
+ * @brief ʼUART7ӦJ2_485,ĬΪգԴر״̬
+ * @param baud
+ * @retval
+ *
+ */
+void J2_485_Init(uint32_t baud)
+{
+ /* ʼDE */
+ GPIO_InitTypeDef GPIO_InitStructure;
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOE, ENABLE);
+ GPIO_InitStructure.GPIO_Pin = J2_DE_PIN;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+ GPIO_InitStructure.GPIO_Speed=GPIO_Speed_50MHz;
+ GPIO_Init(J2_DE_PROT, &GPIO_InitStructure);
+ readJ2_485;
+
+ USART_InitTypeDef USART_InitStructure;
+ NVIC_InitTypeDef NVIC_InitStructure;
+
+ /* UART7 TX --> PC2 RX --> PC3 */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART7, ENABLE);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //PC2Ϊ
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; //PC3Ϊ
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+ USART_InitStructure.USART_BaudRate = baud;
+ USART_InitStructure.USART_WordLength = USART_WordLength_8b;
+ USART_InitStructure.USART_StopBits = USART_StopBits_1;
+ USART_InitStructure.USART_Parity = USART_Parity_No;
+ USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
+ USART_InitStructure.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
+ USART_Init(UART7, &USART_InitStructure);
+
+ NVIC_InitStructure.NVIC_IRQChannel = UART7_IRQn;
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority=3; //ռȼΪ3
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; //ȼΪ3
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //IRQͨʹ
+ NVIC_Init(&NVIC_InitStructure); //жȼʼ
+
+ USART_ITConfig(UART7, USART_IT_RXNE, ENABLE);
+
+ USART_Cmd(UART7,ENABLE);
+}
+
+/*
+ * @brief ʼUSART2ӦJ3_485,ĬΪգԴر״̬
+ * @param baud
+ * @retval
+ *
+ */
+void J3_485_Init(uint32_t baud)
+{
+ /* ʼDE */
+ GPIO_InitTypeDef GPIO_InitStructure;
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
+ GPIO_InitStructure.GPIO_Pin = J3_DE_PIN;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+ GPIO_InitStructure.GPIO_Speed=GPIO_Speed_50MHz;
+ GPIO_Init(J3_DE_PROT, &GPIO_InitStructure);
+ readJ3_485;
+
+ USART_InitTypeDef USART_InitStructure;
+ NVIC_InitTypeDef NVIC_InitStructure;
+
+ /* USART2 TX --> PA2 RX --> PA3 */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //PA2Ϊ
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; //PA3Ϊ
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+
+ USART_InitStructure.USART_BaudRate = baud;
+ USART_InitStructure.USART_WordLength = USART_WordLength_8b;
+ USART_InitStructure.USART_StopBits = USART_StopBits_1;
+ USART_InitStructure.USART_Parity = USART_Parity_No;
+ USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
+ USART_InitStructure.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
+ USART_Init(USART2, &USART_InitStructure);
+
+ NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn;
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority=3; //ռȼΪ1
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; //ȼΪ1
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //IRQͨʹ
+ NVIC_Init(&NVIC_InitStructure); //жȼʼ
+
+ USART_ITConfig(USART2, USART_IT_RXNE, ENABLE);
+
+ USART_Cmd(USART2,ENABLE);
+}
+
+/*
+ * @brief ʼUART8ӦJ4_485,ĬΪգԴر״̬
+ * @param baud
+ * @retval
+ *
+ */
+void J4_485_Init(uint32_t baud)
+{
+ /* ʼDE */
+ GPIO_InitTypeDef GPIO_InitStructure;
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
+ GPIO_InitStructure.GPIO_Pin = J4_DE_PIN;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+ GPIO_InitStructure.GPIO_Speed=GPIO_Speed_50MHz;
+ GPIO_Init(J4_DE_PROT, &GPIO_InitStructure);
+ readJ4_485;
+
+ USART_InitTypeDef USART_InitStructure;
+ NVIC_InitTypeDef NVIC_InitStructure;
+
+ /* UART8 TX --> PC4 RX --> PC5 */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART8, ENABLE);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //PC4Ϊ
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; //PC5Ϊ
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+ USART_InitStructure.USART_BaudRate = baud;
+ USART_InitStructure.USART_WordLength = USART_WordLength_8b;
+ USART_InitStructure.USART_StopBits = USART_StopBits_1;
+ USART_InitStructure.USART_Parity = USART_Parity_No;
+ USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
+ USART_InitStructure.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
+ USART_Init(UART8, &USART_InitStructure);
+
+ NVIC_InitStructure.NVIC_IRQChannel = UART8_IRQn;
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority=3; //ռȼΪ3
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; //ȼΪ3
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //IRQͨʹ
+ NVIC_Init(&NVIC_InitStructure); //жȼʼ
+
+ USART_ITConfig(UART8, USART_IT_RXNE, ENABLE);
+
+ USART_Cmd(UART8,ENABLE);
+}
+
+/*
+ * @brief ʼUSART3ڿJ5-06485ӿ,ÿƵ485ΪJ0Դȫر
+ * @param baud
+ * @retval
+ *
+ */
+void J5_0_485_Init(uint32_t baud)
+{
+ /* ʼDE */
+ GPIO_InitTypeDef GPIO_InitStructure;
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD,ENABLE);
+ GPIO_InitStructure.GPIO_Pin = J5_0_DE_PIN;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+ GPIO_InitStructure.GPIO_Speed=GPIO_Speed_50MHz;
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+ readJ5_0_485;
+ GPIO_InitStructure.GPIO_Pin = J5_0_A_PIN;
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+ GPIO_InitStructure.GPIO_Pin = J5_0_B_PIN;
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+ GPIO_InitStructure.GPIO_Pin = J5_0_C_PIN;
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+ USART_CONNET_J0();
+
+ USART_InitTypeDef USART_InitStructure;
+ NVIC_InitTypeDef NVIC_InitStructure;
+
+ /* USART3 TX --> PB10 RX --> PB11 */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //PB10Ϊ
+ GPIO_Init(GPIOB, &GPIO_InitStructure);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; //PB11Ϊ
+ GPIO_Init(GPIOB, &GPIO_InitStructure);
+
+ USART_InitStructure.USART_BaudRate = baud;
+ USART_InitStructure.USART_WordLength = USART_WordLength_8b;
+ USART_InitStructure.USART_StopBits = USART_StopBits_1;
+ USART_InitStructure.USART_Parity = USART_Parity_No;
+ USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
+ USART_InitStructure.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
+ USART_Init(USART3, &USART_InitStructure);
+
+ NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn;
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority=1; //ռȼΪ1
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; //ȼΪ1
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //IRQͨʹ
+ NVIC_Init(&NVIC_InitStructure); //жȼʼ
+
+ USART_ITConfig(USART3, USART_IT_RXNE, ENABLE);
+// USART_ITConfig(USART3, USART_IT_IDLE, ENABLE);
+
+ USART_Cmd(USART3,ENABLE);
+}
+/*
+ * Function Name : USART_CONNET_J0
+ * Description : ƴ3J0Ӧ485.
+ * Input : None
+ * Return : None
+ **/
+void USART_CONNET_J0(void)
+{
+ GPIO_WriteBit(J5_0_A_PROT, J5_0_A_PIN, Bit_RESET);
+ GPIO_WriteBit(J5_0_B_PROT, J5_0_B_PIN, Bit_RESET);
+ GPIO_WriteBit(J5_0_C_PROT, J5_0_C_PIN, Bit_RESET);
+}
+
+/*
+ * Function Name : USART_CONNET_J5
+ * Description : ƴ3J5Ӧ485.
+ * Input : None
+ * Return : None
+ **/
+void USART_CONNET_J5(void)
+{
+ GPIO_WriteBit(J5_0_A_PROT, J5_0_A_PIN, Bit_RESET);
+ GPIO_WriteBit(J5_0_B_PROT, J5_0_B_PIN, Bit_RESET);
+ GPIO_WriteBit(J5_0_C_PROT, J5_0_C_PIN, Bit_SET);
+}
+
+/*
+ * Function Name : USART_CONNET_J6
+ * Description : ƴ3J6Ӧ485.
+ * Input : None
+ * Return : None
+ **/
+void USART_CONNET_J6(void)
+{
+ GPIO_WriteBit(J5_0_A_PROT, J5_0_A_PIN, Bit_RESET);
+ GPIO_WriteBit(J5_0_B_PROT, J5_0_B_PIN, Bit_SET);
+ GPIO_WriteBit(J5_0_C_PROT, J5_0_C_PIN, Bit_RESET);
+}
+
+/*
+ * Function Name : USART_CONNET_J7
+ * Description : ƴ3J7Ӧ485.
+ * Input : None
+ * Return : None
+ **/
+void USART_CONNET_J7(void)
+{
+ GPIO_WriteBit(J5_0_A_PROT, J5_0_A_PIN, Bit_RESET);
+ GPIO_WriteBit(J5_0_B_PROT, J5_0_B_PIN, Bit_SET);
+ GPIO_WriteBit(J5_0_C_PROT, J5_0_C_PIN, Bit_SET);
+}
+
+/*
+ * Function Name : USART_CONNET_J8
+ * Description : ƴ3J8Ӧ485.
+ * Input : None
+ * Return : None
+ **/
+void USART_CONNET_J8(void)
+{
+ GPIO_WriteBit(J5_0_A_PROT, J5_0_A_PIN, Bit_SET);
+ GPIO_WriteBit(J5_0_B_PROT, J5_0_B_PIN, Bit_RESET);
+ GPIO_WriteBit(J5_0_C_PROT, J5_0_C_PIN, Bit_RESET);
+}
+
+/*
+ * Function Name : USART_CONNET_J9
+ * Description : ƴ3J9Ӧ485.
+ * Input : None
+ * Return : None
+ **/
+void USART_CONNET_J9(void)
+{
+ GPIO_WriteBit(J5_0_A_PROT, J5_0_A_PIN, Bit_SET);
+ GPIO_WriteBit(J5_0_B_PROT, J5_0_B_PIN, Bit_RESET);
+ GPIO_WriteBit(J5_0_C_PROT, J5_0_C_PIN, Bit_SET);
+}
+
+
+#ifdef uart4_enable
+/*
+ * @brief ʼUART4ӦLORA
+ * @param baud
+ * @retval
+ *
+ */
+void LORA_UART4_Init(uint32_t baud)
+{
+ GPIO_InitTypeDef GPIO_InitStructure;
+ USART_InitTypeDef USART_InitStructure;
+ NVIC_InitTypeDef NVIC_InitStructure;
+
+ /* UART4 TX --> PC10 RX --> PC11 */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART4, ENABLE);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //PC10Ϊ
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; //PC11Ϊ
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+ USART_InitStructure.USART_BaudRate = baud;
+ USART_InitStructure.USART_WordLength = USART_WordLength_8b;
+ USART_InitStructure.USART_StopBits = USART_StopBits_1;
+ USART_InitStructure.USART_Parity = USART_Parity_No;
+ USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
+ USART_InitStructure.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
+ USART_Init(UART4, &USART_InitStructure);
+
+ NVIC_InitStructure.NVIC_IRQChannel = UART4_IRQn;
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority=3; //ռȼΪ3
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; //ȼΪ3
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //IRQͨʹ
+ NVIC_Init(&NVIC_InitStructure); //жȼʼ
+
+ USART_ITConfig(UART4, USART_IT_RXNE, ENABLE);
+
+ USART_Cmd(UART4,ENABLE);
+}
+#endif
+
+/*
+ * @brief ʼUART5ӦĶϴ
+ * @param baud
+ * @retval
+ *
+ */
+void Upward_UART5_Init(uint32_t baud)
+{
+ GPIO_InitTypeDef GPIO_InitStructure;
+ USART_InitTypeDef USART_InitStructure;
+ NVIC_InitTypeDef NVIC_InitStructure;
+
+ /* UART5 TX --> PC12 RX --> PD2 */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD, ENABLE);
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART5, ENABLE);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //PC12Ϊ
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; //PD2Ϊ
+ GPIO_Init(GPIOD, &GPIO_InitStructure);
+
+ USART_InitStructure.USART_BaudRate = baud;
+ USART_InitStructure.USART_WordLength = USART_WordLength_8b;
+ USART_InitStructure.USART_StopBits = USART_StopBits_1;
+ USART_InitStructure.USART_Parity = USART_Parity_No;
+ USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
+ USART_InitStructure.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
+ USART_Init(UART5, &USART_InitStructure);
+
+ USART_ITConfig(UART5, USART_IT_RXNE, ENABLE);
+
+ NVIC_InitStructure.NVIC_IRQChannel = UART5_IRQn;
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority=1; //ռȼΪ3
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; //ȼΪ3
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //IRQͨʹ
+ NVIC_Init(&NVIC_InitStructure); //жȼʼ
+
+ USART_Cmd(UART5,ENABLE);
+}
+
+
+
+void USART2_IRQHandler(void)
+{
+ J3_Interrupt();
+}
+
+void USART3_IRQHandler(void)
+{
+ J5_0_Interrupt();
+}
+
+#ifdef uart4_enable
+void UART4_IRQHandler(void)
+{
+
+}
+#endif
+
+void UART5_IRQHandler(void)
+{
+ Upward_Interrupt();
+}
+
+void UART6_IRQHandler(void)
+{
+ J1_Interrupt();
+}
+
+void UART7_IRQHandler(void)
+{
+ J2_Interrupt();
+}
+
+void UART8_IRQHandler(void)
+{
+ J4_Interrupt();
+}
+
+
+/*
+ * @brief һַ
+ * @param pUSARTx
+ data ַ
+ * @retval
+ *
+ */
+void USARTx_SendByte(USART_TypeDef* pUSARTx, uint8_t data)
+{
+ while(USART_GetFlagStatus(pUSARTx, USART_FLAG_TXE) == RESET) /* waiting for sending finish */
+ {
+ }
+ USART_SendData(pUSARTx, data);
+}
+
+/*
+ * @brief ַ
+ * @param pUSARTx
+ data ַ
+ len ַij
+ * @retval
+ *
+ */
+void USARTx_SendStr_Len(USART_TypeDef* pUSARTx, char *str, int len)
+{
+ if (pUSARTx == J1_USART) {
+ writeJ1_485;
+ } else if (pUSARTx == J2_USART) {
+ writeJ2_485;
+ } else if (pUSARTx == J3_USART) {
+ writeJ3_485;
+ } else if (pUSARTx == J4_USART) {
+ writeJ4_485;
+ } else if (pUSARTx == J5_0_USART) {
+ writeJ5_0_485;
+ }
+
+ for (int i = 0; i < len; i++) {
+ USARTx_SendByte(pUSARTx, str[i]);
+ }
+
+ if (pUSARTx == J1_USART) {
+ readJ1_485;
+ } else if (pUSARTx == J2_USART) {
+ readJ2_485;
+ } else if (pUSARTx == J3_USART) {
+ readJ3_485;
+ } else if (pUSARTx == J4_USART) {
+ readJ4_485;
+ } else if (pUSARTx == J5_0_USART) {
+ readJ5_0_485;
+ }
+}
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/CH32V303-FreeRTOS/App/tools/comm_types.h b/CH32V303-FreeRTOS/App/tools/comm_types.h
index a8f100a..7065781 100644
--- a/CH32V303-FreeRTOS/App/tools/comm_types.h
+++ b/CH32V303-FreeRTOS/App/tools/comm_types.h
@@ -5,13 +5,13 @@
typedef unsigned long int ulong;
typedef unsigned short int ushort;
typedef unsigned int uint;
-typedef unsigned char u_int8_t;
+// typedef unsigned char u_int8_t;
typedef unsigned char uint8_t;
-typedef unsigned short int u_int16_t;
+// typedef unsigned short int u_int16_t;
typedef unsigned short int uint16_t;
-typedef unsigned int u_int32_t;
-typedef unsigned int uint32_t;
-typedef unsigned long long u_int64_t;
+// typedef unsigned int u_int32_t;
+// typedef unsigned int uint32_t;
+// typedef unsigned long long u_int64_t;
typedef unsigned long long uint64_t;
typedef unsigned char BOOL;
typedef float float_t;
diff --git a/CH32V303-FreeRTOS/App/tools/pDebug.h b/CH32V303-FreeRTOS/App/tools/pDebug.h
index 4cdae3f..abab635 100644
--- a/CH32V303-FreeRTOS/App/tools/pDebug.h
+++ b/CH32V303-FreeRTOS/App/tools/pDebug.h
@@ -29,9 +29,13 @@
#define log_warn(M, ...) do {}while(0)
#define log_info(M, ...) do {}while(0)
#else
-#define log_info(M, ...) {if(log_info_enable){char *p = strrchr(__FILE__, '\\'); debug_printf("[INFO] [%s:%d] " M "\r\n", p+1, __LINE__, ##__VA_ARGS__);}}
-#define log_warn(M, ...) {if(log_warn_enable){char *p = strrchr(__FILE__, '\\'); debug_printf("[WARN] [%s:%d] " M "\r\n", p+1, __LINE__, ##__VA_ARGS__);}}
-#define log_error(M, ...) {if(log_error_enable){char *p = strrchr(__FILE__, '\\'); debug_printf("[ERROR] [%s:%d] " M "\r\n", p+1, __LINE__,##__VA_ARGS__);}}
+// #define log_info(M, ...) {if(log_info_enable){char *p = strrchr(__FILE__, '\\'); debug_printf("[INFO] [%s:%d] " M "\r\n", p+1, __LINE__, ##__VA_ARGS__);}}
+// #define log_warn(M, ...) {if(log_warn_enable){char *p = strrchr(__FILE__, '\\'); debug_printf("[WARN] [%s:%d] " M "\r\n", p+1, __LINE__, ##__VA_ARGS__);}}
+// #define log_error(M, ...) {if(log_error_enable){char *p = strrchr(__FILE__, '\\'); debug_printf("[ERROR] [%s:%d] " M "\r\n", p+1, __LINE__,##__VA_ARGS__);}}
+
+#define log_info(M, ...) {if(log_info_enable){char *p = strrchr(__FILE__, '\\'); printf("[INFO] [%s:%d] " M "\r\n", p+1, __LINE__, ##__VA_ARGS__);}}
+#define log_warn(M, ...) {if(log_warn_enable){char *p = strrchr(__FILE__, '\\'); printf("[WARN] [%s:%d] " M "\r\n", p+1, __LINE__, ##__VA_ARGS__);}}
+#define log_error(M, ...) {if(log_error_enable){char *p = strrchr(__FILE__, '\\'); printf("[ERROR] [%s:%d] " M "\r\n", p+1, __LINE__,##__VA_ARGS__);}}
#endif
#endif
\ No newline at end of file
diff --git a/CH32V303-FreeRTOS/CH32V303-FreeRTOS.wvproj b/CH32V303-FreeRTOS/CH32V303-FreeRTOS.wvproj
index c9dd285..e20531d 100644
--- a/CH32V303-FreeRTOS/CH32V303-FreeRTOS.wvproj
+++ b/CH32V303-FreeRTOS/CH32V303-FreeRTOS.wvproj
@@ -127,7 +127,9 @@
"${project}/FreeRTOS/portable/MemMang",
"${project}/App/hardwareDriver/Inc",
"${project}/App/tools",
- "${project}/App/tools/RingQueue"
+ "${project}/App/tools/RingQueue",
+ "${project}/App",
+ "${project}/App/functionalModule/Inc"
],
"include_system_paths": [],
"include_files": []
@@ -159,7 +161,12 @@
"${project}/FreeRTOS/portable/Common",
"${project}/FreeRTOS/portable/GCC/RISC-V",
"${project}/FreeRTOS/portable/GCC/RISC-V/chip_specific_extensions/RV32I_PFIC_no_extensions",
- "${project}/FreeRTOS/portable/MemMang"
+ "${project}/FreeRTOS/portable/MemMang",
+ "${project}/App/hardwareDriver/Inc",
+ "${project}/App/tools",
+ "${project}/App/tools/RingQueue",
+ "${project}/App/functionalModule/Inc",
+ "${project}/App/application/Inc"
],
"include_system_paths": [],
"include_files": []
@@ -718,10 +725,8 @@
"ATTR_BUILD_BEFORE_LAUNCH_ATTR": 2,
"GdbServerAllocateConsole": true,
"GdbServerAllocateTelnetConsole": false,
- "SkipDownloadBeforeDebug": false,
"StartGdbCLient": true,
- "UPDATE_THREADLIST_ON_SUSPEND": false,
- "DebugInRam": false
+ "UPDATE_THREADLIST_ON_SUSPEND": false
}
}
}
\ No newline at end of file
diff --git a/CH32V303-FreeRTOS/Ld/Link.ld b/CH32V303-FreeRTOS/Ld/Link.ld
index 7748497..9969e15 100644
--- a/CH32V303-FreeRTOS/Ld/Link.ld
+++ b/CH32V303-FreeRTOS/Ld/Link.ld
@@ -1 +1,186 @@
-ENTRY( _start )
__stack_size = 2048;
PROVIDE( _stack_size = __stack_size );
MEMORY
{
/* CH32V30x_D8C - CH32V305RB-CH32V305FB
CH32V30x_D8 - CH32V303CB-CH32V303RB
*/
/**/
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 128K
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K
/* CH32V30x_D8C - CH32V307VC-CH32V307WC-CH32V307RC-CH32V305CC
CH32V30x_D8 - CH32V303VC-CH32V303RC
FLASH + RAM supports the following configuration
For specific choices, please refer :CH32FV2x_V3xRM.PDF\Table 32-3
FLASH-192K + RAM-128K
FLASH-224K + RAM-96K
FLASH-256K + RAM-64K
FLASH-288K + RAM-32K
FLASH-128K + RAM-192K
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 288K
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K*/
}
SECTIONS
{
.init :
{
_sinit = .;
. = ALIGN(4);
KEEP(*(SORT_NONE(.init)))
. = ALIGN(4);
_einit = .;
} >FLASH AT>FLASH
.vector :
{
*(.vector);
. = ALIGN(64);
} >FLASH AT>FLASH
.text :
{
. = ALIGN(4);
*(.text)
*(.text.*)
*(.rodata)
*(.rodata*)
*(.gnu.linkonce.t.*)
. = ALIGN(4);
} >FLASH AT>FLASH
.fini :
{
KEEP(*(SORT_NONE(.fini)))
. = ALIGN(4);
} >FLASH AT>FLASH
PROVIDE( _etext = . );
PROVIDE( _eitcm = . );
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
} >FLASH AT>FLASH
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
PROVIDE_HIDDEN (__init_array_end = .);
} >FLASH AT>FLASH
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
PROVIDE_HIDDEN (__fini_array_end = .);
} >FLASH AT>FLASH
.ctors :
{
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin.o(.ctors))
KEEP (*crtbegin?.o(.ctors))
/* We don't want to include the .ctor section from
the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
} >FLASH AT>FLASH
.dtors :
{
KEEP (*crtbegin.o(.dtors))
KEEP (*crtbegin?.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} >FLASH AT>FLASH
.dalign :
{
. = ALIGN(4);
PROVIDE(_data_vma = .);
} >RAM AT>FLASH
.dlalign :
{
. = ALIGN(4);
PROVIDE(_data_lma = .);
} >FLASH AT>FLASH
.data :
{
*(.gnu.linkonce.r.*)
*(.data .data.*)
*(.gnu.linkonce.d.*)
. = ALIGN(8);
PROVIDE( __global_pointer$ = . + 0x800 );
*(.sdata .sdata.*)
*(.sdata2.*)
*(.gnu.linkonce.s.*)
. = ALIGN(8);
*(.srodata.cst16)
*(.srodata.cst8)
*(.srodata.cst4)
*(.srodata.cst2)
*(.srodata .srodata.*)
. = ALIGN(4);
PROVIDE( _edata = .);
} >RAM AT>FLASH
.bss :
{
. = ALIGN(4);
PROVIDE( _sbss = .);
*(.sbss*)
*(.gnu.linkonce.sb.*)
*(.bss*)
*(.gnu.linkonce.b.*)
*(COMMON*)
. = ALIGN(4);
PROVIDE( _ebss = .);
} >RAM AT>FLASH
PROVIDE( _end = _ebss);
PROVIDE( end = . );
.stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size :
{
PROVIDE( _heap_end = . );
. = ALIGN(4);
PROVIDE(_susrstack = . );
. = . + __stack_size;
PROVIDE( _eusrstack = .);
__freertos_irq_stack_top = .;
} >RAM
}
\ No newline at end of file
+ENTRY( _start )
+
+__stack_size = 2048;
+
+PROVIDE( _stack_size = __stack_size );
+
+
+MEMORY
+{
+/* CH32V30x_D8C - CH32V305RB-CH32V305FB
+ CH32V30x_D8 - CH32V303CB-CH32V303RB
+*/
+/**/
+ FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 128K
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K
+
+
+/* CH32V30x_D8C - CH32V307VC-CH32V307WC-CH32V307RC-CH32V305CC
+ CH32V30x_D8 - CH32V303VC-CH32V303RC
+ FLASH + RAM supports the following configuration
+ For specific choices, please refer :CH32FV2x_V3xRM.PDF\Table 32-3
+ FLASH-192K + RAM-128K
+ FLASH-224K + RAM-96K
+ FLASH-256K + RAM-64K
+ FLASH-288K + RAM-32K
+ FLASH-128K + RAM-192K
+
+ FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 288K
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K*/
+}
+
+
+SECTIONS
+{
+
+ .init :
+ {
+ _sinit = .;
+ . = ALIGN(4);
+ KEEP(*(SORT_NONE(.init)))
+ . = ALIGN(4);
+ _einit = .;
+ } >FLASH AT>FLASH
+
+ .vector :
+ {
+ *(.vector);
+ . = ALIGN(64);
+ } >FLASH AT>FLASH
+
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text)
+ *(.text.*)
+ *(.rodata)
+ *(.rodata*)
+ *(.gnu.linkonce.t.*)
+ . = ALIGN(4);
+ } >FLASH AT>FLASH
+
+ .fini :
+ {
+ KEEP(*(SORT_NONE(.fini)))
+ . = ALIGN(4);
+ } >FLASH AT>FLASH
+
+ PROVIDE( _etext = . );
+ PROVIDE( _eitcm = . );
+
+ .preinit_array :
+ {
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ } >FLASH AT>FLASH
+
+ .init_array :
+ {
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
+ KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ } >FLASH AT>FLASH
+
+ .fini_array :
+ {
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
+ KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ } >FLASH AT>FLASH
+
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin.o(.ctors))
+ KEEP (*crtbegin?.o(.ctors))
+ /* We don't want to include the .ctor section from
+ the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } >FLASH AT>FLASH
+
+ .dtors :
+ {
+ KEEP (*crtbegin.o(.dtors))
+ KEEP (*crtbegin?.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } >FLASH AT>FLASH
+
+ .dalign :
+ {
+ . = ALIGN(4);
+ PROVIDE(_data_vma = .);
+ } >RAM AT>FLASH
+
+ .dlalign :
+ {
+ . = ALIGN(4);
+ PROVIDE(_data_lma = .);
+ } >FLASH AT>FLASH
+
+ .data :
+ {
+ *(.gnu.linkonce.r.*)
+ *(.data .data.*)
+ *(.gnu.linkonce.d.*)
+ . = ALIGN(8);
+ PROVIDE( __global_pointer$ = . + 0x800 );
+ *(.sdata .sdata.*)
+ *(.sdata2.*)
+ *(.gnu.linkonce.s.*)
+ . = ALIGN(8);
+ *(.srodata.cst16)
+ *(.srodata.cst8)
+ *(.srodata.cst4)
+ *(.srodata.cst2)
+ *(.srodata .srodata.*)
+ . = ALIGN(4);
+ PROVIDE( _edata = .);
+ } >RAM AT>FLASH
+
+ .bss :
+ {
+ . = ALIGN(4);
+ PROVIDE( _sbss = .);
+ *(.sbss*)
+ *(.gnu.linkonce.sb.*)
+ *(.bss*)
+ *(.gnu.linkonce.b.*)
+ *(COMMON*)
+ . = ALIGN(4);
+ PROVIDE( _ebss = .);
+ } >RAM AT>FLASH
+
+ PROVIDE( _end = _ebss);
+ PROVIDE( end = . );
+
+ .stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size :
+ {
+ PROVIDE( _heap_end = . );
+ . = ALIGN(4);
+ PROVIDE(_susrstack = . );
+ . = . + __stack_size;
+ PROVIDE( _eusrstack = .);
+ __freertos_irq_stack_top = .;
+ } >RAM
+
+}
+
+
+
diff --git a/CH32V303-FreeRTOS/Startup/startup_ch32v30x_D8.S b/CH32V303-FreeRTOS/Startup/startup_ch32v30x_D8.S
index 2ea4898..a23e320 100644
--- a/CH32V303-FreeRTOS/Startup/startup_ch32v30x_D8.S
+++ b/CH32V303-FreeRTOS/Startup/startup_ch32v30x_D8.S
@@ -337,6 +337,7 @@ handle_reset:
csrw 0xbc0, t0
/* Enable interrupt nesting and hardware stack */
li t0, 0x1f
+ // li t0, 0x1e
csrw 0x804, t0
/* Enable floating point and global interrupt, configure privileged mode */
li t0, 0x7800
diff --git a/CH32V303-FreeRTOS/User/main.c b/CH32V303-FreeRTOS/User/main.c
index fc153f2..1ae12c7 100644
--- a/CH32V303-FreeRTOS/User/main.c
+++ b/CH32V303-FreeRTOS/User/main.c
@@ -19,6 +19,8 @@
#include "FreeRTOS.h"
#include "task.h"
+#include "freerotsTask.h"
+
/*********************************************************************
@@ -38,7 +40,8 @@ int main(void)
printf("SystemClk:%d\r\n", SystemCoreClock);
printf( "ChipID:%08x\r\n", DBGMCU_GetCHIPID() );
printf("FreeRTOS Kernel Version:%s\r\n", tskKERNEL_VERSION_NUMBER);
-
+
+ startApp();
while(1) {
printf("shouldn't run at here!!\n");
diff --git a/CH32V303-FreeRTOS/obj/App/tools/RingQueue/subdir.mk b/CH32V303-FreeRTOS/obj/App/tools/RingQueue/subdir.mk
index bffa3f7..6252892 100644
--- a/CH32V303-FreeRTOS/obj/App/tools/RingQueue/subdir.mk
+++ b/CH32V303-FreeRTOS/obj/App/tools/RingQueue/subdir.mk
@@ -17,4 +17,4 @@ OBJS += \
# Each subdirectory must supply rules for building sources it contributes
App/tools/RingQueue/%.o: ../App/tools/RingQueue/%.c
- @ riscv-none-embed-gcc -march=rv32imacxw -mabi=ilp32 -msmall-data-limit=8 -msave-restore -fmax-errors=20 -Os -fmessage-length=0 -fsigned-char -ffunction-sections -fdata-sections -fno-common -Wunused -Wuninitialized -g -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/Debug" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/Core" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/User" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/Peripheral/inc" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS/include" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS/portable/Common" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS/portable/GCC/RISC-V" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS/portable/GCC/RISC-V/chip_specific_extensions/RV32I_PFIC_no_extensions" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS/portable/MemMang" -std=gnu99 -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@)" -c -o "$@" "$<"
+ @ riscv-none-embed-gcc -march=rv32imacxw -mabi=ilp32 -msmall-data-limit=8 -msave-restore -fmax-errors=20 -Os -fmessage-length=0 -fsigned-char -ffunction-sections -fdata-sections -fno-common -Wunused -Wuninitialized -g -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/Debug" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/Core" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/User" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/Peripheral/inc" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS/include" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS/portable/Common" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS/portable/GCC/RISC-V" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS/portable/GCC/RISC-V/chip_specific_extensions/RV32I_PFIC_no_extensions" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS/portable/MemMang" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/App/hardwareDriver/Inc" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/App/tools" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/App/tools/RingQueue" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/App/functionalModule/Inc" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/App/application/Inc" -std=gnu99 -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@)" -c -o "$@" "$<"
diff --git a/CH32V303-FreeRTOS/obj/CH32V303-FreeRTOS.elf b/CH32V303-FreeRTOS/obj/CH32V303-FreeRTOS.elf
index 8e564ef..e2c204e 100644
Binary files a/CH32V303-FreeRTOS/obj/CH32V303-FreeRTOS.elf and b/CH32V303-FreeRTOS/obj/CH32V303-FreeRTOS.elf differ
diff --git a/CH32V303-FreeRTOS/obj/CH32V303-FreeRTOS.hex b/CH32V303-FreeRTOS/obj/CH32V303-FreeRTOS.hex
index 0e01f90..8c07058 100644
--- a/CH32V303-FreeRTOS/obj/CH32V303-FreeRTOS.hex
+++ b/CH32V303-FreeRTOS/obj/CH32V303-FreeRTOS.hex
@@ -1,39 +1,39 @@
-:040000006F009008F5
+:040000006F00F00895
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-:100194008608000086080000860800008608000023
+:10001400000000008C080000000000000000000048
+:100024008C0800008C0800000000000000000000A4
+:100034007015000000000000000200000000000035
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+:100174008C0800008C0800008C0800008C0800002B
+:100184008C0800008C0800008C0800008C0800001B
+:100194008C0800008C0800008C0800008C0800000B
:1001A400000000000000000000000000000000004B
:0C01B4000000000000000000000000003F
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+:1002400096DA9702002083A222F723A02200F3254A
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@@ -43,8 +43,8 @@
:1002D00013000000130000001300000013000000D2
:1002E00013000000130000001300000013000000C2
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diff --git a/CH32V303-FreeRTOS/obj/CH32V303-FreeRTOS.lst b/CH32V303-FreeRTOS/obj/CH32V303-FreeRTOS.lst
index bc75cb7..09953a5 100644
--- a/CH32V303-FreeRTOS/obj/CH32V303-FreeRTOS.lst
+++ b/CH32V303-FreeRTOS/obj/CH32V303-FreeRTOS.lst
@@ -7,10 +7,10 @@ start address 0x00000000
Program Header:
LOAD off 0x00001000 vaddr 0x00000000 paddr 0x00000000 align 2**12
- filesz 0x000022b0 memsz 0x000022b0 flags r-x
- LOAD off 0x00004000 vaddr 0x20000000 paddr 0x000022b0 align 2**12
- filesz 0x00000098 memsz 0x00000200 flags rw-
- LOAD off 0x00004800 vaddr 0x20007800 paddr 0x20007800 align 2**12
+ filesz 0x00005620 memsz 0x00005620 flags r-x
+ LOAD off 0x00007000 vaddr 0x20000000 paddr 0x00005620 align 2**12
+ filesz 0x00000190 memsz 0x0000385c flags rw-
+ LOAD off 0x00007800 vaddr 0x20007800 paddr 0x20007800 align 2**12
filesz 0x00000000 memsz 0x00000800 flags rw-
Sections:
@@ -19,51 +19,51 @@ Idx Name Size VMA LMA File off Algn
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .vector 000001bc 00000004 00000004 00001004 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE
- 2 .text 000020b0 00000200 00000200 00001200 2**8
+ 2 .text 00005420 00000200 00000200 00001200 2**8
CONTENTS, ALLOC, LOAD, READONLY, CODE
- 3 .fini 00000000 000022b0 000022b0 00004098 2**0
+ 3 .fini 00000000 00005620 00005620 00007190 2**0
CONTENTS, ALLOC, LOAD, CODE
- 4 .dalign 00000000 20000000 20000000 00004098 2**0
+ 4 .dalign 00000000 20000000 20000000 00007190 2**0
CONTENTS
- 5 .dlalign 00000000 000022b0 000022b0 00004098 2**0
+ 5 .dlalign 00000000 00005620 00005620 00007190 2**0
CONTENTS
- 6 .data 00000098 20000000 000022b0 00004000 2**2
+ 6 .data 00000190 20000000 00005620 00007000 2**2
CONTENTS, ALLOC, LOAD, DATA
- 7 .bss 00000168 20000098 00002348 00004098 2**2
+ 7 .bss 000036cc 20000190 000057b0 00007190 2**2
ALLOC
- 8 .stack 00000800 20007800 20007800 00004800 2**0
+ 8 .stack 00000800 20007800 20007800 00007800 2**0
ALLOC
- 9 .debug_info 0000d541 00000000 00000000 00004098 2**0
+ 9 .debug_info 0001edb5 00000000 00000000 00007190 2**0
CONTENTS, READONLY, DEBUGGING
- 10 .debug_abbrev 00002276 00000000 00000000 000115d9 2**0
+ 10 .debug_abbrev 00004dea 00000000 00000000 00025f45 2**0
CONTENTS, READONLY, DEBUGGING
- 11 .debug_aranges 000006d0 00000000 00000000 00013850 2**3
+ 11 .debug_aranges 00000dc0 00000000 00000000 0002ad30 2**3
CONTENTS, READONLY, DEBUGGING
- 12 .debug_ranges 000008e8 00000000 00000000 00013f20 2**3
+ 12 .debug_ranges 00001238 00000000 00000000 0002baf0 2**3
CONTENTS, READONLY, DEBUGGING
- 13 .debug_line 0000bab9 00000000 00000000 00014808 2**0
+ 13 .debug_line 0001889b 00000000 00000000 0002cd28 2**0
CONTENTS, READONLY, DEBUGGING
- 14 .debug_str 00002c59 00000000 00000000 000202c1 2**0
+ 14 .debug_str 00004b19 00000000 00000000 000455c3 2**0
CONTENTS, READONLY, DEBUGGING
- 15 .comment 00000033 00000000 00000000 00022f1a 2**0
+ 15 .comment 00000033 00000000 00000000 0004a0dc 2**0
CONTENTS, READONLY
- 16 .debug_frame 000018c0 00000000 00000000 00022f50 2**2
+ 16 .debug_frame 00002f54 00000000 00000000 0004a110 2**2
CONTENTS, READONLY, DEBUGGING
- 17 .debug_loc 0000414f 00000000 00000000 00024810 2**0
+ 17 .debug_loc 00008692 00000000 00000000 0004d064 2**0
CONTENTS, READONLY, DEBUGGING
- 18 .stab 00000084 00000000 00000000 00028960 2**2
+ 18 .stab 00000084 00000000 00000000 000556f8 2**2
CONTENTS, READONLY, DEBUGGING
- 19 .stabstr 00000117 00000000 00000000 000289e4 2**0
+ 19 .stabstr 00000117 00000000 00000000 0005577c 2**0
CONTENTS, READONLY, DEBUGGING
SYMBOL TABLE:
00000000 l d .init 00000000 .init
00000004 l d .vector 00000000 .vector
00000200 l d .text 00000000 .text
-000022b0 l d .fini 00000000 .fini
+00005620 l d .fini 00000000 .fini
20000000 l d .dalign 00000000 .dalign
-000022b0 l d .dlalign 00000000 .dlalign
+00005620 l d .dlalign 00000000 .dlalign
20000000 l d .data 00000000 .data
-20000098 l d .bss 00000000 .bss
+20000190 l d .bss 00000000 .bss
20007800 l d .stack 00000000 .stack
00000000 l d .debug_info 00000000 .debug_info
00000000 l d .debug_abbrev 00000000 .debug_abbrev
@@ -84,43 +84,106 @@ SYMBOL TABLE:
00000000 l df *ABS* 00000000 ch32v30x_it.c
00000000 l df *ABS* 00000000 main.c
00000000 l df *ABS* 00000000 system_ch32v30x.c
+00000000 l df *ABS* 00000000 ch32v30x_adc.c
00000000 l df *ABS* 00000000 ch32v30x_dbgmcu.c
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@@ -137,226 +200,339 @@ SYMBOL TABLE:
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+2000017c g O .data 00000004 uxTopUsedPriority
+0000088c w .text 00000000 USB_HP_CAN1_TX_IRQHandler
+00005484 g O .text 00000100 .hidden __clz_tab
+00001d5a g F .text 00000090 vTaskStartScheduler
00000000 g .init 00000000 _sinit
-00002024 g F .text 0000002e _write_r
+000050ec g F .text 00000036 _write_r
00000300 g .text 00000000 xPortStartFirstTask
-00000886 w .text 00000000 DMA1_Channel3_IRQHandler
-00000886 w .text 00000000 ETH_IRQHandler
-00001ba4 g F .text 0000010c _printf_common
-2000008c g O .data 00000004 _impure_ptr
-00000886 w .text 00000000 TIM1_UP_IRQHandler
-00001286 g F .text 00000130 __sflush_r
-00000886 w .text 00000000 WWDG_IRQHandler
-00000886 w .text 00000000 USBHSWakeup_IRQHandler
-00000886 w .text 00000000 DMA2_Channel11_IRQHandler
-00000886 w .text 00000000 Ecall_U_Mode_Handler
-00000886 w .text 00000000 DMA2_Channel6_IRQHandler
-00000886 w .text 00000000 TIM2_IRQHandler
+0000088c w .text 00000000 DMA1_Channel3_IRQHandler
+0000088c w .text 00000000 ETH_IRQHandler
+00004c62 g F .text 0000010c _printf_common
+20000184 g O .data 00000004 _impure_ptr
+0000088c w .text 00000000 TIM1_UP_IRQHandler
+00004330 g F .text 00000130 __sflush_r
+0000088c w .text 00000000 WWDG_IRQHandler
+00002a12 g F .text 00000070 ADC_DMA_Init
+0000088c w .text 00000000 USBHSWakeup_IRQHandler
+0000088c w .text 00000000 DMA2_Channel11_IRQHandler
+0000088c w .text 00000000 Ecall_U_Mode_Handler
+00002498 g F .text 0000000c vTaskMissedYield
+0000088c w .text 00000000 DMA2_Channel6_IRQHandler
+20000238 g O .bss 00000004 g_J1_uart6_handle
+0000088c w .text 00000000 TIM2_IRQHandler
20008000 g .stack 00000000 _eusrstack
+20000240 g O .bss 00000004 g_J3_usart2_handle
+00002920 g F .text 000000f2 HD_ADC_InIt
00000516 g F .text 0000000c .hidden __riscv_save_2
00000200 g .text 00000000 SW_Handler
-00000c8c g F .text 000001a8 xTaskIncrementTick
-00000886 w .text 00000000 TIM1_BRK_IRQHandler
-0000163c g F .text 00000058 __swhatbuf_r
-00000c20 g F .text 00000008 USART_SendData
-00000886 w .text 00000000 DMA2_Channel10_IRQHandler
-00000886 w .text 00000000 EXTI1_IRQHandler
+00001984 g F .text 0000006c vQueueAddToRegistry
+00001e04 g F .text 000001aa xTaskIncrementTick
+00000920 g F .text 0000003e ADC_DeInit
+0000088c w .text 00000000 TIM1_BRK_IRQHandler
+000046f2 g F .text 00000058 __swhatbuf_r
+0000095e g F .text 00000056 ADC_Init
+000011d2 g F .text 00000008 USART_SendData
+0000088c w .text 00000000 DMA2_Channel10_IRQHandler
+0000088c w .text 00000000 EXTI1_IRQHandler
000004fc g F .text 0000001a .hidden __riscv_save_5
-00000f50 g F .text 0000003a _write
-20000098 g .data 00000000 _edata
-20000200 g .bss 00000000 _end
-00000886 w .text 00000000 RTCAlarm_IRQHandler
-000022b0 g .dlalign 00000000 _data_lma
-00000886 w .text 00000000 TIM10_UP_IRQHandler
-00000886 w .text 00000000 TIM9_TRG_COM_IRQHandler
-00000886 w .text 00000000 UART7_IRQHandler
-00000886 w .text 00000000 USART2_IRQHandler
-00000886 w .text 00000000 UART6_IRQHandler
-00001fa6 g F .text 00000048 __swrite
-00001920 g F .text 00000284 _vfiprintf_r
-000015d2 g F .text 0000006a _fwalk_reent
-00000758 g F .text 0000012e SystemCoreClockUpdate
-00000886 w .text 00000000 I2C2_ER_IRQHandler
-00000886 w .text 00000000 DMA1_Channel2_IRQHandler
-00002254 g O .text 00000020 __sf_fake_stdout
+00001718 g F .text 000000bc xQueueGenericReset
+0000287c g F .text 0000003e _write
+20000190 g .data 00000000 _edata
+2000385c g .bss 00000000 _end
+20000230 g O .bss 00000001 J5_0_Rbuffer
+00002a82 g F .text 00000056 startAdcCapture
+00002dd2 g F .text 000000ba J3_485_Init
+0000088c w .text 00000000 RTCAlarm_IRQHandler
+00001b56 g F .text 00000204 xTaskCreate
+000037ea g F .text 000000a2 J1_Interrupt
+00005620 g .dlalign 00000000 _data_lma
+0000088c w .text 00000000 TIM10_UP_IRQHandler
+0000088c w .text 00000000 TIM9_TRG_COM_IRQHandler
+00003230 g F .text 0000004a UART7_IRQHandler
+00003108 g F .text 0000004a USART2_IRQHandler
+000031e6 g F .text 0000004a UART6_IRQHandler
+0000506e g F .text 00000048 __swrite
+00003afc g F .text 00000042 task1_task
+000049da g F .text 00000288 _vfiprintf_r
+00004688 g F .text 0000006a _fwalk_reent
+0000075e g F .text 0000012e SystemCoreClockUpdate
+00002c46 g F .text 0000000c HD_GPIO_Write
+00002ad8 g F .text 0000016e HD_GPIO_Init
+0000088c w .text 00000000 I2C2_ER_IRQHandler
+00002114 g F .text 00000062 vTaskDelay
+0000088c w .text 00000000 DMA1_Channel2_IRQHandler
+000055c4 g O .text 00000020 __sf_fake_stdout
00000522 g F .text 00000024 .hidden __riscv_restore_12
-00000886 w .text 00000000 TIM8_BRK_IRQHandler
-00002170 g F .text 0000000c _read
-00000888 w .text 00000000 handle_reset
-00000886 w .text 00000000 CAN1_SCE_IRQHandler
+0000088c w .text 00000000 TIM8_BRK_IRQHandler
+000024a4 g F .text 0000001c xTaskGetSchedulerState
+00005278 g F .text 00000010 _read
+0000088e w .text 00000000 handle_reset
+0000088c w .text 00000000 CAN1_SCE_IRQHandler
+0000392e g F .text 0000009a J4_Interrupt
+20000228 g O .bss 00000001 J3_Rbuffer
00000516 g F .text 0000000c .hidden __riscv_save_0
-00000886 w .text 00000000 FLASH_IRQHandler
-00000886 w .text 00000000 USART1_IRQHandler
-00001694 g F .text 00000090 __smakebuf_r
+0000088c w .text 00000000 FLASH_IRQHandler
+0000088c w .text 00000000 USART1_IRQHandler
+0000474a g F .text 00000092 __smakebuf_r
00000400 g .text 00000000 pxPortInitialiseStack
-00001cb0 g F .text 000002a0 _printf_i
-00000886 w .text 00000000 SPI3_IRQHandler
-200000cc g O .bss 00000004 __malloc_sbrk_start
-00000886 w .text 00000000 I2C1_ER_IRQHandler
-000009e0 g F .text 0000000a NVIC_PriorityGroupConfig
-200000c8 g O .bss 00000004 __malloc_free_list
+00004d6e g F .text 000002a2 _printf_i
+0000088c w .text 00000000 SPI3_IRQHandler
+2000025c g O .bss 00000004 __malloc_sbrk_start
+000010da g F .text 0000001e RCC_APB2PeriphResetCmd
+00003608 g F .text 000000a2 J3_Interrupt
+0000088c w .text 00000000 I2C1_ER_IRQHandler
+00000e9c g F .text 0000000a NVIC_PriorityGroupConfig
+000015a8 g F .text 00000016 vPortEnterCritical
+00000c1a g F .text 0000016c DMA_DeInit
+20000258 g O .bss 00000004 __malloc_free_list
0000053a g F .text 0000000c .hidden __riscv_restore_1
-00001920 g F .text 00000284 _vfprintf_r
-00000886 w .text 00000000 USBWakeUp_IRQHandler
-00002140 g F .text 0000000c _close
-00000886 w .text 00000000 DMA2_Channel3_IRQHandler
+000036aa g F .text 000000a4 J5_0_Interrupt
+000049da g F .text 00000288 _vfprintf_r
+00003308 g F .text 00000032 proportionalInt
+00002e8c g F .text 000000b6 J4_485_Init
+2000020c g O .bss 00000006 adcData
+0000088c w .text 00000000 USBWakeUp_IRQHandler
+0000333a g F .text 00000022 getSOCPwrOnVoltage
+00005238 g F .text 00000010 _close
+0000088c w .text 00000000 DMA2_Channel3_IRQHandler
+2000022c g O .bss 00000001 J4_Rbuffer
Disassembly of section .init:
00000000 <_sinit>:
- 0: 0890006f j 888
+ 0: 08f0006f j 88e
Disassembly of section .vector:
@@ -368,15 +544,15 @@ Disassembly of section .vector:
12: 0000 unimp
14: 0000 unimp
16: 0000 unimp
- 18: 0886 slli a7,a7,0x1
+ 18: 088c addi a1,sp,80
...
22: 0000 unimp
- 24: 0886 slli a7,a7,0x1
+ 24: 088c addi a1,sp,80
26: 0000 unimp
- 28: 0886 slli a7,a7,0x1
+ 28: 088c addi a1,sp,80
...
32: 0000 unimp
- 34: 0c32 slli s8,s8,0xc
+ 34: 1570 addi a2,sp,684
36: 0000 unimp
38: 0000 unimp
3a: 0000 unimp
@@ -384,181 +560,181 @@ Disassembly of section .vector:
3e: 0000 unimp
40: 0000 unimp
42: 0000 unimp
- 44: 0886 slli a7,a7,0x1
+ 44: 088c addi a1,sp,80
46: 0000 unimp
- 48: 0886 slli a7,a7,0x1
+ 48: 088c addi a1,sp,80
4a: 0000 unimp
- 4c: 0886 slli a7,a7,0x1
+ 4c: 088c addi a1,sp,80
4e: 0000 unimp
- 50: 0886 slli a7,a7,0x1
+ 50: 088c addi a1,sp,80
52: 0000 unimp
- 54: 0886 slli a7,a7,0x1
+ 54: 088c addi a1,sp,80
56: 0000 unimp
- 58: 0886 slli a7,a7,0x1
+ 58: 088c addi a1,sp,80
5a: 0000 unimp
- 5c: 0886 slli a7,a7,0x1
+ 5c: 088c addi a1,sp,80
5e: 0000 unimp
- 60: 0886 slli a7,a7,0x1
+ 60: 088c addi a1,sp,80
62: 0000 unimp
- 64: 0886 slli a7,a7,0x1
+ 64: 088c addi a1,sp,80
66: 0000 unimp
- 68: 0886 slli a7,a7,0x1
+ 68: 088c addi a1,sp,80
6a: 0000 unimp
- 6c: 0886 slli a7,a7,0x1
+ 6c: 088c addi a1,sp,80
6e: 0000 unimp
- 70: 0886 slli a7,a7,0x1
+ 70: 088c addi a1,sp,80
72: 0000 unimp
- 74: 0886 slli a7,a7,0x1
+ 74: 088c addi a1,sp,80
76: 0000 unimp
- 78: 0886 slli a7,a7,0x1
+ 78: 088c addi a1,sp,80
7a: 0000 unimp
- 7c: 0886 slli a7,a7,0x1
+ 7c: 088c addi a1,sp,80
7e: 0000 unimp
- 80: 0886 slli a7,a7,0x1
+ 80: 088c addi a1,sp,80
82: 0000 unimp
- 84: 0886 slli a7,a7,0x1
+ 84: 088c addi a1,sp,80
86: 0000 unimp
- 88: 0886 slli a7,a7,0x1
+ 88: 088c addi a1,sp,80
8a: 0000 unimp
- 8c: 0886 slli a7,a7,0x1
+ 8c: 088c addi a1,sp,80
8e: 0000 unimp
- 90: 0886 slli a7,a7,0x1
+ 90: 088c addi a1,sp,80
92: 0000 unimp
- 94: 0886 slli a7,a7,0x1
+ 94: 088c addi a1,sp,80
96: 0000 unimp
- 98: 0886 slli a7,a7,0x1
+ 98: 088c addi a1,sp,80
9a: 0000 unimp
- 9c: 0886 slli a7,a7,0x1
+ 9c: 088c addi a1,sp,80
9e: 0000 unimp
- a0: 0886 slli a7,a7,0x1
+ a0: 088c addi a1,sp,80
a2: 0000 unimp
- a4: 0886 slli a7,a7,0x1
+ a4: 088c addi a1,sp,80
a6: 0000 unimp
- a8: 0886 slli a7,a7,0x1
+ a8: 088c addi a1,sp,80
aa: 0000 unimp
- ac: 0886 slli a7,a7,0x1
+ ac: 088c addi a1,sp,80
ae: 0000 unimp
- b0: 0886 slli a7,a7,0x1
+ b0: 088c addi a1,sp,80
b2: 0000 unimp
- b4: 0886 slli a7,a7,0x1
+ b4: 088c addi a1,sp,80
b6: 0000 unimp
- b8: 0886 slli a7,a7,0x1
+ b8: 088c addi a1,sp,80
ba: 0000 unimp
- bc: 0886 slli a7,a7,0x1
+ bc: 088c addi a1,sp,80
be: 0000 unimp
- c0: 0886 slli a7,a7,0x1
+ c0: 088c addi a1,sp,80
c2: 0000 unimp
- c4: 0886 slli a7,a7,0x1
+ c4: 088c addi a1,sp,80
c6: 0000 unimp
- c8: 0886 slli a7,a7,0x1
+ c8: 088c addi a1,sp,80
ca: 0000 unimp
- cc: 0886 slli a7,a7,0x1
+ cc: 088c addi a1,sp,80
ce: 0000 unimp
- d0: 0886 slli a7,a7,0x1
+ d0: 088c addi a1,sp,80
d2: 0000 unimp
- d4: 0886 slli a7,a7,0x1
+ d4: 088c addi a1,sp,80
d6: 0000 unimp
- d8: 0886 slli a7,a7,0x1
+ d8: 088c addi a1,sp,80
da: 0000 unimp
- dc: 0886 slli a7,a7,0x1
+ dc: 3108 lbu a0,1(a0)
de: 0000 unimp
- e0: 0886 slli a7,a7,0x1
+ e0: 3152 lhu a2,36(a0)
e2: 0000 unimp
- e4: 0886 slli a7,a7,0x1
+ e4: 088c addi a1,sp,80
e6: 0000 unimp
- e8: 0886 slli a7,a7,0x1
+ e8: 088c addi a1,sp,80
ea: 0000 unimp
- ec: 0886 slli a7,a7,0x1
+ ec: 088c addi a1,sp,80
ee: 0000 unimp
- f0: 0886 slli a7,a7,0x1
+ f0: 088c addi a1,sp,80
f2: 0000 unimp
- f4: 0886 slli a7,a7,0x1
+ f4: 088c addi a1,sp,80
f6: 0000 unimp
- f8: 0886 slli a7,a7,0x1
+ f8: 088c addi a1,sp,80
fa: 0000 unimp
- fc: 0886 slli a7,a7,0x1
+ fc: 088c addi a1,sp,80
fe: 0000 unimp
- 100: 0886 slli a7,a7,0x1
+ 100: 088c addi a1,sp,80
102: 0000 unimp
104: 0000 unimp
106: 0000 unimp
- 108: 0886 slli a7,a7,0x1
+ 108: 088c addi a1,sp,80
10a: 0000 unimp
- 10c: 0886 slli a7,a7,0x1
+ 10c: 088c addi a1,sp,80
10e: 0000 unimp
- 110: 0886 slli a7,a7,0x1
+ 110: 088c addi a1,sp,80
112: 0000 unimp
- 114: 0886 slli a7,a7,0x1
+ 114: 088c addi a1,sp,80
116: 0000 unimp
- 118: 0886 slli a7,a7,0x1
+ 118: 319c lbu a5,1(a1)
11a: 0000 unimp
- 11c: 0886 slli a7,a7,0x1
+ 11c: 088c addi a1,sp,80
11e: 0000 unimp
- 120: 0886 slli a7,a7,0x1
+ 120: 088c addi a1,sp,80
122: 0000 unimp
- 124: 0886 slli a7,a7,0x1
+ 124: 088c addi a1,sp,80
126: 0000 unimp
- 128: 0886 slli a7,a7,0x1
+ 128: 088c addi a1,sp,80
12a: 0000 unimp
- 12c: 0886 slli a7,a7,0x1
+ 12c: 088c addi a1,sp,80
12e: 0000 unimp
- 130: 0886 slli a7,a7,0x1
+ 130: 088c addi a1,sp,80
132: 0000 unimp
- 134: 0886 slli a7,a7,0x1
+ 134: 088c addi a1,sp,80
136: 0000 unimp
- 138: 0886 slli a7,a7,0x1
+ 138: 088c addi a1,sp,80
13a: 0000 unimp
- 13c: 0886 slli a7,a7,0x1
+ 13c: 088c addi a1,sp,80
13e: 0000 unimp
- 140: 0886 slli a7,a7,0x1
+ 140: 088c addi a1,sp,80
142: 0000 unimp
- 144: 0886 slli a7,a7,0x1
+ 144: 088c addi a1,sp,80
146: 0000 unimp
- 148: 0886 slli a7,a7,0x1
+ 148: 088c addi a1,sp,80
14a: 0000 unimp
- 14c: 0886 slli a7,a7,0x1
+ 14c: 088c addi a1,sp,80
14e: 0000 unimp
- 150: 0886 slli a7,a7,0x1
+ 150: 088c addi a1,sp,80
152: 0000 unimp
- 154: 0886 slli a7,a7,0x1
+ 154: 088c addi a1,sp,80
156: 0000 unimp
- 158: 0886 slli a7,a7,0x1
+ 158: 088c addi a1,sp,80
15a: 0000 unimp
- 15c: 0886 slli a7,a7,0x1
+ 15c: 088c addi a1,sp,80
15e: 0000 unimp
- 160: 0886 slli a7,a7,0x1
+ 160: 31e6 lhu s1,38(a1)
162: 0000 unimp
- 164: 0886 slli a7,a7,0x1
+ 164: 3230 lbu a2,3(a2)
166: 0000 unimp
- 168: 0886 slli a7,a7,0x1
+ 168: 327a lhu a4,38(a2)
16a: 0000 unimp
- 16c: 0886 slli a7,a7,0x1
+ 16c: 088c addi a1,sp,80
16e: 0000 unimp
- 170: 0886 slli a7,a7,0x1
+ 170: 088c addi a1,sp,80
172: 0000 unimp
- 174: 0886 slli a7,a7,0x1
+ 174: 088c addi a1,sp,80
176: 0000 unimp
- 178: 0886 slli a7,a7,0x1
+ 178: 088c addi a1,sp,80
17a: 0000 unimp
- 17c: 0886 slli a7,a7,0x1
+ 17c: 088c addi a1,sp,80
17e: 0000 unimp
- 180: 0886 slli a7,a7,0x1
+ 180: 088c addi a1,sp,80
182: 0000 unimp
- 184: 0886 slli a7,a7,0x1
+ 184: 088c addi a1,sp,80
186: 0000 unimp
- 188: 0886 slli a7,a7,0x1
+ 188: 088c addi a1,sp,80
18a: 0000 unimp
- 18c: 0886 slli a7,a7,0x1
+ 18c: 088c addi a1,sp,80
18e: 0000 unimp
- 190: 0886 slli a7,a7,0x1
+ 190: 088c addi a1,sp,80
192: 0000 unimp
- 194: 0886 slli a7,a7,0x1
+ 194: 088c addi a1,sp,80
196: 0000 unimp
- 198: 0886 slli a7,a7,0x1
+ 198: 088c addi a1,sp,80
19a: 0000 unimp
- 19c: 0886 slli a7,a7,0x1
+ 19c: 088c addi a1,sp,80
19e: 0000 unimp
- 1a0: 0886 slli a7,a7,0x1
+ 1a0: 088c addi a1,sp,80
...
Disassembly of section .text:
@@ -596,18 +772,18 @@ Disassembly of section .text:
23c: 300022f3 csrr t0,mstatus
240: da96 sw t0,116(sp)
242: 20000297 auipc t0,0x20000
- 246: e5a2a283 lw t0,-422(t0) # 2000009c
+ 246: f722a283 lw t0,-142(t0) # 200001b4
24a: 0022a023 sw sp,0(t0)
24e: 341025f3 csrr a1,mepc
252: c02e sw a1,0(sp)
254: 02000593 li a1,32
258: 8045a073 csrs 0x804,a1
- 25c: 8101a103 lw sp,-2032(gp) # 20000090
- 260: 3d5000ef jal ra,e34
+ 25c: 8181a103 lw sp,-2024(gp) # 20000188
+ 260: 717010ef jal ra,2176
00000264 :
264: 20000317 auipc t1,0x20000
- 268: e3832303 lw t1,-456(t1) # 2000009c
+ 268: f5032303 lw t1,-176(t1) # 200001b4
26c: 00032103 lw sp,0(t1)
270: 4282 lw t0,0(sp)
272: 34129073 csrw mepc,t0
@@ -662,11 +838,11 @@ Disassembly of section .text:
2fc: 00000013 nop
00000300 :
- 300: 8101a283 lw t0,-2032(gp) # 20000090
+ 300: 8181a283 lw t0,-2024(gp) # 20000188
304: e0028293 addi t0,t0,-512
308: 34029073 csrw mscratch,t0
30c: 20000117 auipc sp,0x20000
- 310: d9012103 lw sp,-624(sp) # 2000009c
+ 310: ea812103 lw sp,-344(sp) # 200001b4
314: 4102 lw sp,0(sp)
316: 4082 lw ra,0(sp)
318: 4332 lw t1,12(sp)
@@ -901,2859 +1077,7506 @@ Disassembly of section .text:
00000600 :
600: f17ff2ef jal t0,516 <__riscv_save_0>
604: 4509 li a0,2
- 606: 2ee9 jal 9e0
- 608: 2a81 jal 758
- 60a: 0c3000ef jal ra,ecc
- 60e: 6571 lui a0,0x1c
- 610: 20050513 addi a0,a0,512 # 1c200 <_data_lma+0x19f50>
- 614: 0eb000ef jal ra,efe
- 618: 200007b7 lui a5,0x20000
- 61c: 0807a583 lw a1,128(a5) # 20000080
- 620: 00002537 lui a0,0x2
- 624: 17c50513 addi a0,a0,380 # 217c <_read+0xc>
- 628: 189000ef jal ra,fb0
- 62c: 24ed jal 916
- 62e: 85aa mv a1,a0
- 630: 00002537 lui a0,0x2
- 634: 18c50513 addi a0,a0,396 # 218c <_read+0x1c>
- 638: 179000ef jal ra,fb0
- 63c: 000025b7 lui a1,0x2
- 640: 00002537 lui a0,0x2
- 644: 19c58593 addi a1,a1,412 # 219c <_read+0x2c>
- 648: 1a450513 addi a0,a0,420 # 21a4 <_read+0x34>
- 64c: 165000ef jal ra,fb0
- 650: 00002437 lui s0,0x2
- 654: 1c440513 addi a0,s0,452 # 21c4 <_read+0x54>
- 658: 26d000ef jal ra,10c4
- 65c: bfe5 j 654
+ 606: 097000ef jal ra,e9c
+ 60a: 2a91 jal 75e
+ 60c: 1e4020ef jal ra,27f0
+ 610: 6571 lui a0,0x1c
+ 612: 20050513 addi a0,a0,512 # 1c200 <_data_lma+0x16be0>
+ 616: 20c020ef jal ra,2822
+ 61a: 200007b7 lui a5,0x20000
+ 61e: 1707a583 lw a1,368(a5) # 20000170
+ 622: 00005537 lui a0,0x5
+ 626: 28850513 addi a0,a0,648 # 5288 <_read+0x10>
+ 62a: 22f030ef jal ra,4058
+ 62e: 23cd jal c10
+ 630: 85aa mv a1,a0
+ 632: 00005537 lui a0,0x5
+ 636: 29850513 addi a0,a0,664 # 5298 <_read+0x20>
+ 63a: 21f030ef jal ra,4058
+ 63e: 000055b7 lui a1,0x5
+ 642: 00005537 lui a0,0x5
+ 646: 2a858593 addi a1,a1,680 # 52a8 <_read+0x30>
+ 64a: 2b050513 addi a0,a0,688 # 52b0 <_read+0x38>
+ 64e: 20b030ef jal ra,4058
+ 652: 4ec030ef jal ra,3b3e
+ 656: 00005437 lui s0,0x5
+ 65a: 2d040513 addi a0,s0,720 # 52d0 <_read+0x58>
+ 65e: 30f030ef jal ra,416c
+ 662: bfe5 j 65a
-0000065e :
- 65e: 400217b7 lui a5,0x40021
- 662: 4398 lw a4,0(a5)
- 664: f0ff06b7 lui a3,0xf0ff0
- 668: 1141 addi sp,sp,-16
- 66a: 00176713 ori a4,a4,1
- 66e: c398 sw a4,0(a5)
- 670: 43d8 lw a4,4(a5)
- 672: 00020637 lui a2,0x20
- 676: 8f75 and a4,a4,a3
- 678: c3d8 sw a4,4(a5)
- 67a: 4398 lw a4,0(a5)
- 67c: fef706b7 lui a3,0xfef70
- 680: 16fd addi a3,a3,-1
- 682: 8f75 and a4,a4,a3
- 684: c398 sw a4,0(a5)
- 686: 4398 lw a4,0(a5)
- 688: fffc06b7 lui a3,0xfffc0
- 68c: 16fd addi a3,a3,-1
- 68e: 8f75 and a4,a4,a3
- 690: c398 sw a4,0(a5)
- 692: 43d8 lw a4,4(a5)
- 694: ff0106b7 lui a3,0xff010
- 698: 16fd addi a3,a3,-1
- 69a: 8f75 and a4,a4,a3
- 69c: c3d8 sw a4,4(a5)
- 69e: 4398 lw a4,0(a5)
- 6a0: ec0006b7 lui a3,0xec000
- 6a4: 16fd addi a3,a3,-1
- 6a6: 8f75 and a4,a4,a3
- 6a8: c398 sw a4,0(a5)
- 6aa: 00ff0737 lui a4,0xff0
- 6ae: c798 sw a4,8(a5)
- 6b0: 0207a623 sw zero,44(a5) # 4002102c <__freertos_irq_stack_top+0x2001902c>
- 6b4: c402 sw zero,8(sp)
- 6b6: c602 sw zero,12(sp)
- 6b8: 4398 lw a4,0(a5)
- 6ba: 66c1 lui a3,0x10
- 6bc: 8f55 or a4,a4,a3
- 6be: c398 sw a4,0(a5)
- 6c0: 400216b7 lui a3,0x40021
- 6c4: 6705 lui a4,0x1
- 6c6: 429c lw a5,0(a3)
- 6c8: 8ff1 and a5,a5,a2
- 6ca: c63e sw a5,12(sp)
- 6cc: 47a2 lw a5,8(sp)
- 6ce: 0785 addi a5,a5,1
- 6d0: c43e sw a5,8(sp)
- 6d2: 47b2 lw a5,12(sp)
- 6d4: e781 bnez a5,6dc
- 6d6: 47a2 lw a5,8(sp)
- 6d8: fee797e3 bne a5,a4,6c6
- 6dc: 400217b7 lui a5,0x40021
- 6e0: 439c lw a5,0(a5)
- 6e2: 00e79713 slli a4,a5,0xe
- 6e6: 06075763 bgez a4,754
- 6ea: 4785 li a5,1
- 6ec: c63e sw a5,12(sp)
- 6ee: 4732 lw a4,12(sp)
+00000664 :
+ 664: 400217b7 lui a5,0x40021
+ 668: 4398 lw a4,0(a5)
+ 66a: f0ff06b7 lui a3,0xf0ff0
+ 66e: 1141 addi sp,sp,-16
+ 670: 00176713 ori a4,a4,1
+ 674: c398 sw a4,0(a5)
+ 676: 43d8 lw a4,4(a5)
+ 678: 00020637 lui a2,0x20
+ 67c: 8f75 and a4,a4,a3
+ 67e: c3d8 sw a4,4(a5)
+ 680: 4398 lw a4,0(a5)
+ 682: fef706b7 lui a3,0xfef70
+ 686: 16fd addi a3,a3,-1
+ 688: 8f75 and a4,a4,a3
+ 68a: c398 sw a4,0(a5)
+ 68c: 4398 lw a4,0(a5)
+ 68e: fffc06b7 lui a3,0xfffc0
+ 692: 16fd addi a3,a3,-1
+ 694: 8f75 and a4,a4,a3
+ 696: c398 sw a4,0(a5)
+ 698: 43d8 lw a4,4(a5)
+ 69a: ff0106b7 lui a3,0xff010
+ 69e: 16fd addi a3,a3,-1
+ 6a0: 8f75 and a4,a4,a3
+ 6a2: c3d8 sw a4,4(a5)
+ 6a4: 4398 lw a4,0(a5)
+ 6a6: ec0006b7 lui a3,0xec000
+ 6aa: 16fd addi a3,a3,-1
+ 6ac: 8f75 and a4,a4,a3
+ 6ae: c398 sw a4,0(a5)
+ 6b0: 00ff0737 lui a4,0xff0
+ 6b4: c798 sw a4,8(a5)
+ 6b6: 0207a623 sw zero,44(a5) # 4002102c <__freertos_irq_stack_top+0x2001902c>
+ 6ba: c402 sw zero,8(sp)
+ 6bc: c602 sw zero,12(sp)
+ 6be: 4398 lw a4,0(a5)
+ 6c0: 66c1 lui a3,0x10
+ 6c2: 8f55 or a4,a4,a3
+ 6c4: c398 sw a4,0(a5)
+ 6c6: 400216b7 lui a3,0x40021
+ 6ca: 6705 lui a4,0x1
+ 6cc: 429c lw a5,0(a3)
+ 6ce: 8ff1 and a5,a5,a2
+ 6d0: c63e sw a5,12(sp)
+ 6d2: 47a2 lw a5,8(sp)
+ 6d4: 0785 addi a5,a5,1
+ 6d6: c43e sw a5,8(sp)
+ 6d8: 47b2 lw a5,12(sp)
+ 6da: e781 bnez a5,6e2
+ 6dc: 47a2 lw a5,8(sp)
+ 6de: fee797e3 bne a5,a4,6cc
+ 6e2: 400217b7 lui a5,0x40021
+ 6e6: 439c lw a5,0(a5)
+ 6e8: 00e79713 slli a4,a5,0xe
+ 6ec: 06075763 bgez a4,75a
6f0: 4785 li a5,1
- 6f2: 04f71f63 bne a4,a5,750
- 6f6: 400217b7 lui a5,0x40021
- 6fa: 43d8 lw a4,4(a5)
- 6fc: ffc106b7 lui a3,0xffc10
- 700: 16fd addi a3,a3,-1
- 702: c3d8 sw a4,4(a5)
- 704: 43d8 lw a4,4(a5)
- 706: c3d8 sw a4,4(a5)
- 708: 43d8 lw a4,4(a5)
- 70a: 40076713 ori a4,a4,1024
- 70e: c3d8 sw a4,4(a5)
- 710: 43d8 lw a4,4(a5)
- 712: 8f75 and a4,a4,a3
+ 6f2: c63e sw a5,12(sp)
+ 6f4: 4732 lw a4,12(sp)
+ 6f6: 4785 li a5,1
+ 6f8: 04f71f63 bne a4,a5,756
+ 6fc: 400217b7 lui a5,0x40021
+ 700: 43d8 lw a4,4(a5)
+ 702: ffc106b7 lui a3,0xffc10
+ 706: 16fd addi a3,a3,-1
+ 708: c3d8 sw a4,4(a5)
+ 70a: 43d8 lw a4,4(a5)
+ 70c: c3d8 sw a4,4(a5)
+ 70e: 43d8 lw a4,4(a5)
+ 710: 40076713 ori a4,a4,1024
714: c3d8 sw a4,4(a5)
716: 43d8 lw a4,4(a5)
- 718: 001106b7 lui a3,0x110
- 71c: 8f55 or a4,a4,a3
- 71e: c3d8 sw a4,4(a5)
- 720: 4398 lw a4,0(a5)
- 722: 010006b7 lui a3,0x1000
- 726: 8f55 or a4,a4,a3
- 728: c398 sw a4,0(a5)
- 72a: 4398 lw a4,0(a5)
- 72c: 00671693 slli a3,a4,0x6
- 730: fe06dde3 bgez a3,72a
- 734: 43d8 lw a4,4(a5)
- 736: 400216b7 lui a3,0x40021
- 73a: 9b71 andi a4,a4,-4
- 73c: c3d8 sw a4,4(a5)
- 73e: 43d8 lw a4,4(a5)
- 740: 00276713 ori a4,a4,2
- 744: c3d8 sw a4,4(a5)
- 746: 4721 li a4,8
- 748: 42dc lw a5,4(a3)
- 74a: 8bb1 andi a5,a5,12
- 74c: fee79ee3 bne a5,a4,748
- 750: 0141 addi sp,sp,16
- 752: 8082 ret
- 754: c602 sw zero,12(sp)
- 756: bf61 j 6ee
+ 718: 8f75 and a4,a4,a3
+ 71a: c3d8 sw a4,4(a5)
+ 71c: 43d8 lw a4,4(a5)
+ 71e: 001106b7 lui a3,0x110
+ 722: 8f55 or a4,a4,a3
+ 724: c3d8 sw a4,4(a5)
+ 726: 4398 lw a4,0(a5)
+ 728: 010006b7 lui a3,0x1000
+ 72c: 8f55 or a4,a4,a3
+ 72e: c398 sw a4,0(a5)
+ 730: 4398 lw a4,0(a5)
+ 732: 00671693 slli a3,a4,0x6
+ 736: fe06dde3 bgez a3,730
+ 73a: 43d8 lw a4,4(a5)
+ 73c: 400216b7 lui a3,0x40021
+ 740: 9b71 andi a4,a4,-4
+ 742: c3d8 sw a4,4(a5)
+ 744: 43d8 lw a4,4(a5)
+ 746: 00276713 ori a4,a4,2
+ 74a: c3d8 sw a4,4(a5)
+ 74c: 4721 li a4,8
+ 74e: 42dc lw a5,4(a3)
+ 750: 8bb1 andi a5,a5,12
+ 752: fee79ee3 bne a5,a4,74e
+ 756: 0141 addi sp,sp,16
+ 758: 8082 ret
+ 75a: c602 sw zero,12(sp)
+ 75c: bf61 j 6f4
-00000758 :
- 758: 400216b7 lui a3,0x40021
- 75c: 42d8 lw a4,4(a3)
- 75e: 200007b7 lui a5,0x20000
- 762: 4611 li a2,4
- 764: 8b31 andi a4,a4,12
- 766: 08078793 addi a5,a5,128 # 20000080
- 76a: 00c70563 beq a4,a2,774
- 76e: 4621 li a2,8
- 770: 02c70863 beq a4,a2,7a0
- 774: 007a1737 lui a4,0x7a1
- 778: 20070713 addi a4,a4,512 # 7a1200 <_data_lma+0x79ef50>
- 77c: c398 sw a4,0(a5)
- 77e: 40021737 lui a4,0x40021
- 782: 4358 lw a4,4(a4)
- 784: 8311 srli a4,a4,0x4
- 786: 00f77693 andi a3,a4,15
- 78a: 20000737 lui a4,0x20000
- 78e: 00070713 mv a4,a4
- 792: 9736 add a4,a4,a3
- 794: 2314 lbu a3,0(a4)
- 796: 4398 lw a4,0(a5)
- 798: 00d75733 srl a4,a4,a3
- 79c: c398 sw a4,0(a5)
- 79e: 8082 ret
- 7a0: 42d8 lw a4,4(a3)
- 7a2: 42d4 lw a3,4(a3)
- 7a4: 6641 lui a2,0x10
- 7a6: 8349 srli a4,a4,0x12
- 7a8: 8b3d andi a4,a4,15
- 7aa: 8ef1 and a3,a3,a2
- 7ac: 00270613 addi a2,a4,2 # 20000002 <_data_vma+0x2>
- 7b0: cf15 beqz a4,7ec
- 7b2: 473d li a4,15
- 7b4: 02e60f63 beq a2,a4,7f2
- 7b8: 4741 li a4,16
- 7ba: 02e60f63 beq a2,a4,7f8
- 7be: 4745 li a4,17
- 7c0: 4581 li a1,0
- 7c2: 00e61363 bne a2,a4,7c8
- 7c6: 4641 li a2,16
- 7c8: e2a1 bnez a3,808 <__stack_size+0x8>
- 7ca: 40024737 lui a4,0x40024
- 7ce: 80072703 lw a4,-2048(a4) # 40023800 <__freertos_irq_stack_top+0x2001b800>
- 7d2: 8b41 andi a4,a4,16
- 7d4: c70d beqz a4,7fe
- 7d6: 007a1737 lui a4,0x7a1
- 7da: 20070713 addi a4,a4,512 # 7a1200 <_data_lma+0x79ef50>
- 7de: 02c70633 mul a2,a4,a2
- 7e2: c390 sw a2,0(a5)
- 7e4: ddc9 beqz a1,77e
- 7e6: 4398 lw a4,0(a5)
- 7e8: 8305 srli a4,a4,0x1
- 7ea: bf49 j 77c
- 7ec: 4581 li a1,0
- 7ee: 4649 li a2,18
- 7f0: bfe1 j 7c8
- 7f2: 4585 li a1,1
- 7f4: 4635 li a2,13
- 7f6: bfc9 j 7c8
- 7f8: 4581 li a1,0
- 7fa: 463d li a2,15
- 7fc: b7f1 j 7c8
- 7fe: 003d1737 lui a4,0x3d1
- 802: 90070713 addi a4,a4,-1792 # 3d0900 <_data_lma+0x3ce650>
- 806: bfe1 j 7de
- 808: 40021537 lui a0,0x40021
- 80c: 5558 lw a4,44(a0)
- 80e: 00f71693 slli a3,a4,0xf
+0000075e :
+ 75e: 400216b7 lui a3,0x40021
+ 762: 42d8 lw a4,4(a3)
+ 764: 200007b7 lui a5,0x20000
+ 768: 4611 li a2,4
+ 76a: 8b31 andi a4,a4,12
+ 76c: 17078793 addi a5,a5,368 # 20000170
+ 770: 00c70563 beq a4,a2,77a
+ 774: 4621 li a2,8
+ 776: 02c70863 beq a4,a2,7a6
+ 77a: 007a1737 lui a4,0x7a1
+ 77e: 20070713 addi a4,a4,512 # 7a1200 <_data_lma+0x79bbe0>
+ 782: c398 sw a4,0(a5)
+ 784: 40021737 lui a4,0x40021
+ 788: 4358 lw a4,4(a4)
+ 78a: 8311 srli a4,a4,0x4
+ 78c: 00f77693 andi a3,a4,15
+ 790: 20000737 lui a4,0x20000
+ 794: 00070713 mv a4,a4
+ 798: 9736 add a4,a4,a3
+ 79a: 2314 lbu a3,0(a4)
+ 79c: 4398 lw a4,0(a5)
+ 79e: 00d75733 srl a4,a4,a3
+ 7a2: c398 sw a4,0(a5)
+ 7a4: 8082 ret
+ 7a6: 42d8 lw a4,4(a3)
+ 7a8: 42d4 lw a3,4(a3)
+ 7aa: 6641 lui a2,0x10
+ 7ac: 8349 srli a4,a4,0x12
+ 7ae: 8b3d andi a4,a4,15
+ 7b0: 8ef1 and a3,a3,a2
+ 7b2: 00270613 addi a2,a4,2 # 20000002 <_data_vma+0x2>
+ 7b6: cf15 beqz a4,7f2
+ 7b8: 473d li a4,15
+ 7ba: 02e60f63 beq a2,a4,7f8
+ 7be: 4741 li a4,16
+ 7c0: 02e60f63 beq a2,a4,7fe
+ 7c4: 4745 li a4,17
+ 7c6: 4581 li a1,0
+ 7c8: 00e61363 bne a2,a4,7ce
+ 7cc: 4641 li a2,16
+ 7ce: e2a1 bnez a3,80e <__stack_size+0xe>
+ 7d0: 40024737 lui a4,0x40024
+ 7d4: 80072703 lw a4,-2048(a4) # 40023800 <__freertos_irq_stack_top+0x2001b800>
+ 7d8: 8b41 andi a4,a4,16
+ 7da: c70d beqz a4,804 <__stack_size+0x4>
+ 7dc: 007a1737 lui a4,0x7a1
+ 7e0: 20070713 addi a4,a4,512 # 7a1200 <_data_lma+0x79bbe0>
+ 7e4: 02c70633 mul a2,a4,a2
+ 7e8: c390 sw a2,0(a5)
+ 7ea: ddc9 beqz a1,784
+ 7ec: 4398 lw a4,0(a5)
+ 7ee: 8305 srli a4,a4,0x1
+ 7f0: bf49 j 782
+ 7f2: 4581 li a1,0
+ 7f4: 4649 li a2,18
+ 7f6: bfe1 j 7ce
+ 7f8: 4585 li a1,1
+ 7fa: 4635 li a2,13
+ 7fc: bfc9 j 7ce
+ 7fe: 4581 li a1,0
+ 800: 463d li a2,15
+ 802: b7f1 j 7ce
+ 804: 003d1737 lui a4,0x3d1
+ 808: 90070713 addi a4,a4,-1792 # 3d0900 <_data_lma+0x3cb2e0>
+ 80c: bfe1 j 7e4
+ 80e: 40021537 lui a0,0x40021
812: 5558 lw a4,44(a0)
- 814: 0406df63 bgez a3,872 <__stack_size+0x72>
- 818: 8311 srli a4,a4,0x4
- 81a: 8b3d andi a4,a4,15
- 81c: 00170693 addi a3,a4,1
- 820: 007a1737 lui a4,0x7a1
- 824: 20070713 addi a4,a4,512 # 7a1200 <_data_lma+0x79ef50>
- 828: 02d75733 divu a4,a4,a3
- 82c: c398 sw a4,0(a5)
- 82e: 5554 lw a3,44(a0)
- 830: 82a1 srli a3,a3,0x8
- 832: 8abd andi a3,a3,15
- 834: e28d bnez a3,856 <__stack_size+0x56>
- 836: 4695 li a3,5
- 838: 02d70733 mul a4,a4,a3
- 83c: 8305 srli a4,a4,0x1
- 83e: c398 sw a4,0(a5)
- 840: 40021737 lui a4,0x40021
- 844: 5758 lw a4,44(a4)
- 846: 4394 lw a3,0(a5)
- 848: 8b3d andi a4,a4,15
- 84a: 0705 addi a4,a4,1
- 84c: 02e6d733 divu a4,a3,a4
- 850: c398 sw a4,0(a5)
- 852: 4398 lw a4,0(a5)
- 854: b769 j 7de
- 856: 4505 li a0,1
- 858: 00a69463 bne a3,a0,860 <__stack_size+0x60>
- 85c: 46e5 li a3,25
- 85e: bfe9 j 838 <__stack_size+0x38>
- 860: 453d li a0,15
- 862: 00a69663 bne a3,a0,86e <__stack_size+0x6e>
- 866: 46d1 li a3,20
- 868: 02e68733 mul a4,a3,a4
- 86c: bfc9 j 83e <__stack_size+0x3e>
- 86e: 0689 addi a3,a3,2
- 870: bfe5 j 868 <__stack_size+0x68>
- 872: 8b3d andi a4,a4,15
- 874: 00170693 addi a3,a4,1 # 40021001 <__freertos_irq_stack_top+0x20019001>
- 878: 007a1737 lui a4,0x7a1
- 87c: 20070713 addi a4,a4,512 # 7a1200 <_data_lma+0x79ef50>
- 880: 02d75733 divu a4,a4,a3
- 884: b7f1 j 850 <__stack_size+0x50>
+ 814: 00f71693 slli a3,a4,0xf
+ 818: 5558 lw a4,44(a0)
+ 81a: 0406df63 bgez a3,878 <__stack_size+0x78>
+ 81e: 8311 srli a4,a4,0x4
+ 820: 8b3d andi a4,a4,15
+ 822: 00170693 addi a3,a4,1
+ 826: 007a1737 lui a4,0x7a1
+ 82a: 20070713 addi a4,a4,512 # 7a1200 <_data_lma+0x79bbe0>
+ 82e: 02d75733 divu a4,a4,a3
+ 832: c398 sw a4,0(a5)
+ 834: 5554 lw a3,44(a0)
+ 836: 82a1 srli a3,a3,0x8
+ 838: 8abd andi a3,a3,15
+ 83a: e28d bnez a3,85c <__stack_size+0x5c>
+ 83c: 4695 li a3,5
+ 83e: 02d70733 mul a4,a4,a3
+ 842: 8305 srli a4,a4,0x1
+ 844: c398 sw a4,0(a5)
+ 846: 40021737 lui a4,0x40021
+ 84a: 5758 lw a4,44(a4)
+ 84c: 4394 lw a3,0(a5)
+ 84e: 8b3d andi a4,a4,15
+ 850: 0705 addi a4,a4,1
+ 852: 02e6d733 divu a4,a3,a4
+ 856: c398 sw a4,0(a5)
+ 858: 4398 lw a4,0(a5)
+ 85a: b769 j 7e4
+ 85c: 4505 li a0,1
+ 85e: 00a69463 bne a3,a0,866 <__stack_size+0x66>
+ 862: 46e5 li a3,25
+ 864: bfe9 j 83e <__stack_size+0x3e>
+ 866: 453d li a0,15
+ 868: 00a69663 bne a3,a0,874 <__stack_size+0x74>
+ 86c: 46d1 li a3,20
+ 86e: 02e68733 mul a4,a3,a4
+ 872: bfc9 j 844 <__stack_size+0x44>
+ 874: 0689 addi a3,a3,2
+ 876: bfe5 j 86e <__stack_size+0x6e>
+ 878: 8b3d andi a4,a4,15
+ 87a: 00170693 addi a3,a4,1 # 40021001 <__freertos_irq_stack_top+0x20019001>
+ 87e: 007a1737 lui a4,0x7a1
+ 882: 20070713 addi a4,a4,512 # 7a1200 <_data_lma+0x79bbe0>
+ 886: 02d75733 divu a4,a4,a3
+ 88a: b7f1 j 856 <__stack_size+0x56>
-00000886 :
- 886: a001 j 886
+0000088c :
+ 88c: a001 j 88c
-00000888 :
- 888: 20000197 auipc gp,0x20000
- 88c: ff818193 addi gp,gp,-8 # 20000880 <__global_pointer$>
- 890: 20007117 auipc sp,0x20007
- 894: 77010113 addi sp,sp,1904 # 20008000 <__freertos_irq_stack_top>
- 898: 00002517 auipc a0,0x2
- 89c: a1850513 addi a0,a0,-1512 # 22b0 <_data_lma>
- 8a0: 1ffff597 auipc a1,0x1ffff
- 8a4: 76058593 addi a1,a1,1888 # 20000000 <_data_vma>
- 8a8: 81818613 addi a2,gp,-2024 # 20000098 <_edata>
- 8ac: 00c5fa63 bgeu a1,a2,8c0
- 8b0: 00052283 lw t0,0(a0)
- 8b4: 0055a023 sw t0,0(a1)
- 8b8: 0511 addi a0,a0,4
- 8ba: 0591 addi a1,a1,4
- 8bc: fec5eae3 bltu a1,a2,8b0
- 8c0: 1ffff517 auipc a0,0x1ffff
- 8c4: 7d850513 addi a0,a0,2008 # 20000098 <_edata>
- 8c8: 98018593 addi a1,gp,-1664 # 20000200 <_ebss>
- 8cc: 00b57763 bgeu a0,a1,8da
- 8d0: 00052023 sw zero,0(a0)
- 8d4: 0511 addi a0,a0,4
- 8d6: feb56de3 bltu a0,a1,8d0
- 8da: 42fd li t0,31
- 8dc: bc029073 csrw 0xbc0,t0
- 8e0: 42fd li t0,31
- 8e2: 80429073 csrw 0x804,t0
- 8e6: 000082b7 lui t0,0x8
- 8ea: 80028293 addi t0,t0,-2048 # 7800 <_data_lma+0x5550>
- 8ee: 30029073 csrw mstatus,t0
- 8f2: fffff297 auipc t0,0xfffff
- 8f6: 71228293 addi t0,t0,1810 # 4 <_einit>
- 8fa: 0032e293 ori t0,t0,3
- 8fe: 30529073 csrw mtvec,t0
- 902: d5dff0ef jal ra,65e
- 906: 00000297 auipc t0,0x0
- 90a: cfa28293 addi t0,t0,-774 # 600
- 90e: 34129073 csrw mepc,t0
- 912: 30200073 mret
+0000088e :
+ 88e: 20000197 auipc gp,0x20000
+ 892: 0e218193 addi gp,gp,226 # 20000970 <__global_pointer$>
+ 896: 20007117 auipc sp,0x20007
+ 89a: 76a10113 addi sp,sp,1898 # 20008000 <__freertos_irq_stack_top>
+ 89e: 00005517 auipc a0,0x5
+ 8a2: d8250513 addi a0,a0,-638 # 5620 <_data_lma>
+ 8a6: 1ffff597 auipc a1,0x1ffff
+ 8aa: 75a58593 addi a1,a1,1882 # 20000000 <_data_vma>
+ 8ae: 82018613 addi a2,gp,-2016 # 20000190 <_edata>
+ 8b2: 00c5fa63 bgeu a1,a2,8c6
+ 8b6: 00052283 lw t0,0(a0)
+ 8ba: 0055a023 sw t0,0(a1)
+ 8be: 0511 addi a0,a0,4
+ 8c0: 0591 addi a1,a1,4
+ 8c2: fec5eae3 bltu a1,a2,8b6
+ 8c6: 20000517 auipc a0,0x20000
+ 8ca: 8ca50513 addi a0,a0,-1846 # 20000190 <_edata>
+ 8ce: 20003597 auipc a1,0x20003
+ 8d2: f8e58593 addi a1,a1,-114 # 2000385c <_ebss>
+ 8d6: 00b57763 bgeu a0,a1,8e4
+ 8da: 00052023 sw zero,0(a0)
+ 8de: 0511 addi a0,a0,4
+ 8e0: feb56de3 bltu a0,a1,8da
+ 8e4: 42fd li t0,31
+ 8e6: bc029073 csrw 0xbc0,t0
+ 8ea: 42fd li t0,31
+ 8ec: 80429073 csrw 0x804,t0
+ 8f0: 000082b7 lui t0,0x8
+ 8f4: 80028293 addi t0,t0,-2048 # 7800 <_data_lma+0x21e0>
+ 8f8: 30029073 csrw mstatus,t0
+ 8fc: fffff297 auipc t0,0xfffff
+ 900: 70828293 addi t0,t0,1800 # 4 <_einit>
+ 904: 0032e293 ori t0,t0,3
+ 908: 30529073 csrw mtvec,t0
+ 90c: d59ff0ef jal ra,664
+ 910: 00000297 auipc t0,0x0
+ 914: cf028293 addi t0,t0,-784 # 600
+ 918: 34129073 csrw mepc,t0
+ 91c: 30200073 mret
-00000916 :
- 916: 1ffff7b7 lui a5,0x1ffff
- 91a: 7047a503 lw a0,1796(a5) # 1ffff704 <_data_lma+0x1fffd454>
- 91e: 8082 ret
+00000920 :
+ 920: bf7ff2ef jal t0,516 <__riscv_save_0>
+ 924: 400127b7 lui a5,0x40012
+ 928: 40078793 addi a5,a5,1024 # 40012400 <__freertos_irq_stack_top+0x2000a400>
+ 92c: 00f51b63 bne a0,a5,942
+ 930: 4585 li a1,1
+ 932: 20000513 li a0,512
+ 936: 2755 jal 10da
+ 938: 4581 li a1,0
+ 93a: 20000513 li a0,512
+ 93e: 2f71 jal 10da
+ 940: beed j 53a <__riscv_restore_0>
+ 942: 400137b7 lui a5,0x40013
+ 946: 80078793 addi a5,a5,-2048 # 40012800 <__freertos_irq_stack_top+0x2000a800>
+ 94a: fef51be3 bne a0,a5,940
+ 94e: 4585 li a1,1
+ 950: 40000513 li a0,1024
+ 954: 2759 jal 10da
+ 956: 4581 li a1,0
+ 958: 40000513 li a0,1024
+ 95c: b7cd j 93e
-00000920 :
- 920: 459c lw a5,8(a1)
- 922: 0107f713 andi a4,a5,16
- 926: 00f7f813 andi a6,a5,15
- 92a: c701 beqz a4,932
- 92c: 41d8 lw a4,4(a1)
- 92e: 00e86833 or a6,a6,a4
- 932: 218e lhu a1,0(a1)
- 934: 0ff5f713 andi a4,a1,255
- 938: c339 beqz a4,97e
- 93a: 4118 lw a4,0(a0)
- 93c: 4681 li a3,0
- 93e: 4e85 li t4,1
- 940: 4f3d li t5,15
- 942: 02800f93 li t6,40
- 946: 04800293 li t0,72
- 94a: 4e21 li t3,8
- 94c: 00de9633 sll a2,t4,a3
- 950: 00c5f8b3 and a7,a1,a2
- 954: 03161163 bne a2,a7,976
- 958: 00269893 slli a7,a3,0x2
- 95c: 011f1333 sll t1,t5,a7
- 960: fff34313 not t1,t1
- 964: 00e37733 and a4,t1,a4
- 968: 011818b3 sll a7,a6,a7
- 96c: 00e8e733 or a4,a7,a4
- 970: 05f79f63 bne a5,t6,9ce
- 974: c950 sw a2,20(a0)
- 976: 0685 addi a3,a3,1
- 978: fdc69ae3 bne a3,t3,94c
- 97c: c118 sw a4,0(a0)
- 97e: 0ff00713 li a4,255
- 982: 04b77563 bgeu a4,a1,9cc
- 986: 4154 lw a3,4(a0)
- 988: 4621 li a2,8
- 98a: 4e85 li t4,1
- 98c: 4f3d li t5,15
- 98e: 02800f93 li t6,40
- 992: 04800293 li t0,72
- 996: 4e41 li t3,16
- 998: 00ce98b3 sll a7,t4,a2
- 99c: 0115f733 and a4,a1,a7
- 9a0: 02e89263 bne a7,a4,9c4
- 9a4: 00261713 slli a4,a2,0x2
- 9a8: 1701 addi a4,a4,-32
- 9aa: 00ef1333 sll t1,t5,a4
- 9ae: fff34313 not t1,t1
- 9b2: 00d376b3 and a3,t1,a3
- 9b6: 00e81733 sll a4,a6,a4
- 9ba: 8ed9 or a3,a3,a4
- 9bc: 01f79d63 bne a5,t6,9d6
- 9c0: 01152a23 sw a7,20(a0)
- 9c4: 0605 addi a2,a2,1
- 9c6: fdc619e3 bne a2,t3,998
- 9ca: c154 sw a3,4(a0)
- 9cc: 8082 ret
- 9ce: fa5794e3 bne a5,t0,976
- 9d2: c910 sw a2,16(a0)
- 9d4: b74d j 976
- 9d6: fe5797e3 bne a5,t0,9c4
- 9da: 01152823 sw a7,16(a0)
- 9de: b7dd j 9c4
+0000095e :
+ 95e: 415c lw a5,4(a0)
+ 960: e0f10737 lui a4,0xe0f10
+ 964: eff70713 addi a4,a4,-257 # e0f0feff <__freertos_irq_stack_top+0xc0f07eff>
+ 968: 4d94 lw a3,24(a1)
+ 96a: 8f7d and a4,a4,a5
+ 96c: 419c lw a5,0(a1)
+ 96e: 8fd5 or a5,a5,a3
+ 970: 4dd4 lw a3,28(a1)
+ 972: 8fd5 or a5,a5,a3
+ 974: 41d4 lw a3,4(a1)
+ 976: 06a2 slli a3,a3,0x8
+ 978: 8fd5 or a5,a5,a3
+ 97a: 8fd9 or a5,a5,a4
+ 97c: c15c sw a5,4(a0)
+ 97e: 451c lw a5,8(a0)
+ 980: fff1f737 lui a4,0xfff1f
+ 984: 7fd70713 addi a4,a4,2045 # fff1f7fd <__freertos_irq_stack_top+0xdff177fd>
+ 988: 45d4 lw a3,12(a1)
+ 98a: 8f7d and a4,a4,a5
+ 98c: 499c lw a5,16(a1)
+ 98e: 8fd5 or a5,a5,a3
+ 990: 4594 lw a3,8(a1)
+ 992: 0686 slli a3,a3,0x1
+ 994: 8fd5 or a5,a5,a3
+ 996: 8fd9 or a5,a5,a4
+ 998: c51c sw a5,8(a0)
+ 99a: 555c lw a5,44(a0)
+ 99c: ff100737 lui a4,0xff100
+ 9a0: 177d addi a4,a4,-1
+ 9a2: 8f7d and a4,a4,a5
+ 9a4: 29dc lbu a5,20(a1)
+ 9a6: 17fd addi a5,a5,-1
+ 9a8: 0ff7f793 andi a5,a5,255
+ 9ac: 07d2 slli a5,a5,0x14
+ 9ae: 8fd9 or a5,a5,a4
+ 9b0: d55c sw a5,44(a0)
+ 9b2: 8082 ret
-000009e0 :
- 9e0: 200007b7 lui a5,0x20000
- 9e4: 08a7ac23 sw a0,152(a5) # 20000098 <_edata>
- 9e8: 8082 ret
+000009b4 :
+ 9b4: 451c lw a5,8(a0)
+ 9b6: c589 beqz a1,9c0
+ 9b8: 0017e793 ori a5,a5,1
+ 9bc: c51c sw a5,8(a0)
+ 9be: 8082 ret
+ 9c0: 9bf9 andi a5,a5,-2
+ 9c2: bfed j 9bc
-000009ea :
- 9ea: 40021737 lui a4,0x40021
- 9ee: 435c lw a5,4(a4)
- 9f0: 4691 li a3,4
- 9f2: 8bb1 andi a5,a5,12
- 9f4: 00d78563 beq a5,a3,9fe
- 9f8: 46a1 li a3,8
- 9fa: 06d78263 beq a5,a3,a5e
- 9fe: 007a17b7 lui a5,0x7a1
- a02: 20078793 addi a5,a5,512 # 7a1200 <_data_lma+0x79ef50>
- a06: c11c sw a5,0(a0)
- a08: 40021637 lui a2,0x40021
- a0c: 425c lw a5,4(a2)
- a0e: 20000737 lui a4,0x20000
- a12: 01070713 addi a4,a4,16 # 20000010
- a16: 8391 srli a5,a5,0x4
- a18: 8bbd andi a5,a5,15
- a1a: 97ba add a5,a5,a4
- a1c: 2394 lbu a3,0(a5)
- a1e: 411c lw a5,0(a0)
- a20: 00d7d7b3 srl a5,a5,a3
- a24: c15c sw a5,4(a0)
- a26: 4254 lw a3,4(a2)
- a28: 82a1 srli a3,a3,0x8
- a2a: 8a9d andi a3,a3,7
- a2c: 96ba add a3,a3,a4
- a2e: 2294 lbu a3,0(a3)
- a30: 00d7d6b3 srl a3,a5,a3
- a34: c514 sw a3,8(a0)
- a36: 4254 lw a3,4(a2)
- a38: 82ad srli a3,a3,0xb
- a3a: 8a9d andi a3,a3,7
- a3c: 9736 add a4,a4,a3
- a3e: 2318 lbu a4,0(a4)
- a40: 00e7d7b3 srl a5,a5,a4
- a44: c55c sw a5,12(a0)
- a46: 4258 lw a4,4(a2)
- a48: 8339 srli a4,a4,0xe
- a4a: 00377693 andi a3,a4,3
- a4e: 80418713 addi a4,gp,-2044 # 20000084
- a52: 9736 add a4,a4,a3
- a54: 2318 lbu a4,0(a4)
- a56: 02e7d7b3 divu a5,a5,a4
- a5a: c91c sw a5,16(a0)
- a5c: 8082 ret
- a5e: 435c lw a5,4(a4)
- a60: 4358 lw a4,4(a4)
- a62: 66c1 lui a3,0x10
- a64: 83c9 srli a5,a5,0x12
- a66: 8f75 and a4,a4,a3
- a68: 1ffff6b7 lui a3,0x1ffff
- a6c: 70c6a683 lw a3,1804(a3) # 1ffff70c <_data_lma+0x1fffd45c>
- a70: 8bbd andi a5,a5,15
- a72: 0789 addi a5,a5,2
- a74: 01169613 slli a2,a3,0x11
- a78: 00064863 bltz a2,a88
- a7c: 46c5 li a3,17
- a7e: 4601 li a2,0
- a80: 02d79263 bne a5,a3,aa4
- a84: 47c9 li a5,18
- a86: a839 j aa4
- a88: 4689 li a3,2
- a8a: 02d78f63 beq a5,a3,ac8
- a8e: 46bd li a3,15
- a90: 02d78e63 beq a5,a3,acc
- a94: 46c1 li a3,16
- a96: 02d78e63 beq a5,a3,ad2
- a9a: 46c5 li a3,17
- a9c: 4601 li a2,0
- a9e: 00d79363 bne a5,a3,aa4
- aa2: 47c1 li a5,16
- aa4: ef1d bnez a4,ae2
- aa6: 40024737 lui a4,0x40024
- aaa: 80072703 lw a4,-2048(a4) # 40023800 <__freertos_irq_stack_top+0x2001b800>
- aae: 8b41 andi a4,a4,16
- ab0: c705 beqz a4,ad8
- ab2: 007a1737 lui a4,0x7a1
- ab6: 20070713 addi a4,a4,512 # 7a1200 <_data_lma+0x79ef50>
- aba: 02f707b3 mul a5,a4,a5
- abe: c11c sw a5,0(a0)
- ac0: d621 beqz a2,a08
- ac2: 411c lw a5,0(a0)
- ac4: 8385 srli a5,a5,0x1
- ac6: b781 j a06
- ac8: 4601 li a2,0
- aca: bf6d j a84
- acc: 4605 li a2,1
- ace: 47b5 li a5,13
- ad0: bfd1 j aa4
- ad2: 4601 li a2,0
- ad4: 47bd li a5,15
- ad6: b7f9 j aa4
- ad8: 003d1737 lui a4,0x3d1
- adc: 90070713 addi a4,a4,-1792 # 3d0900 <_data_lma+0x3ce650>
- ae0: bfe9 j aba
- ae2: 400215b7 lui a1,0x40021
- ae6: 55d8 lw a4,44(a1)
- ae8: 00f71693 slli a3,a4,0xf
- aec: 55d8 lw a4,44(a1)
- aee: 0406df63 bgez a3,b4c
- af2: 8311 srli a4,a4,0x4
- af4: 8b3d andi a4,a4,15
- af6: 00170693 addi a3,a4,1
- afa: 007a1737 lui a4,0x7a1
- afe: 20070713 addi a4,a4,512 # 7a1200 <_data_lma+0x79ef50>
- b02: 02d75733 divu a4,a4,a3
- b06: c118 sw a4,0(a0)
- b08: 55d4 lw a3,44(a1)
- b0a: 82a1 srli a3,a3,0x8
- b0c: 8abd andi a3,a3,15
- b0e: e28d bnez a3,b30
- b10: 4695 li a3,5
- b12: 02d70733 mul a4,a4,a3
- b16: 8305 srli a4,a4,0x1
- b18: c118 sw a4,0(a0)
- b1a: 40021737 lui a4,0x40021
- b1e: 5758 lw a4,44(a4)
- b20: 4114 lw a3,0(a0)
- b22: 8b3d andi a4,a4,15
- b24: 0705 addi a4,a4,1
- b26: 02e6d733 divu a4,a3,a4
- b2a: c118 sw a4,0(a0)
- b2c: 4118 lw a4,0(a0)
- b2e: b771 j aba
- b30: 4585 li a1,1
- b32: 00b69463 bne a3,a1,b3a
- b36: 46e5 li a3,25
- b38: bfe9 j b12
- b3a: 45bd li a1,15
- b3c: 00b69663 bne a3,a1,b48
- b40: 46d1 li a3,20
- b42: 02e68733 mul a4,a3,a4
- b46: bfc9 j b18
- b48: 0689 addi a3,a3,2
- b4a: bfe5 j b42
- b4c: 8b3d andi a4,a4,15
- b4e: 00170693 addi a3,a4,1 # 40021001 <__freertos_irq_stack_top+0x20019001>
- b52: 007a1737 lui a4,0x7a1
- b56: 20070713 addi a4,a4,512 # 7a1200 <_data_lma+0x79ef50>
- b5a: 02d75733 divu a4,a4,a3
- b5e: b7f1 j b2a
+000009c4 :
+ 9c4: 451c lw a5,8(a0)
+ 9c6: c589 beqz a1,9d0
+ 9c8: 1007e793 ori a5,a5,256
+ 9cc: c51c sw a5,8(a0)
+ 9ce: 8082 ret
+ 9d0: eff7f793 andi a5,a5,-257
+ 9d4: bfe5 j 9cc
-00000b60 :
- b60: c599 beqz a1,b6e
- b62: 40021737 lui a4,0x40021
- b66: 4f1c lw a5,24(a4)
- b68: 8d5d or a0,a0,a5
- b6a: cf08 sw a0,24(a4)
- b6c: 8082 ret
- b6e: 400217b7 lui a5,0x40021
- b72: 4f98 lw a4,24(a5)
- b74: fff54513 not a0,a0
- b78: 8d79 and a0,a0,a4
- b7a: cf88 sw a0,24(a5)
- b7c: 8082 ret
+000009d6 :
+ 9d6: 451c lw a5,8(a0)
+ 9d8: 0087e793 ori a5,a5,8
+ 9dc: c51c sw a5,8(a0)
+ 9de: 8082 ret
-00000b7e :
- b7e: 999ff2ef jal t0,516 <__riscv_save_0>
- b82: 2916 lhu a3,16(a0)
- b84: 77f5 lui a5,0xffffd
- b86: 17fd addi a5,a5,-1
- b88: 8ff5 and a5,a5,a3
- b8a: 21f6 lhu a3,6(a1)
- b8c: 25da lhu a4,12(a1)
- b8e: 7179 addi sp,sp,-48
- b90: 8fd5 or a5,a5,a3
- b92: a91e sh a5,16(a0)
- b94: 2556 lhu a3,12(a0)
- b96: 77fd lui a5,0xfffff
- b98: 9f378793 addi a5,a5,-1549 # ffffe9f3 <__freertos_irq_stack_top+0xdfff69f3>
- b9c: 8ff5 and a5,a5,a3
- b9e: 21d6 lhu a3,4(a1)
- ba0: 842a mv s0,a0
- ba2: c62e sw a1,12(sp)
- ba4: 8fd5 or a5,a5,a3
- ba6: 2596 lhu a3,8(a1)
- ba8: 8fd5 or a5,a5,a3
- baa: 25b6 lhu a3,10(a1)
- bac: 8fd5 or a5,a5,a3
- bae: a55e sh a5,12(a0)
- bb0: 295e lhu a5,20(a0)
- bb2: 07c2 slli a5,a5,0x10
- bb4: 83c1 srli a5,a5,0x10
- bb6: cff7f793 andi a5,a5,-769
- bba: 8fd9 or a5,a5,a4
- bbc: a95e sh a5,20(a0)
- bbe: 0868 addi a0,sp,28
- bc0: 352d jal 9ea
- bc2: 400147b7 lui a5,0x40014
- bc6: 80078793 addi a5,a5,-2048 # 40013800 <__freertos_irq_stack_top+0x2000b800>
- bca: 45b2 lw a1,12(sp)
- bcc: 02f41d63 bne s0,a5,c06
- bd0: 57a2 lw a5,40(sp)
- bd2: 4765 li a4,25
- bd4: 02e787b3 mul a5,a5,a4
- bd8: 4198 lw a4,0(a1)
- bda: 06400693 li a3,100
- bde: 070a slli a4,a4,0x2
- be0: 02e7d7b3 divu a5,a5,a4
- be4: 02d7d733 divu a4,a5,a3
- be8: 02d7f7b3 remu a5,a5,a3
- bec: 0712 slli a4,a4,0x4
- bee: 0792 slli a5,a5,0x4
- bf0: 03278793 addi a5,a5,50
- bf4: 02d7d7b3 divu a5,a5,a3
- bf8: 8bbd andi a5,a5,15
- bfa: 8fd9 or a5,a5,a4
- bfc: 07c2 slli a5,a5,0x10
- bfe: 83c1 srli a5,a5,0x10
- c00: a41e sh a5,8(s0)
- c02: 6145 addi sp,sp,48
- c04: ba1d j 53a <__riscv_restore_0>
- c06: 5792 lw a5,36(sp)
- c08: b7e9 j bd2
+000009e0 :
+ 9e0: 4508 lw a0,8(a0)
+ 9e2: 810d srli a0,a0,0x3
+ 9e4: 8905 andi a0,a0,1
+ 9e6: 8082 ret
-00000c0a :
- c0a: c591 beqz a1,c16
- c0c: 255e lhu a5,12(a0)
- c0e: 6709 lui a4,0x2
- c10: 8fd9 or a5,a5,a4
- c12: a55e sh a5,12(a0)
- c14: 8082 ret
- c16: 255a lhu a4,12(a0)
- c18: 77f9 lui a5,0xffffe
- c1a: 17fd addi a5,a5,-1
- c1c: 8ff9 and a5,a5,a4
- c1e: bfd5 j c12
+000009e8 :
+ 9e8: 451c lw a5,8(a0)
+ 9ea: 0047e793 ori a5,a5,4
+ 9ee: c51c sw a5,8(a0)
+ 9f0: 8082 ret
-00000c20 :
- c20: 1ff5f593 andi a1,a1,511
- c24: a14e sh a1,4(a0)
- c26: 8082 ret
+000009f2 :
+ 9f2: 4508 lw a0,8(a0)
+ 9f4: 8109 srli a0,a0,0x2
+ 9f6: 8905 andi a0,a0,1
+ 9f8: 8082 ret
-00000c28 :
- c28: 210a lhu a0,0(a0)
- c2a: 8d6d and a0,a0,a1
- c2c: 00a03533 snez a0,a0
- c30: 8082 ret
+000009fa :
+ 9fa: 451c lw a5,8(a0)
+ 9fc: c591 beqz a1,a08
+ 9fe: 00500737 lui a4,0x500
+ a02: 8fd9 or a5,a5,a4
+ a04: c51c sw a5,8(a0)
+ a06: 8082 ret
+ a08: ffb00737 lui a4,0xffb00
+ a0c: 177d addi a4,a4,-1
+ a0e: 8ff9 and a5,a5,a4
+ a10: bfd5 j a04
-00000c32 :
- c32: 34011173 csrrw sp,mscratch,sp
- c36: 67a1 lui a5,0x8
- c38: 80078793 addi a5,a5,-2048 # 7800 <_data_lma+0x5550>
- c3c: 30079073 csrw mstatus,a5
- c40: e000f7b7 lui a5,0xe000f
- c44: 0007a223 sw zero,4(a5) # e000f004 <__freertos_irq_stack_top+0xc0007004>
- c48: 2091 jal c8c
- c4a: c511 beqz a0,c56
- c4c: e000e7b7 lui a5,0xe000e
- c50: 6711 lui a4,0x4
- c52: 20e7a023 sw a4,512(a5) # e000e200 <__freertos_irq_stack_top+0xc0006200>
- c56: 67a1 lui a5,0x8
- c58: 88878793 addi a5,a5,-1912 # 7888 <_data_lma+0x55d8>
- c5c: 30079073 csrw mstatus,a5
- c60: 34011173 csrrw sp,mscratch,sp
- c64: 30200073 mret
+00000a12 :
+ a12: 47a5 li a5,9
+ a14: 04b7f763 bgeu a5,a1,a62
+ a18: 478d li a5,3
+ a1a: ff658713 addi a4,a1,-10
+ a1e: 02f70733 mul a4,a4,a5
+ a22: 00c52803 lw a6,12(a0)
+ a26: 479d li a5,7
+ a28: 00e797b3 sll a5,a5,a4
+ a2c: fff7c793 not a5,a5
+ a30: 0107f7b3 and a5,a5,a6
+ a34: 00e696b3 sll a3,a3,a4
+ a38: 8edd or a3,a3,a5
+ a3a: c554 sw a3,12(a0)
+ a3c: 4799 li a5,6
+ a3e: 04c7e363 bltu a5,a2,a84
+ a42: 4795 li a5,5
+ a44: 167d addi a2,a2,-1
+ a46: 02f60633 mul a2,a2,a5
+ a4a: 5958 lw a4,52(a0)
+ a4c: 47fd li a5,31
+ a4e: 00c797b3 sll a5,a5,a2
+ a52: fff7c793 not a5,a5
+ a56: 8ff9 and a5,a5,a4
+ a58: 00c59633 sll a2,a1,a2
+ a5c: 8e5d or a2,a2,a5
+ a5e: d950 sw a2,52(a0)
+ a60: 8082 ret
+ a62: 470d li a4,3
+ a64: 02e58733 mul a4,a1,a4
+ a68: 01052803 lw a6,16(a0)
+ a6c: 479d li a5,7
+ a6e: 00e797b3 sll a5,a5,a4
+ a72: fff7c793 not a5,a5
+ a76: 0107f7b3 and a5,a5,a6
+ a7a: 00e696b3 sll a3,a3,a4
+ a7e: 8edd or a3,a3,a5
+ a80: c914 sw a3,16(a0)
+ a82: bf6d j a3c
+ a84: 47b1 li a5,12
+ a86: 02c7e263 bltu a5,a2,aaa
+ a8a: 4795 li a5,5
+ a8c: 1665 addi a2,a2,-7
+ a8e: 02f60633 mul a2,a2,a5
+ a92: 5918 lw a4,48(a0)
+ a94: 47fd li a5,31
+ a96: 00c797b3 sll a5,a5,a2
+ a9a: fff7c793 not a5,a5
+ a9e: 8ff9 and a5,a5,a4
+ aa0: 00c59633 sll a2,a1,a2
+ aa4: 8e5d or a2,a2,a5
+ aa6: d910 sw a2,48(a0)
+ aa8: 8082 ret
+ aaa: 4795 li a5,5
+ aac: 164d addi a2,a2,-13
+ aae: 02f60633 mul a2,a2,a5
+ ab2: 5558 lw a4,44(a0)
+ ab4: 47fd li a5,31
+ ab6: 00c797b3 sll a5,a5,a2
+ aba: fff7c793 not a5,a5
+ abe: 8ff9 and a5,a5,a4
+ ac0: 00c595b3 sll a1,a1,a2
+ ac4: 8ddd or a1,a1,a5
+ ac6: d54c sw a1,44(a0)
+ ac8: 8082 ret
-00000c68 :
- c68: 20000737 lui a4,0x20000
- c6c: 0a070713 addi a4,a4,160 # 200000a0
- c70: 431c lw a5,0(a4)
- c72: 4394 lw a3,0(a5)
- c74: 200007b7 lui a5,0x20000
- c78: 0b078793 addi a5,a5,176 # 200000b0
- c7c: e681 bnez a3,c84
- c7e: 577d li a4,-1
- c80: c398 sw a4,0(a5)
- c82: 8082 ret
- c84: 4318 lw a4,0(a4)
- c86: 4758 lw a4,12(a4)
- c88: 4318 lw a4,0(a4)
- c8a: bfdd j c80
+00000aca :
+ aca: 415c lw a5,4(a0)
+ acc: c591 beqz a1,ad8
+ ace: 04000737 lui a4,0x4000
+ ad2: 8fd9 or a5,a5,a4
+ ad4: c15c sw a5,4(a0)
+ ad6: 8082 ret
+ ad8: fc000737 lui a4,0xfc000
+ adc: 177d addi a4,a4,-1
+ ade: 8ff9 and a5,a5,a4
+ ae0: bfd5 j ad4
-00000c8c :
- c8c: 200007b7 lui a5,0x20000
- c90: 0a87a783 lw a5,168(a5) # 200000a8
- c94: 18079763 bnez a5,e22
- c98: 87fff2ef jal t0,516 <__riscv_save_0>
- c9c: 200007b7 lui a5,0x20000
- ca0: 0bc78793 addi a5,a5,188 # 200000bc
- ca4: 4380 lw s0,0(a5)
- ca6: 0405 addi s0,s0,1
- ca8: c380 sw s0,0(a5)
- caa: e831 bnez s0,cfe
- cac: 200007b7 lui a5,0x20000
- cb0: 0a078793 addi a5,a5,160 # 200000a0
- cb4: 4398 lw a4,0(a5)
- cb6: 4318 lw a4,0(a4)
- cb8: c31d beqz a4,cde
- cba: 67a1 lui a5,0x8
- cbc: 80078793 addi a5,a5,-2048 # 7800 <_data_lma+0x5550>
- cc0: 30079073 csrw mstatus,a5
- cc4: 00002637 lui a2,0x2
- cc8: 6585 lui a1,0x1
- cca: 00002537 lui a0,0x2
- cce: 1dc60613 addi a2,a2,476 # 21dc <_read+0x6c>
- cd2: ac758593 addi a1,a1,-1337 # ac7
- cd6: 1f050513 addi a0,a0,496 # 21f0 <_read+0x80>
- cda: 2cd9 jal fb0
- cdc: a001 j cdc
- cde: 20000737 lui a4,0x20000
- ce2: 0a470713 addi a4,a4,164 # 200000a4
- ce6: 4394 lw a3,0(a5)
- ce8: 4310 lw a2,0(a4)
- cea: c390 sw a2,0(a5)
- cec: 200007b7 lui a5,0x20000
- cf0: c314 sw a3,0(a4)
- cf2: 0b478793 addi a5,a5,180 # 200000b4
- cf6: 4398 lw a4,0(a5)
- cf8: 0705 addi a4,a4,1
- cfa: c398 sw a4,0(a5)
- cfc: 37b5 jal c68
- cfe: 20000637 lui a2,0x20000
- d02: 0b060793 addi a5,a2,176 # 200000b0
- d06: 439c lw a5,0(a5)
- d08: 20000737 lui a4,0x20000
- d0c: 200005b7 lui a1,0x20000
- d10: 0b060613 addi a2,a2,176
- d14: 0d070713 addi a4,a4,208 # 200000d0
- d18: 09c58593 addi a1,a1,156 # 2000009c
- d1c: 4501 li a0,0
- d1e: 02f47563 bgeu s0,a5,d48
- d22: 419c lw a5,0(a1)
- d24: 46d1 li a3,20
- d26: 57dc lw a5,44(a5)
- d28: 02d787b3 mul a5,a5,a3
- d2c: 973e add a4,a4,a5
- d2e: 4318 lw a4,0(a4)
- d30: 4785 li a5,1
- d32: 00e7f363 bgeu a5,a4,d38
- d36: 4505 li a0,1
- d38: 200007b7 lui a5,0x20000
- d3c: 0c07a783 lw a5,192(a5) # 200000c0
- d40: c391 beqz a5,d44
- d42: 4505 li a0,1
- d44: ff6ff06f j 53a <__riscv_restore_0>
- d48: 20000e37 lui t3,0x20000
- d4c: 20000eb7 lui t4,0x20000
- d50: 4f51 li t5,20
- d52: 0a0e0793 addi a5,t3,160 # 200000a0
- d56: 4394 lw a3,0(a5)
- d58: 4294 lw a3,0(a3)
- d5a: e681 bnez a3,d62
- d5c: 57fd li a5,-1
- d5e: c21c sw a5,0(a2)
- d60: b7c9 j d22
- d62: 439c lw a5,0(a5)
- d64: 47dc lw a5,12(a5)
- d66: 47dc lw a5,12(a5)
- d68: 43d4 lw a3,4(a5)
- d6a: 00d47463 bgeu s0,a3,d72
- d6e: c214 sw a3,0(a2)
- d70: bf4d j d22
- d72: 0087a883 lw a7,8(a5)
- d76: 00c7a803 lw a6,12(a5)
- d7a: 4bd4 lw a3,20(a5)
- d7c: 00478313 addi t1,a5,4
- d80: 0108a423 sw a6,8(a7)
- d84: 01182223 sw a7,4(a6)
- d88: 0046a883 lw a7,4(a3)
- d8c: 00689463 bne a7,t1,d94
- d90: 0106a223 sw a6,4(a3)
- d94: 0006a803 lw a6,0(a3)
- d98: 0007aa23 sw zero,20(a5)
- d9c: 187d addi a6,a6,-1
- d9e: 0106a023 sw a6,0(a3)
- da2: 5794 lw a3,40(a5)
- da4: ca95 beqz a3,dd8
- da6: 01c7a803 lw a6,28(a5)
- daa: 0207a883 lw a7,32(a5)
- dae: 0046af83 lw t6,4(a3)
- db2: 01182423 sw a7,8(a6)
- db6: 0207a883 lw a7,32(a5)
- dba: 0108a223 sw a6,4(a7)
- dbe: 01878813 addi a6,a5,24
- dc2: 010f9463 bne t6,a6,dca
- dc6: 0116a223 sw a7,4(a3)
- dca: 0006a803 lw a6,0(a3)
- dce: 0207a423 sw zero,40(a5)
- dd2: 187d addi a6,a6,-1
- dd4: 0106a023 sw a6,0(a3)
- dd8: 0ace8693 addi a3,t4,172 # 200000ac
- ddc: 02c7a803 lw a6,44(a5)
- de0: 0006a883 lw a7,0(a3)
- de4: 0108f463 bgeu a7,a6,dec
- de8: 0106a023 sw a6,0(a3)
- dec: 03e806b3 mul a3,a6,t5
- df0: 96ba add a3,a3,a4
- df2: 0046a883 lw a7,4(a3)
- df6: 0088af83 lw t6,8(a7)
- dfa: 0117a423 sw a7,8(a5)
- dfe: 01f7a623 sw t6,12(a5)
- e02: 0088af83 lw t6,8(a7)
- e06: 006fa223 sw t1,4(t6)
- e0a: 0068a423 sw t1,8(a7)
- e0e: cbd4 sw a3,20(a5)
- e10: 429c lw a5,0(a3)
- e12: 0785 addi a5,a5,1
- e14: c29c sw a5,0(a3)
- e16: 419c lw a5,0(a1)
- e18: 57dc lw a5,44(a5)
- e1a: f2f86ce3 bltu a6,a5,d52
- e1e: 4505 li a0,1
- e20: bf0d j d52
- e22: 200007b7 lui a5,0x20000
- e26: 0b878793 addi a5,a5,184 # 200000b8
- e2a: 4398 lw a4,0(a5)
- e2c: 4501 li a0,0
- e2e: 0705 addi a4,a4,1
- e30: c398 sw a4,0(a5)
- e32: 8082 ret
+00000ae2 :
+ ae2: a35ff2ef jal t0,516 <__riscv_save_0>
+ ae6: 1101 addi sp,sp,-32
+ ae8: 842a mv s0,a0
+ aea: 00010423 sb zero,8(sp)
+ aee: 44a5 li s1,9
+ af0: 841c lbu a5,8(sp)
+ af2: 04f4f863 bgeu s1,a5,b42
+ af6: 00010423 sb zero,8(sp)
+ afa: 46a5 li a3,9
+ afc: 4621 li a2,8
+ afe: 841c lbu a5,8(sp)
+ b00: 06f6fc63 bgeu a3,a5,b78
+ b04: 00011523 sh zero,10(sp)
+ b08: 00010423 sb zero,8(sp)
+ b0c: 4695 li a3,5
+ b0e: 841c lbu a5,8(sp)
+ b10: 0cf6fe63 bgeu a3,a5,bec
+ b14: 8538 lhu a4,10(sp)
+ b16: 853c lhu a5,10(sp)
+ b18: 4699 li a3,6
+ b1a: 460d li a2,3
+ b1c: 02d7f7b3 remu a5,a5,a3
+ b20: 6505 lui a0,0x1
+ b22: 80050513 addi a0,a0,-2048 # 800 <__stack_size>
+ b26: 02c7d7b3 divu a5,a5,a2
+ b2a: 02d75733 divu a4,a4,a3
+ b2e: 97ba add a5,a5,a4
+ b30: 07c2 slli a5,a5,0x10
+ b32: 83c1 srli a5,a5,0x10
+ b34: 857c sh a5,10(sp)
+ b36: 853c lhu a5,10(sp)
+ b38: 6105 addi sp,sp,32
+ b3a: 8d1d sub a0,a0,a5
+ b3c: 0542 slli a0,a0,0x10
+ b3e: 8541 srai a0,a0,0x10
+ b40: baed j 53a <__riscv_restore_0>
+ b42: 441c lw a5,8(s0)
+ b44: 0087e793 ori a5,a5,8
+ b48: c41c sw a5,8(s0)
+ b4a: 8522 mv a0,s0
+ b4c: 3d51 jal 9e0
+ b4e: fd75 bnez a0,b4a
+ b50: 441c lw a5,8(s0)
+ b52: 0047e793 ori a5,a5,4
+ b56: c41c sw a5,8(s0)
+ b58: 8522 mv a0,s0
+ b5a: 3d61 jal 9f2
+ b5c: fd75 bnez a0,b58
+ b5e: 4478 lw a4,76(s0)
+ b60: 841c lbu a5,8(sp)
+ b62: 1014 addi a3,sp,32
+ b64: 0786 slli a5,a5,0x1
+ b66: 97b6 add a5,a5,a3
+ b68: fee79623 sh a4,-20(a5)
+ b6c: 841c lbu a5,8(sp)
+ b6e: 0785 addi a5,a5,1
+ b70: 0ff7f793 andi a5,a5,255
+ b74: 845c sb a5,8(sp)
+ b76: bfad j af0
+ b78: 000104a3 sb zero,9(sp)
+ b7c: 849c lbu a5,9(sp)
+ b7e: 00f67863 bgeu a2,a5,b8e
+ b82: 841c lbu a5,8(sp)
+ b84: 0785 addi a5,a5,1
+ b86: 0ff7f793 andi a5,a5,255
+ b8a: 845c sb a5,8(sp)
+ b8c: bf8d j afe
+ b8e: 8498 lbu a4,9(sp)
+ b90: 849c lbu a5,9(sp)
+ b92: 100c addi a1,sp,32
+ b94: 0706 slli a4,a4,0x1
+ b96: 0785 addi a5,a5,1
+ b98: 0786 slli a5,a5,0x1
+ b9a: 972e add a4,a4,a1
+ b9c: 97ae add a5,a5,a1
+ b9e: fec75703 lhu a4,-20(a4) # fbffffec <__freertos_irq_stack_top+0xdbff7fec>
+ ba2: fec7d783 lhu a5,-20(a5)
+ ba6: 02e7fd63 bgeu a5,a4,be0
+ baa: 849c lbu a5,9(sp)
+ bac: 0786 slli a5,a5,0x1
+ bae: 97ae add a5,a5,a1
+ bb0: fec7d783 lhu a5,-20(a5)
+ bb4: 857c sh a5,10(sp)
+ bb6: 849c lbu a5,9(sp)
+ bb8: 8498 lbu a4,9(sp)
+ bba: 0785 addi a5,a5,1
+ bbc: 0786 slli a5,a5,0x1
+ bbe: 97ae add a5,a5,a1
+ bc0: fec7d583 lhu a1,-20(a5)
+ bc4: 00171793 slli a5,a4,0x1
+ bc8: 1018 addi a4,sp,32
+ bca: 97ba add a5,a5,a4
+ bcc: feb79623 sh a1,-20(a5)
+ bd0: 849c lbu a5,9(sp)
+ bd2: 8538 lhu a4,10(sp)
+ bd4: 100c addi a1,sp,32
+ bd6: 0785 addi a5,a5,1
+ bd8: 0786 slli a5,a5,0x1
+ bda: 97ae add a5,a5,a1
+ bdc: fee79623 sh a4,-20(a5)
+ be0: 849c lbu a5,9(sp)
+ be2: 0785 addi a5,a5,1
+ be4: 0ff7f793 andi a5,a5,255
+ be8: 84dc sb a5,9(sp)
+ bea: bf49 j b7c
+ bec: 841c lbu a5,8(sp)
+ bee: 1010 addi a2,sp,32
+ bf0: 8538 lhu a4,10(sp)
+ bf2: 0789 addi a5,a5,2
+ bf4: 0786 slli a5,a5,0x1
+ bf6: 97b2 add a5,a5,a2
+ bf8: fec7d783 lhu a5,-20(a5)
+ bfc: 97ba add a5,a5,a4
+ bfe: 07c2 slli a5,a5,0x10
+ c00: 83c1 srli a5,a5,0x10
+ c02: 857c sh a5,10(sp)
+ c04: 841c lbu a5,8(sp)
+ c06: 0785 addi a5,a5,1
+ c08: 0ff7f793 andi a5,a5,255
+ c0c: 845c sb a5,8(sp)
+ c0e: b701 j b0e
-00000e34 :
- e34: 200007b7 lui a5,0x20000
- e38: 0a87a703 lw a4,168(a5) # 200000a8
- e3c: 200007b7 lui a5,0x20000
- e40: 0c078793 addi a5,a5,192 # 200000c0