425 lines
22 KiB
C
425 lines
22 KiB
C
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/********************************** (C) COPYRIGHT *******************************
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* File Name : ch32l103_i2c.h
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* Author : WCH
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* Version : V1.0.0
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* Date : 2023/07/08
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* Description : This file contains all the functions prototypes for the
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* I2C firmware library.
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* Attention: This software (modified or not) and binary are used for
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* microcontroller manufactured by Nanjing Qinheng Microelectronics.
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*******************************************************************************/
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#ifndef __CH32L103_I2C_H
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#define __CH32L103_I2C_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "ch32l103.h"
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/* I2C Init structure definition */
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typedef struct
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{
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uint32_t I2C_ClockSpeed; /* Specifies the clock frequency.
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This parameter must be set to a value lower than 400kHz */
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uint16_t I2C_Mode; /* Specifies the I2C mode.
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This parameter can be a value of @ref I2C_mode */
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uint16_t I2C_DutyCycle; /* Specifies the I2C fast mode duty cycle.
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This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
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uint16_t I2C_OwnAddress1; /* Specifies the first device own address.
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This parameter can be a 7-bit or 10-bit address. */
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uint16_t I2C_Ack; /* Enables or disables the acknowledgement.
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This parameter can be a value of @ref I2C_acknowledgement */
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uint16_t I2C_AcknowledgedAddress; /* Specifies if 7-bit or 10-bit address is acknowledged.
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This parameter can be a value of @ref I2C_acknowledged_address */
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} I2C_InitTypeDef;
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/* I2C_mode */
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#define I2C_Mode_I2C ((uint16_t)0x0000)
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#define I2C_Mode_SMBusDevice ((uint16_t)0x0002)
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#define I2C_Mode_SMBusHost ((uint16_t)0x000A)
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/* I2C_duty_cycle_in_fast_mode */
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#define I2C_DutyCycle_16_9 ((uint16_t)0x4000) /* I2C fast mode Tlow/Thigh = 16/9 */
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#define I2C_DutyCycle_2 ((uint16_t)0xBFFF) /* I2C fast mode Tlow/Thigh = 2 */
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/* I2C_acknowledgement */
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#define I2C_Ack_Enable ((uint16_t)0x0400)
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#define I2C_Ack_Disable ((uint16_t)0x0000)
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/* I2C_transfer_direction */
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#define I2C_Direction_Transmitter ((uint8_t)0x00)
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#define I2C_Direction_Receiver ((uint8_t)0x01)
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/* I2C_acknowledged_address */
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#define I2C_AcknowledgedAddress_7bit ((uint16_t)0x4000)
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#define I2C_AcknowledgedAddress_10bit ((uint16_t)0xC000)
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/* I2C_registers */
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#define I2C_Register_CTLR1 ((uint8_t)0x00)
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#define I2C_Register_CTLR2 ((uint8_t)0x04)
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#define I2C_Register_OADDR1 ((uint8_t)0x08)
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#define I2C_Register_OADDR2 ((uint8_t)0x0C)
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#define I2C_Register_DATAR ((uint8_t)0x10)
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#define I2C_Register_STAR1 ((uint8_t)0x14)
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#define I2C_Register_STAR2 ((uint8_t)0x18)
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#define I2C_Register_CKCFGR ((uint8_t)0x1C)
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#define I2C_Register_RTR ((uint8_t)0x20)
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/* I2C_SMBus_alert_pin_level */
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#define I2C_SMBusAlert_Low ((uint16_t)0x2000)
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#define I2C_SMBusAlert_High ((uint16_t)0xDFFF)
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/* I2C_PEC_position */
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#define I2C_PECPosition_Next ((uint16_t)0x0800)
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#define I2C_PECPosition_Current ((uint16_t)0xF7FF)
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/* I2C_NACK_position */
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#define I2C_NACKPosition_Next ((uint16_t)0x0800)
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#define I2C_NACKPosition_Current ((uint16_t)0xF7FF)
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/* I2C_interrupts_definition */
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#define I2C_IT_BUF ((uint16_t)0x0400)
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#define I2C_IT_EVT ((uint16_t)0x0200)
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#define I2C_IT_ERR ((uint16_t)0x0100)
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/* I2C_interrupts_definition */
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#define I2C_IT_SMBALERT ((uint32_t)0x01008000)
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#define I2C_IT_TIMEOUT ((uint32_t)0x01004000)
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#define I2C_IT_PECERR ((uint32_t)0x01001000)
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#define I2C_IT_OVR ((uint32_t)0x01000800)
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#define I2C_IT_AF ((uint32_t)0x01000400)
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#define I2C_IT_ARLO ((uint32_t)0x01000200)
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#define I2C_IT_BERR ((uint32_t)0x01000100)
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#define I2C_IT_TXE ((uint32_t)0x06000080)
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#define I2C_IT_RXNE ((uint32_t)0x06000040)
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#define I2C_IT_STOPF ((uint32_t)0x02000010)
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#define I2C_IT_ADD10 ((uint32_t)0x02000008)
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#define I2C_IT_BTF ((uint32_t)0x02000004)
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#define I2C_IT_ADDR ((uint32_t)0x02000002)
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#define I2C_IT_SB ((uint32_t)0x02000001)
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/* SR2 register flags */
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#define I2C_FLAG_DUALF ((uint32_t)0x00800000)
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#define I2C_FLAG_SMBHOST ((uint32_t)0x00400000)
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#define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00200000)
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#define I2C_FLAG_GENCALL ((uint32_t)0x00100000)
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#define I2C_FLAG_TRA ((uint32_t)0x00040000)
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#define I2C_FLAG_BUSY ((uint32_t)0x00020000)
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#define I2C_FLAG_MSL ((uint32_t)0x00010000)
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/* SR1 register flags */
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#define I2C_FLAG_SMBALERT ((uint32_t)0x10008000)
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#define I2C_FLAG_TIMEOUT ((uint32_t)0x10004000)
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#define I2C_FLAG_PECERR ((uint32_t)0x10001000)
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#define I2C_FLAG_OVR ((uint32_t)0x10000800)
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#define I2C_FLAG_AF ((uint32_t)0x10000400)
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#define I2C_FLAG_ARLO ((uint32_t)0x10000200)
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#define I2C_FLAG_BERR ((uint32_t)0x10000100)
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#define I2C_FLAG_TXE ((uint32_t)0x10000080)
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#define I2C_FLAG_RXNE ((uint32_t)0x10000040)
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#define I2C_FLAG_STOPF ((uint32_t)0x10000010)
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#define I2C_FLAG_ADD10 ((uint32_t)0x10000008)
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#define I2C_FLAG_BTF ((uint32_t)0x10000004)
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#define I2C_FLAG_ADDR ((uint32_t)0x10000002)
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#define I2C_FLAG_SB ((uint32_t)0x10000001)
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/****************I2C Master Events (Events grouped in order of communication)********************/
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/********************************************************************************************************************
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* @brief Start communicate
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*
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* After master use I2C_GenerateSTART() function sending the START condition,the master
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* has to wait for event 5(the Start condition has been correctly
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* released on the I2C bus ).
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*
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*/
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/* EVT5 */
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#define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */
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/********************************************************************************************************************
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* @brief Address Acknowledge
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*
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* When start condition correctly released on the bus(check EVT5), the
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* master use I2C_Send7bitAddress() function sends the address of the slave(s) with which it will communicate
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* it also determines master as transmitter or Receiver. Then the master has to wait that a slave acknowledges
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* his address. If an acknowledge is sent on the bus, one of the following events will be set:
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*
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* 1) In case of Master Receiver (7-bit addressing): the I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED
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* event is set.
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*
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* 2) In case of Master Transmitter (7-bit addressing): the I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED
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* is set
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*
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* 3) In case of 10-Bit addressing mode, the master (after generating the START
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* and checking on EVT5) use I2C_SendData() function send the header of 10-bit addressing mode.
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* Then master wait EVT9. EVT9 means that the 10-bit addressing header has been correctly sent
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* on the bus. Then master should use the function I2C_Send7bitAddress() to send the second part
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* of the 10-bit address (LSB) . Then master should wait for event 6.
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*
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*
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*/
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/* EVT6 */
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#define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */
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#define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */
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/* EVT9 */
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#define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */
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/********************************************************************************************************************
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* @brief Communication events
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*
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* If START condition has generated and slave address
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* been acknowledged. then the master has to check one of the following events for
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* communication procedures:
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*
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* 1) Master Receiver mode: The master has to wait on the event EVT7 then use
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* I2C_ReceiveData() function to read the data received from the slave.
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*
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* 2) Master Transmitter mode: The master use I2C_SendData() function to send data
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* then to wait on event EVT8 or EVT8_2.
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* These two events are similar:
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* - EVT8 means that the data has been written in the data register and is
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* being shifted out.
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* - EVT8_2 means that the data has been physically shifted out and output
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* on the bus.
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* In most cases, using EVT8 is sufficient for the application.
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* Using EVT8_2 will leads to a slower communication speed but will more reliable .
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* EVT8_2 is also more suitable than EVT8 for testing on the last data transmission
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*
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* Note:
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* In case the user software does not guarantee that this event EVT7 is managed before
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* the current byte end of transfer, then user may check on I2C_EVENT_MASTER_BYTE_RECEIVED
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* and I2C_FLAG_BTF flag at the same time .But in this case the communication may be slower.
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*
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*
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*/
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/* Master Receive mode */
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/* EVT7 */
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#define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */
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/* Master Transmitter mode*/
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/* EVT8 */
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#define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */
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/* EVT8_2 */
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#define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */
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/******************I2C Slave Events (Events grouped in order of communication)******************/
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/********************************************************************************************************************
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* @brief Start Communicate events
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*
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* Wait on one of these events at the start of the communication. It means that
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* the I2C peripheral detected a start condition of master device generate on the bus.
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* If the acknowledge feature is enabled through function I2C_AcknowledgeConfig()),The peripheral generates an ACK condition on the bus.
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*
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* a) In normal case (only one address managed by the slave), when the address
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* sent by the master matches the own address of the peripheral (configured by
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* I2C_OwnAddress1 field) the I2C_EVENT_SLAVE_XXX_ADDRESS_MATCHED event is set
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* (where XXX could be TRANSMITTER or RECEIVER).
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*
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* b) In case the address sent by the master matches the second address of the
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* peripheral (configured by the function I2C_OwnAddress2Config() and enabled
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* by the function I2C_DualAddressCmd()) the events I2C_EVENT_SLAVE_XXX_SECONDADDRESS_MATCHED
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* (where XXX could be TRANSMITTER or RECEIVER) are set.
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*
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* c) In case the address sent by the master is General Call (address 0x00) and
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* if the General Call is enabled for the peripheral (using function I2C_GeneralCallCmd())
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* the following event is set I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED.
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*
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*/
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/* EVT1 */
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/* a) Case of One Single Address managed by the slave */
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#define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */
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#define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */
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/* b) Case of Dual address managed by the slave */
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#define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */
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#define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */
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/* c) Case of General Call enabled for the slave */
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#define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */
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/********************************************************************************************************************
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* @brief Communication events
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*
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* Wait on one of these events when EVT1 has already been checked :
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*
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* - Slave Receiver mode:
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* - EVT2--The device is expecting to receive a data byte .
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* - EVT4--The device is expecting the end of the communication: master
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* sends a stop condition and data transmission is stopped.
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*
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* - Slave Transmitter mode:
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* - EVT3--When a byte has been transmitted by the slave and the Master is expecting
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* the end of the byte transmission. The two events I2C_EVENT_SLAVE_BYTE_TRANSMITTED and
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* I2C_EVENT_SLAVE_BYTE_TRANSMITTING are similar. If the user software doesn't guarantee
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* the EVT3 is managed before the current byte end of transfer The second one can optionally
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* be used.
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* - EVT3_2--When the master sends a NACK to tell slave device that data transmission
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* shall end . The slave device has to stop sending
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* data bytes and wait a Stop condition from bus.
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*
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* Note:
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* If the user software does not guarantee that the event 2 is
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* managed before the current byte end of transfer, User may check on I2C_EVENT_SLAVE_BYTE_RECEIVED
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* and I2C_FLAG_BTF flag at the same time .
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* In this case the communication will be slower.
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*
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*/
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/* Slave Receiver mode*/
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/* EVT2 */
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#define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */
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/* EVT4 */
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#define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */
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/* Slave Transmitter mode*/
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/* EVT3 */
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#define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */
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#define I2C_EVENT_SLAVE_BYTE_TRANSMITTING ((uint32_t)0x00060080) /* TRA, BUSY and TXE flags */
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/* EVT3_2 */
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#define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */
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void I2C_DeInit(I2C_TypeDef *I2Cx);
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void I2C_Init(I2C_TypeDef *I2Cx, I2C_InitTypeDef *I2C_InitStruct);
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|
void I2C_StructInit(I2C_InitTypeDef *I2C_InitStruct);
|
||
|
|
void I2C_Cmd(I2C_TypeDef *I2Cx, FunctionalState NewState);
|
||
|
|
void I2C_DMACmd(I2C_TypeDef *I2Cx, FunctionalState NewState);
|
||
|
|
void I2C_DMALastTransferCmd(I2C_TypeDef *I2Cx, FunctionalState NewState);
|
||
|
|
void I2C_GenerateSTART(I2C_TypeDef *I2Cx, FunctionalState NewState);
|
||
|
|
void I2C_GenerateSTOP(I2C_TypeDef *I2Cx, FunctionalState NewState);
|
||
|
|
void I2C_AcknowledgeConfig(I2C_TypeDef *I2Cx, FunctionalState NewState);
|
||
|
|
void I2C_OwnAddress2Config(I2C_TypeDef *I2Cx, uint8_t Address);
|
||
|
|
void I2C_DualAddressCmd(I2C_TypeDef *I2Cx, FunctionalState NewState);
|
||
|
|
void I2C_GeneralCallCmd(I2C_TypeDef *I2Cx, FunctionalState NewState);
|
||
|
|
void I2C_ITConfig(I2C_TypeDef *I2Cx, uint16_t I2C_IT, FunctionalState NewState);
|
||
|
|
void I2C_SendData(I2C_TypeDef *I2Cx, uint8_t Data);
|
||
|
|
uint8_t I2C_ReceiveData(I2C_TypeDef *I2Cx);
|
||
|
|
void I2C_Send7bitAddress(I2C_TypeDef *I2Cx, uint8_t Address, uint8_t I2C_Direction);
|
||
|
|
uint16_t I2C_ReadRegister(I2C_TypeDef *I2Cx, uint8_t I2C_Register);
|
||
|
|
void I2C_SoftwareResetCmd(I2C_TypeDef *I2Cx, FunctionalState NewState);
|
||
|
|
void I2C_NACKPositionConfig(I2C_TypeDef *I2Cx, uint16_t I2C_NACKPosition);
|
||
|
|
void I2C_SMBusAlertConfig(I2C_TypeDef *I2Cx, uint16_t I2C_SMBusAlert);
|
||
|
|
void I2C_TransmitPEC(I2C_TypeDef *I2Cx, FunctionalState NewState);
|
||
|
|
void I2C_PECPositionConfig(I2C_TypeDef *I2Cx, uint16_t I2C_PECPosition);
|
||
|
|
void I2C_CalculatePEC(I2C_TypeDef *I2Cx, FunctionalState NewState);
|
||
|
|
uint8_t I2C_GetPEC(I2C_TypeDef *I2Cx);
|
||
|
|
void I2C_ARPCmd(I2C_TypeDef *I2Cx, FunctionalState NewState);
|
||
|
|
void I2C_StretchClockCmd(I2C_TypeDef *I2Cx, FunctionalState NewState);
|
||
|
|
void I2C_FastModeDutyCycleConfig(I2C_TypeDef *I2Cx, uint16_t I2C_DutyCycle);
|
||
|
|
|
||
|
|
|
||
|
|
/*****************************************************************************************
|
||
|
|
*
|
||
|
|
* I2C State Monitoring Functions
|
||
|
|
*
|
||
|
|
****************************************************************************************
|
||
|
|
* This I2C driver provides three different ways for I2C state monitoring
|
||
|
|
* profit the application requirements and constraints:
|
||
|
|
*
|
||
|
|
*
|
||
|
|
* a) First way:
|
||
|
|
* Using I2C_CheckEvent() function:
|
||
|
|
* It compares the status registers (STARR1 and STAR2) content to a given event
|
||
|
|
* (can be the combination of more flags).
|
||
|
|
* If the current status registers includes the given flags will return SUCCESS.
|
||
|
|
* and if the current status registers miss flags will returns ERROR.
|
||
|
|
* - When to use:
|
||
|
|
* - This function is suitable for most applications as well as for startup
|
||
|
|
* activity since the events are fully described in the product reference manual
|
||
|
|
* (CH32FV2x-V3xRM).
|
||
|
|
* - It is also suitable for users who need to define their own events.
|
||
|
|
* - Limitations:
|
||
|
|
* - If an error occurs besides to the monitored error,
|
||
|
|
* the I2C_CheckEvent() function may return SUCCESS despite the communication
|
||
|
|
* in corrupted state. it is suggeted to use error interrupts to monitor the error
|
||
|
|
* events and handle them in IRQ handler.
|
||
|
|
*
|
||
|
|
*
|
||
|
|
* Note:
|
||
|
|
* The following functions are recommended for error management: :
|
||
|
|
* - I2C_ITConfig() main function of configure and enable the error interrupts.
|
||
|
|
* - I2Cx_ER_IRQHandler() will be called when the error interrupt happen.
|
||
|
|
* Where x is the peripheral instance (I2C1, I2C2 ...)
|
||
|
|
* - I2Cx_ER_IRQHandler() will call I2C_GetFlagStatus() or I2C_GetITStatus() functions
|
||
|
|
* to determine which error occurred.
|
||
|
|
* - I2C_ClearFlag() \ I2C_ClearITPendingBit() \ I2C_SoftwareResetCmd()
|
||
|
|
* \ I2C_GenerateStop() will be use to clear the error flag and source,
|
||
|
|
* and return to correct communication status.
|
||
|
|
*
|
||
|
|
*
|
||
|
|
* b) Second way:
|
||
|
|
* Using the function to get a single word(uint32_t) composed of status register 1 and register 2.
|
||
|
|
* (Status Register 2 value is shifted left by 16 bits and concatenated to Status Register 1).
|
||
|
|
* - When to use:
|
||
|
|
*
|
||
|
|
* - This function is suitable for the same applications above but it
|
||
|
|
* don't have the limitations of I2C_GetFlagStatus() function .
|
||
|
|
* The returned value could be compared to events already defined in the
|
||
|
|
* library (CH32L103_i2c.h) or to custom values defined by user.
|
||
|
|
* - This function can be used to monitor the status of multiple flags simultaneously.
|
||
|
|
* - Contrary to the I2C_CheckEvent () function, this function can choose the time to
|
||
|
|
* accept the event according to the user's needs (when all event flags are set and
|
||
|
|
* no other flags are set, or only when the required flags are set)
|
||
|
|
*
|
||
|
|
* - Limitations:
|
||
|
|
* - User may need to define his own events.
|
||
|
|
* - Same remark concerning the error management is applicable for this
|
||
|
|
* function if user decides to check only regular communication flags (and
|
||
|
|
* ignores error flags).
|
||
|
|
*
|
||
|
|
*
|
||
|
|
* c) Third way:
|
||
|
|
* Using the function I2C_GetFlagStatus() get the status of
|
||
|
|
* one single flag .
|
||
|
|
* - When to use:
|
||
|
|
* - This function could be used for specific applications or in debug phase.
|
||
|
|
* - It is suitable when only one flag checking is needed .
|
||
|
|
*
|
||
|
|
* - Limitations:
|
||
|
|
* - Call this function to access the status register. Some flag bits may be cleared.
|
||
|
|
* - Function may need to be called twice or more in order to monitor one single event.
|
||
|
|
*/
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
/*********************************************************
|
||
|
|
*
|
||
|
|
* a) Basic state monitoring(First way)
|
||
|
|
********************************************************
|
||
|
|
*/
|
||
|
|
ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT);
|
||
|
|
/*********************************************************
|
||
|
|
*
|
||
|
|
* b) Advanced state monitoring(Second way)
|
||
|
|
********************************************************
|
||
|
|
*/
|
||
|
|
uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx);
|
||
|
|
/*********************************************************
|
||
|
|
*
|
||
|
|
* c) Flag-based state monitoring(Third way)
|
||
|
|
*********************************************************
|
||
|
|
*/
|
||
|
|
FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
|
||
|
|
|
||
|
|
void I2C_ClearFlag(I2C_TypeDef *I2Cx, uint32_t I2C_FLAG);
|
||
|
|
ITStatus I2C_GetITStatus(I2C_TypeDef *I2Cx, uint32_t I2C_IT);
|
||
|
|
void I2C_ClearITPendingBit(I2C_TypeDef *I2Cx, uint32_t I2C_IT);
|
||
|
|
|
||
|
|
#ifdef __cplusplus
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif
|